signal bus_read : std_logic := '0';\r
signal bus_write : std_logic := '0';\r
signal bus_ready : std_logic; \r
- --signal spi_busy : std_logic; \r
+ signal bus_busy : std_logic; \r
\r
signal spi_data_out : std_logic_vector(15 downto 0);\r
signal spi_data_in : std_logic_vector(15 downto 0);\r
signal spi_write_out : std_logic;\r
signal spi_read_out : std_logic;\r
signal spi_ready_in : std_logic;\r
- \r
+ signal spi_busy_out : std_logic;\r
\r
signal sed_error : std_logic;\r
signal sed_debug : std_logic_vector(31 downto 0);\r
SPI_WRITE_IN => spi_write_out,\r
SPI_READ_IN => spi_read_out,\r
SPI_READY_OUT => spi_ready_in,\r
+ SPI_BUSY_IN => spi_busy_out,\r
\r
LOC_DATA_OUT => spi_rx_data,\r
LOC_DATA_IN => spi_tx_data,\r
LOC_ADDR_OUT => spi_addr,\r
LOC_WRITE_OUT => bus_write,\r
LOC_READ_OUT => bus_read,\r
- LOC_READY_IN => bus_ready\r
+ LOC_READY_IN => bus_ready,\r
+ LOC_BUSY_OUT => bus_busy\r
\r
); \r
\r