updated padiwa register information

diff --git a/trb3/WasaFrontend.tex b/trb3/WasaFrontend.tex
index 4afc9cb4811798e4ae9f8e2b63184b1bd27dd715..e41715bc17f2124d0ccf2832339a4d11d7524e56 100644 (file)
--- a/trb3/WasaFrontend.tex
+++ b/trb3/WasaFrontend.tex
@@ -44,7 +44,11 @@ Note that up to 16 commands can be sent to a board with one trbnet access: Load
 0x20 & 3 & I/O & Monitor Select. 4 Bit to select one input to be routed to test output (SPARE\_LINE 5\&6)\\
 0x20 & 4 & I/O & Input Invert, one bit for each input signal\\
 0x20 & 5 & I/O & Input Stretch, one bit for each input signal. The input signal gets stretched to at least two clock cycles (about 16 ns) length. The timing information of the falling edge is lost.\\
-0x26 & 6 & I/O & Temperature Compensation, a 16 Bit value to adjust thresholds when temperature is changing. See below. \\
+0x20 & 6 & I/O & Temperature Compensation, a 16 Bit value to adjust thresholds 
+when temperature is changing. See below. \\
+0x20 & 10 & Test & Reads a word from the test Fifo. \\
+0x21 & 0--2 & Design & Design Information. Register 0/1: lower/upper part of 
+Unix timestamp of time of compilation. Register 2: Padiwa version number.\\
 0x40 & any & Memory & Read/Write to/from RAM. 16 registers with 8 Bit each.\\
 0x50 & 0 & Flash & Execute Flash command.\\
 0x51 & 0--1 & Flash & Load RAM content to PWM settings. Channel Bit 0 selects upper or lower half of PWM channels. No data payload\\
@@ -75,7 +79,9 @@ A flash command consists of a three Bit operation (Bit 15-13 in SPI register 0x5
 As measured, the thresholds of input LVDS buffers shift by about 0.1 mV/K. For compensation, an offset is 
 added to the actually set threshold according to \\
 $\mbox{Offset} = \mbox{Temperature} \cdot \mbox{CompensationSetting} / 256$\\
-where the temperature is given in degrees centigrade. Note that the temperature is This feature is not available in all design versions.
+where the temperature is given in degrees centigrade. Note that the temperature 
+is measured with 1/16 degree resolution.
+This feature is not available in all design versions.
 If register 0x26 does not exist, it is not present.