OOB registers added

diff --git a/gbe_trb/base/gbe_logic_wrapper.vhd b/gbe_trb/base/gbe_logic_wrapper.vhd
index 9b4952dd08804df2c34341f3fdea00ca090cb15a..c6fb032e6a2e38160fb781ecf222b8f55707156b 100644 (file)
--- a/gbe_trb/base/gbe_logic_wrapper.vhd
+++ b/gbe_trb/base/gbe_logic_wrapper.vhd
@@ -65,6 +65,11 @@ entity gbe_logic_wrapper is
     FWD_EOP_IN               : in  std_logic;
     FWD_READY_OUT            : out std_logic;
     FWD_FULL_OUT             : out std_logic;
+    --
+    OOB_REGISTER_0_OUT       : out std_logic_vector(31 downto 0);
+    OOB_REGISTER_1_OUT       : out std_logic_vector(31 downto 0);
+    OOB_REGISTER_2_OUT       : out std_logic_vector(31 downto 0);
+    OOB_REGISTER_3_OUT       : out std_logic_vector(31 downto 0);
     -- Monitor
     MONITOR_RX_BYTES_OUT     : out std_logic_vector(31 downto 0);
     MONITOR_RX_FRAMES_OUT    : out std_logic_vector(31 downto 0);
@@ -446,6 +451,12 @@ begin
       FR_DEST_IP_ADDRESS_OUT  => fr_dest_ip,
       FR_SRC_UDP_PORT_OUT     => fr_src_udp,
       FR_DEST_UDP_PORT_OUT    => fr_dest_udp,
+      --
+      OOB_REGISTER_0_OUT      => OOB_REGISTER_0_OUT,
+      OOB_REGISTER_1_OUT      => OOB_REGISTER_1_OUT,
+      OOB_REGISTER_2_OUT      => OOB_REGISTER_2_OUT,
+      OOB_REGISTER_3_OUT      => OOB_REGISTER_3_OUT,
+      --
       MONITOR_RX_BYTES_OUT    => monitor_rx_bytes,
       MONITOR_RX_FRAMES_OUT   => monitor_rx_frames,
       MONITOR_DROPPED_OUT     => monitor_dropped

diff --git a/gbe_trb/base/gbe_wrapper_fifo.vhd b/gbe_trb/base/gbe_wrapper_fifo.vhd
index dab24a657fac644ee89bde9785e8c2d33316fbf9..680ef185b9be51269c890dc0cd6709796d3ae07d 100644 (file)
--- a/gbe_trb/base/gbe_wrapper_fifo.vhd
+++ b/gbe_trb/base/gbe_wrapper_fifo.vhd
@@ -63,6 +63,11 @@ entity gbe_wrapper_fifo is
     FWD_EOP_IN                : in  std_logic := '0';
     FWD_READY_OUT             : out std_logic;
     FWD_FULL_OUT              : out std_logic;
+    --
+    OOB_REGISTER_0_OUT      : out std_logic_vector(31 downto 0);
+    OOB_REGISTER_1_OUT      : out std_logic_vector(31 downto 0);
+    OOB_REGISTER_2_OUT      : out std_logic_vector(31 downto 0);
+    OOB_REGISTER_3_OUT      : out std_logic_vector(31 downto 0);
     --                        
     MAKE_RESET_OUT            : out std_logic;
     --                        
@@ -208,6 +213,11 @@ begin
     FWD_EOP_IN               => FWD_EOP_IN,
     FWD_READY_OUT            => FWD_READY_OUT,
     FWD_FULL_OUT             => FWD_FULL_OUT,
+    --
+    OOB_REGISTER_0_OUT       => OOB_REGISTER_0_OUT,
+    OOB_REGISTER_1_OUT       => OOB_REGISTER_1_OUT,
+    OOB_REGISTER_2_OUT       => OOB_REGISTER_2_OUT,
+    OOB_REGISTER_3_OUT       => OOB_REGISTER_3_OUT,
     -- Monitor
     MONITOR_RX_FRAMES_OUT    => monitor_rx_frames,
     MONITOR_RX_BYTES_OUT     => monitor_rx_bytes,

diff --git a/gbe_trb/base/trb_net16_gbe_frame_receiver.vhd b/gbe_trb/base/trb_net16_gbe_frame_receiver.vhd
index 97a5f82d6d950c48bea9a65d8fc2657c9ac6782e..5320012542b67f7c8989ab4bbe84b1001dead780 100644 (file)
--- a/gbe_trb/base/trb_net16_gbe_frame_receiver.vhd
+++ b/gbe_trb/base/trb_net16_gbe_frame_receiver.vhd
@@ -16,7 +16,7 @@ use work.trb_net_gbe_protocols.all;
 -- otherwise, after receiving all bytes, FR_FRAME_VALID_OUT keeps low and the fifo is cleared\r
 -- also a part of addresses assignment has to be done here\r
 \r
--- This entity receives an Ethernet frame, disassembles it and checks if the frame has tobe processed.\r
+-- This entity receives an Ethernet frame, disassembles it and checks if the frame has to be processed.\r
 -- In case, decoded information from header is stored in FIFOs and next stage is informed about available\r
 -- data by FR_FRAME_VALID_OUT.\r
 \r
@@ -54,6 +54,11 @@ port (
   FR_DEST_IP_ADDRESS_OUT  : out std_logic_vector(31 downto 0);\r
   FR_SRC_UDP_PORT_OUT     : out std_logic_vector(15 downto 0);\r
   FR_DEST_UDP_PORT_OUT    : out std_logic_vector(15 downto 0);\r
+--\r
+  OOB_REGISTER_0_OUT      : out std_logic_vector(31 downto 0);\r
+  OOB_REGISTER_1_OUT      : out std_logic_vector(31 downto 0);\r
+  OOB_REGISTER_2_OUT      : out std_logic_vector(31 downto 0);\r
+  OOB_REGISTER_3_OUT      : out std_logic_vector(31 downto 0);\r
 --\r
   MONITOR_RX_BYTES_OUT    : out std_logic_vector(31 downto 0);\r
   MONITOR_RX_FRAMES_OUT   : out std_logic_vector(31 downto 0);\r
@@ -118,6 +123,12 @@ signal fr_ip_proto                          : std_logic_vector(7 downto 0);
 signal xxx0                                 : std_logic_vector(7 downto 0);\r
 signal xxx1                                 : std_logic_vector(7 downto 0);\r
 \r
+signal oob_register_0_int                   : std_logic_vector(31 downto 0);\r
+signal oob_register_1_int                   : std_logic_vector(31 downto 0);\r
+signal oob_register_2_int                   : std_logic_vector(31 downto 0);\r
+signal oob_register_3_int                   : std_logic_vector(31 downto 0);\r
+signal oob_write                            : std_logic;\r
+\r
 attribute syn_preserve : boolean;\r
 attribute syn_keep : boolean;\r
 attribute syn_keep of rec_fifo_empty, rec_fifo_full, state, sizes_fifo_empty, sizes_fifo_full : signal is true;\r
@@ -137,7 +148,7 @@ begin
       new_frame_lock <= '1';\r
     else\r
       new_frame <= '0';\r
-      new_frame_lock <= new_frame_lock;\r
+--      new_frame_lock <= new_frame_lock;\r
     end if;\r
   end if;\r
 end process THE_NEW_FRAME_PROC;\r
@@ -290,8 +301,8 @@ begin
       remove_ctr <= (others => '1');\r
     elsif( (MAC_RX_EN_IN = '1') and (filter_current_state /= IDLE) ) then\r
       remove_ctr <= remove_ctr + 1;\r
-    else\r
-      remove_ctr <= remove_ctr;\r
+--    else\r
+--      remove_ctr <= remove_ctr;\r
     end if;\r
  end if;\r
 end process REMOVE_CTR_PROC;\r
@@ -303,8 +314,8 @@ begin
       saved_proto <= (others => '0');\r
     elsif( (filter_current_state = REMOVE_IP) and (remove_ctr = x"07") ) then\r
       saved_proto <= MAC_RXD_IN;\r
-    else\r
-      saved_proto <= saved_proto;\r
+--    else\r
+--      saved_proto <= saved_proto;\r
     end if;\r
   end if;\r
 end process THE_SAVED_PROTO_PROC;\r
@@ -327,8 +338,8 @@ begin
       saved_dest_mac(39 downto 32) <= MAC_RXD_IN;\r
     elsif( (filter_current_state = REMOVE_DEST) and (remove_ctr = x"02") ) then\r
       saved_dest_mac(47 downto 40) <= MAC_RXD_IN;\r
-    else\r
-      saved_dest_mac <= saved_dest_mac;\r
+--    else\r
+--      saved_dest_mac <= saved_dest_mac;\r
     end if;\r
   end if;\r
 end process THE_SAVED_DEST_MAC_PROC;\r
@@ -351,8 +362,8 @@ begin
       saved_src_mac(39 downto 32) <= MAC_RXD_IN;\r
     elsif( (filter_current_state = REMOVE_SRC) and (remove_ctr = x"08") ) then\r
       saved_src_mac(47 downto 40) <= MAC_RXD_IN;\r
-    else\r
-      saved_src_mac <= saved_src_mac;\r
+--    else\r
+--      saved_src_mac <= saved_src_mac;\r
     end if;\r
   end if;\r
 end process THE_SAVED_SRC_MAC_PROC;\r
@@ -372,8 +383,8 @@ begin
       saved_frame_type(15 downto 8) <= MAC_RXD_IN;\r
     elsif( (filter_current_state = REMOVE_VTYPE) and (remove_ctr = x"0e") ) then\r
       saved_frame_type(7 downto 0) <= MAC_RXD_IN;\r
-    else\r
-      saved_frame_type <= saved_frame_type;\r
+--    else\r
+--      saved_frame_type <= saved_frame_type;\r
     end if;\r
   end if;\r
 end process THE_SAVED_FRAME_TYPE_PROC;\r
@@ -391,8 +402,8 @@ begin
       saved_src_ip(23 downto 16) <= MAC_RXD_IN;\r
     elsif( (filter_current_state = REMOVE_IP) and (remove_ctr = x"0d") ) then\r
       saved_src_ip(31 downto 24) <= MAC_RXD_IN;\r
-    else\r
-      saved_src_ip <= saved_src_ip;\r
+--    else\r
+--      saved_src_ip <= saved_src_ip;\r
     end if;\r
   end if;\r
 end process THE_SAVED_SRC_IP_PROC;\r
@@ -410,8 +421,8 @@ begin
       saved_dest_ip(23 downto 16) <= MAC_RXD_IN;\r
     elsif( (filter_current_state = REMOVE_IP) and (remove_ctr = x"11") ) then\r
       saved_dest_ip(31 downto 24) <= MAC_RXD_IN;\r
-    else\r
-      saved_dest_ip <= saved_dest_ip;\r
+--    else\r
+--      saved_dest_ip <= saved_dest_ip;\r
     end if;\r
   end if;\r
 end process THE_SAVED_DEST_IP_PROC;\r
@@ -425,8 +436,8 @@ begin
       saved_src_udp(15 downto 8) <= MAC_RXD_IN;\r
     elsif( (filter_current_state = REMOVE_UDP) and (remove_ctr = x"13") ) then\r
       saved_src_udp(7 downto 0) <= MAC_RXD_IN;\r
-    else\r
-      saved_src_udp <= saved_src_udp;\r
+--    else\r
+--      saved_src_udp <= saved_src_udp;\r
     end if;\r
   end if;\r
 end process THE_SAVED_SRC_UDP_PROC;\r
@@ -440,8 +451,8 @@ begin
       saved_dest_udp(15 downto 8) <= MAC_RXD_IN;\r
     elsif( (filter_current_state = REMOVE_UDP) and (remove_ctr = x"15") ) then\r
       saved_dest_udp(7 downto 0) <= MAC_RXD_IN;\r
-    else\r
-      saved_dest_udp <= saved_dest_udp;\r
+--    else\r
+--      saved_dest_udp <= saved_dest_udp;\r
     end if;\r
   end if;\r
 end process THE_SAVED_DEST_UDP_PROC;\r
@@ -456,8 +467,8 @@ begin
       saved_vid(15 downto 8) <= MAC_RXD_IN;\r
     elsif( (filter_current_state = REMOVE_VID) and (remove_ctr = x"0c") ) then\r
       saved_vid(7 downto 0) <= MAC_RXD_IN;\r
-    else\r
-      saved_vid <= saved_vid;\r
+--    else\r
+--      saved_vid <= saved_vid;\r
     end if;\r
   end if;\r
 end process THE_SAVED_VID_PROC;\r
@@ -506,7 +517,38 @@ begin
       ISSUE_REBOOT_OUT <= '0';\r
     end if;\r
   end if;\r
-end process;\r
+end process THE_KILLER_PING_PROC;\r
+\r
+THE_SECRET_FRAME_PROC: process( CLK )\r
+begin\r
+  if( rising_edge(CLK) ) then\r
+    if( (filter_current_state = DECIDE) and (saved_proto = x"11") and (saved_frame_type = x"0800") and\r
+        (saved_dest_udp = x"d903") and (saved_src_udp = x"2b67") ) then\r
+      oob_write <= '1';\r
+    else\r
+      oob_write <= '0';\r
+    end if;\r
+  end if;\r
+end process THE_SECRET_FRAME_PROC;\r
+\r
+THE_REGISTERS_PROC: process( CLK )\r
+begin\r
+  if( rising_edge(CLK) ) then\r
+    if( oob_write = '1' ) then\r
+      case saved_src_ip(1 downto 0) is\r
+        when b"00"  => oob_register_0_int <= saved_dest_ip;\r
+        when b"01"  => oob_register_1_int <= saved_dest_ip;\r
+        when b"10"  => oob_register_2_int <= saved_dest_ip;\r
+        when others => oob_register_3_int <= saved_dest_ip;\r
+      end case;\r
+    end if;\r
+  end if;\r
+end process THE_REGISTERS_PROC;\r
+\r
+OOB_REGISTER_0_OUT <= oob_register_0_int;\r
+OOB_REGISTER_1_OUT <= oob_register_1_int;\r
+OOB_REGISTER_2_OUT <= oob_register_2_int;\r
+OOB_REGISTER_3_OUT <= oob_register_3_int;\r
 \r
 THE_RX_FIFO_SYNC: process( CLK )\r
 begin\r

diff --git a/gbe_trb/base/trb_net16_gbe_main_control.vhd b/gbe_trb/base/trb_net16_gbe_main_control.vhd
index 33977a56ec51cb5a94217ba29b57624dbaed04d7..7176a8fa89d59781565431303a395600c183a216 100644 (file)
--- a/gbe_trb/base/trb_net16_gbe_main_control.vhd
+++ b/gbe_trb/base/trb_net16_gbe_main_control.vhd
@@ -259,7 +259,7 @@ begin
       MAKE_RESET_OUT                => MAKE_RESET_OUT,
 
       MY_TRBNET_ADDRESS_IN          => MY_TRBNET_ADDRESS_IN,
-      ISSUE_REBOOT_OUT              => ISSUE_REBOOT_OUT,
+--      ISSUE_REBOOT_OUT              => ISSUE_REBOOT_OUT,
 
       CFG_MAX_REPLY_SIZE_IN         => CFG_MAX_REPLY_SIZE_IN,
 

diff --git a/gbe_trb/base/trb_net16_gbe_protocol_selector.vhd b/gbe_trb/base/trb_net16_gbe_protocol_selector.vhd
index 70a5bc551616302861b9925b1dce5f4bb296274f..74f1d5a999bd162def1c7e537d7cbd5475f0ed64 100644 (file)
--- a/gbe_trb/base/trb_net16_gbe_protocol_selector.vhd
+++ b/gbe_trb/base/trb_net16_gbe_protocol_selector.vhd
@@ -276,7 +276,8 @@ begin
 
   ping_gen : if INCLUDE_PING = '1' generate
     --protocol No. 3 Ping
-    Ping : entity work.trb_net16_gbe_response_constructor_KillPing
+--    Ping : entity work.trb_net16_gbe_response_constructor_KillPing
+    Ping : entity work.trb_net16_gbe_response_constructor_Ping
       generic map(STAT_ADDRESS_BASE => 3
       )
       port map(
@@ -285,8 +286,8 @@ begin
 
         ---- INTERFACE
         MY_MAC_IN              => MY_MAC_IN,
-        MY_TRBNET_ADDRESS_IN   => MY_TRBNET_ADDRESS_IN,
-        ISSUE_REBOOT_OUT            => ISSUE_REBOOT_OUT,
+--        MY_TRBNET_ADDRESS_IN   => MY_TRBNET_ADDRESS_IN,
+--        ISSUE_REBOOT_OUT          => ISSUE_REBOOT_OUT,
         MY_IP_IN               => my_ip,
         PS_DATA_IN             => PS_DATA_IN,
         PS_WR_EN_IN            => PS_WR_EN_IN,

diff --git a/gbe_trb/base/trb_net_gbe_components.vhd b/gbe_trb/base/trb_net_gbe_components.vhd
index db2d20f244095c12f6460c4a286726ce31e81ee1..e5be9402f2554cf54ba4c1cfe0732072c73ce302 100644 (file)
--- a/gbe_trb/base/trb_net_gbe_components.vhd
+++ b/gbe_trb/base/trb_net_gbe_components.vhd
@@ -616,6 +616,11 @@ port (
   FR_DEST_IP_ADDRESS_OUT  : out std_logic_vector(31 downto 0);
   FR_SRC_UDP_PORT_OUT     : out std_logic_vector(15 downto 0);
   FR_DEST_UDP_PORT_OUT    : out std_logic_vector(15 downto 0);
+--
+  OOB_REGISTER_0_OUT      : out std_logic_vector(31 downto 0);
+  OOB_REGISTER_1_OUT      : out std_logic_vector(31 downto 0);
+  OOB_REGISTER_2_OUT      : out std_logic_vector(31 downto 0);
+  OOB_REGISTER_3_OUT      : out std_logic_vector(31 downto 0);
 --
   MONITOR_RX_BYTES_OUT    : out std_logic_vector(31 downto 0);
   MONITOR_RX_FRAMES_OUT   : out std_logic_vector(31 downto 0);

diff --git a/trb_net16_endpoint_standalone_sctrl.vhd b/trb_net16_endpoint_standalone_sctrl.vhd
index 3a80ed78bb471efb231e000621b328d32ebc3bc1..6fbe930c5c19fdacb99a13d428a6d9b9673a0355 100644 (file)
--- a/trb_net16_endpoint_standalone_sctrl.vhd
+++ b/trb_net16_endpoint_standalone_sctrl.vhd
@@ -338,12 +338,19 @@ begin
 -------------------------------------------------
 -- Common Status Register
 -------------------------------------------------
+--  proc_gen_common_stat_regs : process(REGIO_COMMON_STAT_REG_IN, temperature_i, buf_stat_onewire)
+--    begin
+--      buf_COMMON_STAT_REG_IN                 <= REGIO_COMMON_STAT_REG_IN;
+--      buf_COMMON_STAT_REG_IN(31 downto 20)   <= temperature_i;
+--      buf_COMMON_STAT_REG_IN(131 downto 128) <= std_logic_vector(link_and_reset_status(3 downto 0));
+--      buf_COMMON_STAT_REG_IN(319 downto 288) <= buf_stat_onewire;
+--    end process;
+
   proc_gen_common_stat_regs : process(REGIO_COMMON_STAT_REG_IN, temperature_i, buf_stat_onewire)
     begin
-      buf_COMMON_STAT_REG_IN                 <= REGIO_COMMON_STAT_REG_IN;
+      buf_COMMON_STAT_REG_IN                 <= (others => '0');
       buf_COMMON_STAT_REG_IN(31 downto 20)   <= temperature_i;
-      buf_COMMON_STAT_REG_IN(131 downto 128) <= std_logic_vector(link_and_reset_status(3 downto 0));
-      buf_COMMON_STAT_REG_IN(319 downto 288) <= buf_stat_onewire;
+      buf_COMMON_STAT_REG_IN(159 downto 32)  <= REGIO_COMMON_STAT_REG_IN(159 downto 32);
     end process;