SI5345_OUT7_P : in std_logic; -- 100 MHz
SI5345_OUT7_N : in std_logic;
- MPOD_RX1_RESET_N : out STD_LOGIC;
- MPOD_RX2_RESET_N : out STD_LOGIC;
- MPOD_TX1_RESET_N : out STD_LOGIC;
- MPOD_TX2_RESET_N : out STD_LOGIC;
+ MPOD_RX1_RESET_N : out std_logic;
+ MPOD_RX2_RESET_N : out std_logic;
+ MPOD_TX1_RESET_N : out std_logic;
+ MPOD_TX2_RESET_N : out std_logic;
SI5345_RST_N : out std_logic;
SI5345_I2C_SEL : out std_logic;
SI5345_LOL_N : in std_logic;
- PCA9546A_DEVS_RESET_N : out STD_LOGIC;
- PCA9546A_PCIE_RESET_N : out STD_LOGIC;
- PEX_I2C_SEL0 : out STD_LOGIC;
- PEX_I2C_SEL1 : out STD_LOGIC;
- UC_RESET_N : out STD_LOGIC;
+ PCA9546A_DEVS_RESET_N : out std_logic;
+ PCA9546A_PCIE_RESET_N : out std_logic;
+ PEX_I2C_SEL0 : out std_logic;
+ PEX_I2C_SEL1 : out std_logic;
+ UC_RESET_N : out std_logic;
MGTREFCLK_P : in std_logic; -- 100 MHz, sync. with SI5345_IN0_P
MGTREFCLK_N : in std_logic;