*** empty log message ***

diff --git a/tdc_test/trb3_periph.prj b/tdc_test/trb3_periph.prj
index 49fb6015bcbe2947d422e22a2a160d20efecee2b..1b5add24cf5cfec9da0ef1818b3f9dd88dad7293 100644 (file)
--- a/tdc_test/trb3_periph.prj
+++ b/tdc_test/trb3_periph.prj
@@ -141,15 +141,19 @@ add_file -vhdl -lib "work" "../base/cores/pll_in200_out100.vhd"
 add_file -vhdl -lib "work" "source/Adder_304.vhd"
 add_file -vhdl -lib "work" "source/bit_sync.vhd"
 add_file -vhdl -lib "work" "source/Channel.vhd"
+
 #add_file -vhdl -lib "work" "source/Encoder_304_Bit.vhd"
-#add_file -vhdl -lib "work" "source/Encoder_304_ROMsuz.vhd"
-add_file -vhdl -lib "work" "source/Encoder_304_Sngl_ROMsuz.vhd"
+add_file -vhdl -lib "work" "source/Encoder_304_ROMsuz.vhd"
+#add_file -vhdl -lib "work" "source/Encoder_304_Sngl_ROMsuz.vhd"
+
 add_file -vhdl -lib "work" "source/FIFO_32x512_OutReg.vhd"
 add_file -vhdl -lib "work" "source/Reference_channel.vhd"
 add_file -vhdl -lib "work" "source/reset_generator.vhd"
+
 #add_file -vhdl -lib "work" "source/ROM_Encoder.vhd"
+
 add_file -vhdl -lib "work" "source/ROM_FIFO.vhd"
-#add_file -vhdl -lib "work" "source/signal_sync.vhd"
+
 add_file -vhdl -lib "work" "source/TDC.vhd"
 add_file -vhdl -lib "work" "source/trb3_periph.vhd"
 add_file -vhdl -lib "work" "source/up_counter.vhd"