update prj files

diff --git a/cbmrich/trb5sc_cbmrich.prj b/cbmrich/trb5sc_cbmrich.prj
index 728ad6a53af5a9061679f318c2ec4802341f6492..79ced77c490e3181ed561ed3996774cbcb611ecd 100644 (file)
--- a/cbmrich/trb5sc_cbmrich.prj
+++ b/cbmrich/trb5sc_cbmrich.prj
@@ -117,7 +117,6 @@ add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd"
 add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
 add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd"
-add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd"

diff --git a/gbe_standalone/trb5sc_gbe_template.prj b/gbe_standalone/trb5sc_gbe_template.prj
index 9cd3de699acf2085de29705090dea2c45b51a02e..bd8fe469949d2e43b8f08c0a887867f37f1f1ce9 100644 (file)
--- a/gbe_standalone/trb5sc_gbe_template.prj
+++ b/gbe_standalone/trb5sc_gbe_template.prj
@@ -105,7 +105,6 @@ add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd"
 add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
 add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd"
-add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd"

diff --git a/mimosis/trb5sc_mimosis.prj b/mimosis/trb5sc_mimosis.prj
index ccbecb75caa8999eb9cba25c220b565ca1023bce..45d1a4c458c001d670497770c3688b0211f98bf3 100644 (file)
--- a/mimosis/trb5sc_mimosis.prj
+++ b/mimosis/trb5sc_mimosis.prj
@@ -107,7 +107,6 @@ add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
 add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/common_i2c.vhd"
-add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd"

diff --git a/or_logic_rj45/trb5sc_or_logic_rj45.prj b/or_logic_rj45/trb5sc_or_logic_rj45.prj
index e6964efde1cac1b9d4e776ee31dd192420d728b1..9f634b52edc96d7b5785cff2d06adbce45ef8b2a 100644 (file)
--- a/or_logic_rj45/trb5sc_or_logic_rj45.prj
+++ b/or_logic_rj45/trb5sc_or_logic_rj45.prj
@@ -103,7 +103,6 @@ add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd"
 add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
 add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd"
-add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd"

diff --git a/tdc16clk/trb5sc_mdctdc.prj b/tdc16clk/trb5sc_mdctdc.prj
index f04d56403f6a6d0d8f0c056c57adf0b4d0d64ff5..e9741b42e230f3eb5b4dcbaca301add0ce1067f8 100644 (file)
--- a/tdc16clk/trb5sc_mdctdc.prj
+++ b/tdc16clk/trb5sc_mdctdc.prj
@@ -102,7 +102,6 @@ add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd"
 add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
 add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd"
-add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd"

diff --git a/template/trb5sc_template.prj b/template/trb5sc_template.prj
index ab9a75ddcd08846ec1120c1b0512beb5876dba05..5fa2ccd1853be2e2c7a33f15e53f54b52aacb97e 100644 (file)
--- a/template/trb5sc_template.prj
+++ b/template/trb5sc_template.prj
@@ -103,7 +103,6 @@ add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd"
 add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
 add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd"
-add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd"
@@ -148,10 +147,10 @@ add_file -vhdl -lib work "../../trbnet/media_interfaces/med_ecp5_sfp_sync.vhd"
 
 #########################################
 #channel 0, backplane
-#add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_0/serdes_sync_0.vhd"      
+add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_0/serdes_sync_0.vhd"      
 
 #channel 1, SFP
-add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_1/serdes_sync_0.vhd"
+#add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_1/serdes_sync_0.vhd"
 ##########################################
 
 add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/pcs.vhd"