replaced all ndelay(20) by udelay(UDELAY_TIME) UDELAY_TIME=1

diff --git a/pexor/kernel-module/pexor_trb.c b/pexor/kernel-module/pexor_trb.c
index bdf87da36805eead82e2b45ee27de1731a89045e..ab59b7a109a49e6832e9a3ef7fa9fcef55a83e56 100644 (file)
--- a/pexor/kernel-module/pexor_trb.c
+++ b/pexor/kernel-module/pexor_trb.c
@@ -80,6 +80,7 @@ struct dev_pexor
 #define PEXOR_DMA_MAXPOLLS  10000000
 #define PEXOR_DMA_POLLDELAY 0
 #define PEXOR_MEMWRITE_SIZE 128
+#define UDELAY_TIME         1 
 
 struct pexor_dma
 {
@@ -222,14 +223,6 @@ static DEVICE_ATTR(codeversion,
                    NULL
                    );
 
-#ifdef PEXOR_WITH_SFP
-static DEVICE_ATTR(sfpregs, 
-                   S_IRUGO, 
-                   pexor_sysfs_sfpregs_show, 
-                   NULL
-                   );
-#endif
-
 static atomic_t pexor_numdevs = ATOMIC_INIT(0);
 
 /* ---------------------------------------------------------------------- */
@@ -270,24 +263,11 @@ ssize_t pexor_sysfs_codeversion_show(struct device* dev,
                                      struct device_attribute* attr, 
                                      char* buf)
 {
-  char vstring[256];
-  ssize_t curs = 0;
-#ifdef PEXOR_WITH_SFP
-  struct dev_pexor* pg;
-#endif
-  struct pexor_privdata* privdata;
-  privdata = (struct pexor_privdata* )dev_get_drvdata(dev);
-  curs = snprintf(vstring, 256,
+  return snprintf(buf, PAGE_SIZE,
                   "*** This is PEXOR driver version %s build on %s at %s \n\t",
                   PEXORVERSION, __DATE__, __TIME__);
-#ifdef PEXOR_WITH_SFP
-  pg = &(privdata->pexor);
-  pexor_show_version(&(pg->sfp), vstring + curs);
-#endif
-  return snprintf(buf, PAGE_SIZE, "%s\n", vstring);
 }
 
-
 void test_pci(struct pci_dev* dev)
 {
   int bar = 0;
@@ -396,9 +376,6 @@ void cleanup_device(struct pexor_privdata* priv)
 
   /* sysfs device cleanup */
   if (priv->class_dev) {
-#ifdef PEXOR_WITH_SFP
-    device_remove_file(priv->class_dev, &dev_attr_sfpregs);
-#endif
     device_remove_file(priv->class_dev, &dev_attr_codeversion);
     device_destroy(pexor_class, priv->devno);
     priv->class_dev = 0;
@@ -453,10 +430,6 @@ void set_pexor(struct dev_pexor* pg,
     return;
   dmabase = membase + PEXOR_DMA_BASE;
 
-#ifdef PEXOR_WITH_SFP
-  set_sfp(&(pg->sfp), membase, bar);
-#endif
-
   pg->dma_control_stat = (u32* ) (dmabase + (PEXOR_TRB_DMA_CTL << 2));
   pg->dma_source = (u32* ) (dmabase + 0xff0);
   pg->dma_dest = (u32* ) (dmabase + (PEXOR_TRB_DMA_ADD << 2));
@@ -626,14 +599,6 @@ static int probe(struct pci_dev* dev,
       pexor_msg(KERN_ERR
                 "Could not add device file node for code version.\n");
     }
-
-#ifdef PEXOR_WITH_SFP
-    if (device_create_file(privdata->class_dev, &dev_attr_sfpregs) != 0) {
-      pexor_msg(KERN_ERR
-                "Could not add device file node for sfp registers.\n");
-    }
-#endif
-
   } else {
     /* something was wrong at class creation, we skip sysfs device 
        support here: */
@@ -856,7 +821,7 @@ int pexor_ioctl_read_register(struct pexor_privdata* priv,
 
   val = ioread32(ad);
   rmb();
-  ndelay(20);
+  udelay(UDELAY_TIME);
   pexor_dbg(KERN_NOTICE
             "** pexor_ioctl_read_register read value %x from mapped "
             "PCI address %p !\n", val, ad);
@@ -910,7 +875,7 @@ int pexor_ioctl_write_register(struct pexor_privdata* priv,
             "** pexor_ioctl_write_register writes value %x to mapped "
             "PCI address %p !\n", val, ad);
   iowrite32_mb(val, ad);
-  ndelay(20);
+  udelay(UDELAY_TIME);
   
  OUT_WRITE_REG:
   spin_unlock((&(priv->dma_lock)));
@@ -1232,11 +1197,11 @@ int pexor_ioctl_trbnet_request(struct pexor_privdata* priv,
                  priv->pexor.trbnet_sender_data[3]);
     iowrite32_mb(descriptor.arg0 & 0xffff, priv->pexor.trbnet_sender_data[3]);
     iowrite32_mb(0x00000000, priv->pexor.trbnet_sender_data[3]);
-    ndelay(20);
+    udelay(UDELAY_TIME);
     iowrite32_mb((((u32) descriptor.trb_address << 16) |
                   PEXOR_TRB_CMD_REGISTER_WRITE),
                  priv->pexor.trbnet_sender_ctl[3]);
-    ndelay(20);
+    udelay(UDELAY_TIME);
     break;
 
   case PEXOR_TRBNETCOM_REG_WRITE_MEM:
@@ -1264,11 +1229,11 @@ int pexor_ioctl_trbnet_request(struct pexor_privdata* priv,
                      priv->pexor.trbnet_sender_data[3]);
         iowrite32_mb(0x00000000, priv->pexor.trbnet_sender_data[3]);
       }
-      ndelay(20);
+      udelay(UDELAY_TIME);
       iowrite32_mb((((u32) descriptor.trb_address << 16) |
                     PEXOR_TRB_CMD_REGISTER_WRITE_MEM),
                    priv->pexor.trbnet_sender_ctl[3]);
-      ndelay(20);
+      udelay(UDELAY_TIME);
     }
     break;
 
@@ -1279,11 +1244,11 @@ int pexor_ioctl_trbnet_request(struct pexor_privdata* priv,
     iowrite32_mb(0x00000000, priv->pexor.trbnet_sender_data[3]);
     iowrite32_mb(0x00000000, priv->pexor.trbnet_sender_data[3]);
     iowrite32_mb(0x00000000, priv->pexor.trbnet_sender_data[3]);
-    ndelay(20);
+    udelay(UDELAY_TIME);
     iowrite32_mb((((u32) descriptor.trb_address << 16) |
                   PEXOR_TRB_CMD_REGISTER_READ),
                  priv->pexor.trbnet_sender_ctl[3]);
-    ndelay(20);    
+    udelay(UDELAY_TIME);    
     break;
     
   case PEXOR_TRBNETCOM_REG_READ_MEM:
@@ -1293,11 +1258,11 @@ int pexor_ioctl_trbnet_request(struct pexor_privdata* priv,
     iowrite32_mb(descriptor.arg0, priv->pexor.trbnet_sender_data[3]);
     iowrite32_mb(0x00000000, priv->pexor.trbnet_sender_data[3]);
     iowrite32_mb(0x00000000, priv->pexor.trbnet_sender_data[3]);
-    ndelay(20);    
+    udelay(UDELAY_TIME);    
     iowrite32_mb((((u32) descriptor.trb_address << 16) |
                   PEXOR_TRB_CMD_REGISTER_READ_MEM),
                  priv->pexor.trbnet_sender_ctl[3]);
-    ndelay(20);
+    udelay(UDELAY_TIME);
     break;
 
   case PEXOR_TRBNETCOM_READ_UID:
@@ -1307,11 +1272,11 @@ int pexor_ioctl_trbnet_request(struct pexor_privdata* priv,
     iowrite32_mb(0x00000000, priv->pexor.trbnet_sender_data[3]);
     iowrite32_mb(0x00000000, priv->pexor.trbnet_sender_data[3]);
     iowrite32_mb(0x00000000, priv->pexor.trbnet_sender_data[3]);
-    ndelay(20);
+    udelay(UDELAY_TIME);
     iowrite32_mb((((u32) descriptor.trb_address << 16) |
                   PEXOR_TRB_CMD_NETADMINISTRATION),
                  priv->pexor.trbnet_sender_ctl[3]);
-    ndelay(20);
+    udelay(UDELAY_TIME);
     break;
 
   case PEXOR_TRBNETCOM_SET_ADDRESS:
@@ -1332,12 +1297,13 @@ int pexor_ioctl_trbnet_request(struct pexor_privdata* priv,
     break;
 
   case PEXOR_TRBNETCOM_IPU_DATA_READ:
-    iowrite32_mb(((descriptor.arg1 & 0xff) << 24) | (descriptor.arg2 & 0xffffff),
+    iowrite32_mb((((descriptor.arg1 & 0xff) << 24) | 
+                  (descriptor.arg2 & 0xffffff)),
                  priv->pexor.trbnet_sender_err[1]);
-    ndelay(20);
+    udelay(UDELAY_TIME);
     iowrite32_mb((descriptor.arg0 & 0x0f) | PEXOR_TRB_CMD_SHORT_TRANSFER,
                  priv->pexor.trbnet_sender_ctl[1]);
-    ndelay(20);
+    udelay(UDELAY_TIME);
     channel = 1;
     break;
 
@@ -1347,10 +1313,10 @@ int pexor_ioctl_trbnet_request(struct pexor_privdata* priv,
                  priv->pexor.trbnet_sender_err[0]);
     iowrite32_mb((descriptor.arg1 >> 8) & 0xffff,
                  priv->pexor.trbnet_sender_trigger_info);
-    ndelay(20);
+    udelay(UDELAY_TIME);
     iowrite32_mb((descriptor.arg0 & 0x0f) | PEXOR_TRB_CMD_SHORT_TRANSFER,
                  priv->pexor.trbnet_sender_ctl[0]);
-    ndelay(20);
+    udelay(UDELAY_TIME);
     channel = 0;
     break;
 
@@ -1413,7 +1379,7 @@ int pexor_ioctl_trbnet_request(struct pexor_privdata* priv,
                     (unsigned int)dmastat);
           /* reset DMA */
           iowrite32_mb(PEXOR_TRB_DMA_RESET, priv->pexor.dma_control_stat);
-          ndelay(1000);
+          udelay(1000);
           /* do we need to flush the fifo-buffer, no libtrbnet takes care */
           status = -201;
           goto OUT_IOCTL;
@@ -1431,12 +1397,12 @@ int pexor_ioctl_trbnet_request(struct pexor_privdata* priv,
       if (loops == PEXOR_DMA_MAXPOLLS) {
         pexor_msg(KERN_ERR
                   "ERROR> wait_dma_complete: polling longer than %d cycles "
-                  "(delay %d ns) for dma complete! Status: 0x%08x\n",
+                  "(udelay %d mus) for dma complete! Status: 0x%08x\n",
                   PEXOR_DMA_MAXPOLLS, PEXOR_DMA_POLLDELAY,
                   (unsigned int)dmastat);
         /* reset DMA */
         iowrite32_mb(PEXOR_TRB_DMA_RESET, priv->pexor.dma_control_stat);
-        ndelay(1000);
+        udelay(1000);
         /* do we need to flush the fifo-buffer, no libtrbnet takes care */
         status = -202;
         goto OUT_IOCTL;
@@ -1453,7 +1419,7 @@ int pexor_ioctl_trbnet_request(struct pexor_privdata* priv,
                   "ERROR> no more DMA buffers available, aborting DMA\n");
         /* reset DMA */
         iowrite32_mb(PEXOR_TRB_DMA_RESET, priv->pexor.dma_control_stat);
-        ndelay(1000);
+        udelay(1000);
         /* do we need to flush the fifo-buffer, no libtrbnet takes care */
         status = -203;
         goto OUT_IOCTL;