##### ADC ######
FPGA="0x0200"
-trbcmd w $FPGA 0xa010 0xff #Buffer depth
-trbcmd w $FPGA 0xa011 8 #Samples after trigger
-trbcmd w $FPGA 0xa012 1 #Process blocks
-trbcmd w $FPGA 0xa013 0x10028 #Trigger offset, invert
-trbcmd w $FPGA 0xa014 40 #Readout offset
-trbcmd w $FPGA 0xa015 0 #Downsampling
-trbcmd w $FPGA 0xa016 8 #Baseline
-trbcmd w $FPGA 0xa017 0 #Trigger Enable ch31-00
-trbcmd w $FPGA 0xa018 0 #Trigger Enable ch47-32
-trbcmd w $FPGA 0xa01a 0xfffffffe #Channel disable ch31-00, all channels except ch0
-trbcmd w $FPGA 0xa01b 0xffff #Channel disable ch47-32
-trbcmd w $FPGA 0xa01c 0 #Processing mode 0=BlockMode, 1=PSA, 2=CFD
-trbcmd w $FPGA 0xa01d 0x340 #CFD delay is 3, CFD window 64=0x40
-
-trbcmd w $FPGA 0xa020 1 #Sum values
-trbcmd w $FPGA 0xa021 1 #Sum values
-trbcmd w $FPGA 0xa022 1 #Sum values
-trbcmd w $FPGA 0xa023 1 #Sum values
-trbcmd w $FPGA 0xa024 0xff #word count
-trbcmd w $FPGA 0xa025 0 #word count
-trbcmd w $FPGA 0xa026 0 #word count
-trbcmd w $FPGA 0xa027 0 #word count
-
-trbcmd w $FPGA 0xa000 0x100 #Reset Baseline
+#trbcmd w $FPGA 0xa010 0xff #Buffer depth
+#trbcmd w $FPGA 0xa011 8 #Samples after trigger
+#trbcmd w $FPGA 0xa012 1 #Process blocks
+#trbcmd w $FPGA 0xa013 0x10028 #Trigger offset, invert
+#trbcmd w $FPGA 0xa014 40 #Readout offset
+#trbcmd w $FPGA 0xa015 0 #Downsampling
+#trbcmd w $FPGA 0xa016 8 #Baseline
+#trbcmd w $FPGA 0xa017 0 #Trigger Enable ch31-00
+#trbcmd w $FPGA 0xa018 0 #Trigger Enable ch47-32
+#trbcmd w $FPGA 0xa01a 0xfffffffe #Channel disable ch31-00, all channels except ch0
+#trbcmd w $FPGA 0xa01b 0xffff #Channel disable ch47-32
+#trbcmd w $FPGA 0xa01c 0 #Processing mode 0=BlockMode, 1=PSA, 2=CFD
+#trbcmd w $FPGA 0xa01d 0x340 #CFD delay is 3, CFD window 64=0x40
+
+#trbcmd w $FPGA 0xa020 1 #Sum values
+#trbcmd w $FPGA 0xa021 1 #Sum values
+#trbcmd w $FPGA 0xa022 1 #Sum values
+#trbcmd w $FPGA 0xa023 1 #Sum values
+#trbcmd w $FPGA 0xa024 0xff #word count
+#trbcmd w $FPGA 0xa025 0 #word count
+#trbcmd w $FPGA 0xa026 0 #word count
+#trbcmd w $FPGA 0xa027 0 #word count
+
+#trbcmd w $FPGA 0xa000 0x100 #Reset Baseline
##### CTS #######
--- /dev/null
+#!/bin/sh
+# PATH should already be marked as exported...
+PATH=${HOME}/trbsoft/bin:${PATH}
+PATH=${HOME}/trbsoft/daqdata/bin:${PATH}
+PATH=${HOME}/trbsoft/trbnettools/bin:${PATH}
+export TRB3_SERVER=trb019
+export DAQOPSERVER=localhost:0
+
+pgrep dnsmasq > /dev/null
+if [[ $? != 0 ]]; then
+ echo "No DHCP server found, skipping setup (but exports done)."
+ return
+fi
+
+pgrep trbnetd > /dev/null
+if [[ $? = 0 ]]; then
+ echo "trbnetd already running, skipping setup (but exports done)."
+ return
+fi
+trbnetd
+
+
+##### TRBNET #####
+# set the TRBNet addresses of the Endpoints
+trbcmd s 0x9100000337edaa28 0 0x0200
+trbcmd s 0x1900000337dff228 1 0x0201
+trbcmd s 0xf700000337df5428 2 0x0202
+trbcmd s 0xe300000337def328 3 0x0203
+trbcmd s 0xe100000337dff928 5 0x8000
+
+##### Ethernet and UDP #######
+trbcmd w 0x8000 0x8300 0x8000
+trbcmd w 0x8000 0x8301 0x00020001
+trbcmd w 0x8000 0x8302 0x00030062
+trbcmd w 0x8000 0x8303 0xea60
+trbcmd w 0x8000 0x8304 0x578
+trbcmd w 0x8000 0x8305 0x1
+trbcmd w 0x8000 0x8306 0x0
+trbcmd w 0x8000 0x8307 0x0
+trbcmd w 0x8000 0x8308 0xffffff
+trbcmd w 0x8000 0x830b 0x7
+trbcmd w 0x8000 0x830d 0x0
+
+#mac address of the EB
+# 14:fe:b5:ec:10:9a (normandy)
+#trbcmd w 0x8000 0x8100 0xb5ec109a # lower 4 bytes
+#trbcmd w 0x8000 0x8101 0x14fe # upper byte
+# 00:19:b9:0a:ad:e2 (a2trb)
+trbcmd w 0x8000 0x8100 0xb90aade2 # lower 4 bytes
+trbcmd w 0x8000 0x8101 0x0019 # upper byte
+
+# destination port and source IP and so on
+trbcmd w 0x8000 0x8102 0xc0a80101
+trbcmd w 0x8000 0x8103 0xc350
+trbcmd w 0x8000 0x8104 0xdead8001
+trbcmd w 0x8000 0x8105 0x0230
+trbcmd w 0x8000 0x8106 0xc0a80072
+trbcmd w 0x8000 0x8107 0xc350
+trbcmd w 0x8000 0x8108 0x0578
+
+
+##### TDC #######
+#trbcmd w 0x0200 0xc800 0x00000001 ## logic analyser control register
+#trbcmd w 0x0200 0xc801 0x000f0005 ## trigger window enable & trigger window width
+#trbcmd w 0x0200 0xc802 0x00000000 ## channel 01-31 enable
+#trbcmd w 0x0200 0xc803 0x00000000 ## channel 32-63 enable
+#trbcmd w 0x0200 0xc804 0x00000080 ## no read out limit
+
+
+#trbcmd w 0x0200 0xc2 0x0000ffff ## channel 01-31 enable
+
+#trbcmd w 0x8000 0xc800 0x00000001 # logic analyser control register
+#trbcmd w 0x8000 0xc801 0x000f0005 # trigger window enable & trigger window width (off if MSB not set)
+#trbcmd w 0x8000 0xc802 0x00000002 # channel 32- 1 enable (0 is reference time and always on)
+#trbcmd w 0x8000 0xc803 0x00000000 # channel 64-33 enable
+#trbcmd w 0x8000 0xc804 0x00000080 ## no read out limit
+
+##### ADC ######
+FPGA="0x0200"
+trbcmd w $FPGA 0xa010 0xff #Buffer depth
+trbcmd w $FPGA 0xa011 8 #Samples after trigger
+trbcmd w $FPGA 0xa012 1 #Process blocks
+trbcmd w $FPGA 0xa013 0x10028 #Trigger offset, invert
+trbcmd w $FPGA 0xa014 40 #Readout offset
+trbcmd w $FPGA 0xa015 0 #Downsampling
+trbcmd w $FPGA 0xa016 8 #Baseline
+trbcmd w $FPGA 0xa017 0 #Trigger Enable ch31-00
+trbcmd w $FPGA 0xa018 0 #Trigger Enable ch47-32
+trbcmd w $FPGA 0xa01a 0xfffffffe #Channel disable ch31-00, all channels except ch0
+trbcmd w $FPGA 0xa01b 0xffff #Channel disable ch47-32
+trbcmd w $FPGA 0xa01c 0 #Processing mode 0=BlockMode, 1=PSA, 2=CFD
+trbcmd w $FPGA 0xa01d 0x340 #CFD delay is 3, CFD window 64=0x40
+
+trbcmd w $FPGA 0xa020 1 #Sum values
+trbcmd w $FPGA 0xa021 1 #Sum values
+trbcmd w $FPGA 0xa022 1 #Sum values
+trbcmd w $FPGA 0xa023 1 #Sum values
+trbcmd w $FPGA 0xa024 0xff #word count
+trbcmd w $FPGA 0xa025 0 #word count
+trbcmd w $FPGA 0xa026 0 #word count
+trbcmd w $FPGA 0xa027 0 #word count
+
+trbcmd w $FPGA 0xa000 0x100 #Reset Baseline
+
+
+##### CTS #######
+trbcmd w 0x8000 0xa150 0x05f5e100 #set CTS pulser to 1Hz
+#trbcmd setbit 0x8000 0xa101 0x2 #enable pulser channel 0
+trbcmd setbit 0x8000 0xa101 0x1 # enable external trigger module
+
+echo "Successfully setup TRB network"
--- /dev/null
+#!/usr/bin/perl
+if ($ENV{'SERVER_SOFTWARE'} =~ /HTTPi/i) {
+ print "HTTP/1.0 200 OK\n";
+ print "Content-type: text/html\r\n\r\n";
+} else {
+ use lib '..';
+ use if (!($ENV{'SERVER_SOFTWARE'} =~ /HTTPi/i)), apacheEnv;
+ print "Content-type: text/html\n\n";
+}
+
+use CGI ':standard';
+use XML::LibXML;
+use POSIX;
+use CGI::Carp qw(fatalsToBrowser);
+
+use lib qw|../commands htdocs/commands|;
+use xmlpage;
+
+my $page;
+
+$page->{title} = "ADC CFD AddOn";
+$page->{link} = "../";
+
+my @setup;
+
+push(@setup,({name => "Control",
+ cmd => "ADC_CFD-0xfe4b-Control",
+ period => 1000,
+ address => 1}));
+
+push(@setup,({name => "Input",
+ cmd => "ADC_CFD-0xfe4b-InputHandler&ADC-0xfe4b-InvalidWords",
+ period => 1000,
+ address => 1}));
+
+push(@setup,({name => "BufferConfig",
+ cmd => "ADC_CFD-0xfe4b-BufferConfig",
+ period => 1000,
+ address => 1}));
+
+push(@setup,({name => "LastValues",
+ cmd => "ADC_CFD-0xfe4b-LastValues",
+ period => 1000,
+ address => 1}));
+
+push(@setup,({name => "Baseline",
+ cmd => "ADC_CFD-0xfe4b-Baseline",
+ period => 1000,
+ address => 1}));
+
+
+xmlpage::initPage(\@setup,$page);
+
+
+
+
+1;
<li><a href="tools/billboard.pl">Billboard</a>
<li><a href="tools/cbmmbs.pl">CBM-MBS Receiver</a>
<li><a href="addons/adc.pl">48ch sampling ADC</a>
+<li><a href="addons/adc_cfd.pl">48ch sampling ADC CFD</a>
<li><a href="network/generic.pl">Everything else</a>
</ul>
</div>
--- /dev/null
+<?xml version="1.0" encoding="utf-8" ?>
+<TrbNetEntity xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
+ xsi:noNamespaceSchemaLocation="../schema/TrbNetEntity.xsd"
+ name="ADC_CFD"
+ address="a000"
+ >
+ <description>Control and Status registers related to ADC AddOn, CFD variant</description>
+
+ <group name="Control"
+ address="0000" size="7" purpose="config" mode="rw" continuous="false">
+ <description>Configuration registers</description>
+ <register name="BufferControl" address="0001" >
+ <description>Stop writing to buffers</description>
+ <field name="BaselineOn" start="4" bits="1" format="boolean" errorflag="true">
+ <description>Baseline calculation always on (not just when no signal found)</description>
+ </field>
+ </register>
+ </group>
+
+ <group name="BufferConfig"
+ address="0010" size="16" purpose="config" mode="rw" continuous="true">
+ <description>Configuration of buffer handling</description>
+ <register name="DebugSamples" address="0000" >
+ <description>Number of samples to output in DebugMode>0</description>
+ <field name="DebugSamples" start="0" bits="8" format="unsigned" noflag="true"/>
+ </register>
+
+ <register name="TriggerDelay" address="0001" >
+ <description>Delay of trigger for event readout</description>
+ <field name="TriggerDelay" start="0" bits="12" format="unsigned" unit="ns" scale="10" noflag="true"/>
+ </register>
+
+ <register name="InputSetting" address="0003" >
+ <description>Settings of trigger signal generation</description>
+ <field name="InputThreshold" start="0" bits="10" format="unsigned" noflag="true" >
+ <description>Offset from the calculated baseline to be reached for signal detection</description>
+ </field>
+ <field name="PolarityInvert" start="17" bits="1" format="bitmask" noflag="true">
+ <description>Selects positive (unset) or negative (set) signal inputs.</description>
+ </field>
+ </register>
+
+ <register name="BaselineAvg" address="0006" >
+ <description>Averaging time for baseline calculation. 2**N samples are taken. Baseline is calculated from buffer output data, triggered events are suppressed.</description>
+ <field name="BaselineAvg" start="0" bits="4" format="unsigned" noflag="true" />
+ </register>
+
+ <register name="TriggerEnable0" address="0007" >
+ <description>Trigger enable for channels 31 - 0</description>
+ <field name="TriggerEnable0" start="0" bits="32" format="bitmask" noflag="true" />
+ </register>
+ <register name="TriggerEnable1" address="0008" >
+ <description>Trigger enable for channels 47 - 32</description>
+ <field name="TriggerEnable1" start="0" bits="16" format="bitmask" noflag="true" />
+ </register>
+ <register name="WordChecker" address="0009" >
+ <description>Check incoming words for validity. Two accepted words can be specified.</description>
+ <field name="Word1Check" start="0" bits="10" format="hex" noflag="true" />
+ <field name="Word2Check" start="16" bits="10" format="hex" noflag="true" />
+ <field name="WordCheckEnable" start="31" bits="1" format="boolean" />
+ </register>
+ <register name="ChannelDisable0" address="000a" >
+ <description>Channel disable for channels 31 - 0</description>
+ <field name="ChannelDisable0" start="0" bits="32" format="bitmask" noflag="true" />
+ </register>
+ <register name="ChannelDisable1" address="000b" >
+ <description>Channel disable for channels 47 - 32</description>
+ <field name="ChannelDisable1" start="0" bits="16" format="bitmask" noflag="true" />
+ </register>
+ <register name="DebugMode" address="000c" >
+ <description>Debug data processing</description>
+ <field name="DebugMode" start="0" bits="2" format="enum" noflag="true" >
+ <enumItem value="0">Normal CFD mode</enumItem>
+ <enumItem value="1">Debug raw input</enumItem>
+ <enumItem value="2">Debug subtracted input</enumItem>
+ <enumItem value="3">Debug CFD signal</enumItem>
+ </field>
+ </register>
+ <register name="CFD" address="000d" >
+ <description>Constant Fraction Discriminator config</description>
+ <field name="CFDIntegrateWindow" start="0" bits="8" format="unsigned" noflag="true" />
+ <field name="CFDDelay" start="8" bits="5" format="unsigned" noflag="true" />
+ <field name="CFDMult" start="13" bits="4" format="unsigned" noflag="true" />
+ <field name="CFDMultDly" start="17" bits="4" format="unsigned" noflag="true" />
+ </register>
+ </group>
+
+ <group name="InputHandler"
+ address="0030" size="12" purpose="status" mode="r" continuous="true">
+ <register name="WordCount" address="0000" repeat="12" >
+ <description>Counter of words from ADC</description>
+ <field name="WordCount" start="4" bits="28" format="unsigned" noflag="true" rate="true" />
+ </register>
+ </group>
+
+ <group name="LastValues" address="0800" size="48" purpose="status" mode="r" continuous="true">
+ <register name="LastValue" address="0000" repeat="48" >
+ <description>Last value read from ADC</description>
+ <field name="LastValue" start="0" bits="10" format="unsigned" noflag="true" />
+ </register>
+ </group>
+
+ <group name="Baselines" address="0840" size="48" purpose="status" mode="r" continuous="true">
+ <register name="Baseline" address="0000" repeat="48" >
+ <description>The current calculated baseline of the ADC value</description>
+ <field name="Baseline" start="0" bits="18" format="unsigned" noflag="true" />
+ </register>
+ </group>
+
+ <group name="InvalidWords_group" address="08C0" size="48" purpose="status" mode="r" continuous="true">
+ <register name="InvalidWords" address="0000" repeat="48" >
+ <description>Number of words not matching the given pattern </description>
+ <field name="InvalidWords" start="0" bits="32" format="unsigned" errorflag="true" rate="true" />
+ </register>
+ </group>
+
+
+</TrbNetEntity>
jspc29 / daqtools.git / commitdiff