\documentclass{JINST}
-\usepackage{changes}
-\definechangesauthor[name={Cahit Ugur}, color=orange]{CU}
+%\usepackage{changes}
+%\definechangesauthor[name={Cahit Ugur}]{CU}
\title{TRB3: A 264 Channel High Precision TDC Platform and Its Applications}
-\author{J.~Adamczewski-Musch$^a$,
-M.~Hoek$^b$,
-W.~Koenig$^a$,
+\author{A.~Neiser$^a$\thanks{Corresponding author.},
+J.~Adamczewski-Musch$^b$,
+M.~Hoek$^a$,
+W.~Koenig$^b$,
G.~Korcyl$^c$,
-S.~Linev$^a$,
+S.~Linev$^b$,
L.~Maier$^d$,
J.~Michel$^e$,
-A.~Neiser$^b$\thanks{Corresponding author.},
M.~Palka$^c$,
M.~Penschuck$^e$,
-M.~Traxler$^a$,
-C.~U\u{g}ur$^a$,~
+M.~Traxler$^b$,
+C.~U\u{g}ur$^b$,~
and A.~Zink$^f$
\\
-\llap{$^a$} GSI Helmholtz Centre for Heavy Ion Research GmbH\\
-Planckstr. 1, Darmstadt, Germany\\
-\llap{$^b$} Institute of Nuclear Physics,\\
+\llap{$^a$} Institute of Nuclear Physics,\\
J.-J.-Becher Weg 45, Mainz, Germany\\
+\llap{$^b$} GSI Helmholtz Centre for Heavy Ion Research GmbH\\
+Planckstr. 1, Darmstadt, Germany\\
\llap{$^c$} Department of Physics, Astronomy and Applied
Informatics, Jagiellonian University\\
Reymonta 4, Cracow, Poland\\
\cite{dabc-web} which enables online monitoring and calibration of the
TRB3 read-out.
-Since the length of the total propagation delay on each delay line of the TDC
-depends highly on the specific placing and routing of the elements inside the
-FPGA, a proper calibration of this fine-time is necessary. This can be done
-simply by assuming that each element has the same propagation delay, but this
-limits the time precision to about $1$\,ns. \added[id=CU]{(where did you get
- this information from? From my measurements I get up to 40 ps precision. But
- sometimes there is the risk of getting double or more peaks. So this method
- is only for test purposes. I don't think this should be in the paper.)} If
-one assumes that the read-out clock is uncorrelated to the measured signals, a
-\emph{flat} fine-time histogram of all detected signals is expected. Any
-deviation must be due to different propagation delays, thus each element
-can be calibrated appropriately (details see \cite{ugur-twepp2011}). However,
-if the detector signal rate is not sufficient (leading to insufficient
-statistics in the fine-time histogram), artificial hits stemming from an
-uncorrelated signal source must be additionally generated and read-out. This
-technique is already available on the TRB3 and is currently under test.
+Since the length of the total propagation delay on each delay line of
+the TDC depends highly on the specific placing and routing of the
+elements inside the FPGA, a proper calibration of this fine-time is
+necessary. If one assumes that the read-out clock is uncorrelated to
+the measured signals, a \emph{flat} fine-time histogram of all
+detected signals is expected. Any deviation must be due to different
+propagation delays, thus each element can be calibrated appropriately
+(details see \cite{ugur-twepp2011}). However, if the detector signal
+rate is not sufficient (leading to insufficient statistics in the
+fine-time histogram), artificial hits stemming from an uncorrelated
+signal source must be additionally generated and read-out. This
+technique is already available on the TRB3 and is currently under
+test.
\section{Front-end Electronics}\label{sec:frontends}
\centering
\begin{minipage}{0.4\linewidth}
\centering
- \includegraphics[width=\textwidth]{gfx/frontends/padiwa_transparent.png}\\
+ \includegraphics[width=\textwidth]{gfx/frontends/padiwa}\\
(a)
\end{minipage}
\quad
front-end board following the COME\&KISS principle
(\cref{fig:padiwa}). It uses the LVDS input buffers of a Lattice
MachXO2 FPGA to realise a leading edge discriminator for $16$ analogue
-input signals. \replaced[id=CU]{Besides that, few standard components like $10$x
-MMIC wideband amplifiers and RC low-passes are used to generate the
-threshold voltages via PWM.}{Besides that, only standard components like an $10$x
-MMIC wideband amplifier and RC low-passes to generate the
-threshold voltages via PWM are used.} Using test pulses with an
-amplitude of $500$\,$\mu$V and a length of $6$\,ns, a time precision
-of the full system including the TRB3 of $23$\,ps was measured
+input signals. Besides that, few standard components like $10$x MMIC
+wideband amplifiers and RC low-passes are used to generate the
+threshold voltages via PWM. Using test pulses with an amplitude of
+$500$\,$\mu$V and a length of $6$\,ns, a time precision of the full
+system including the TRB3 of $23$\,ps was measured
\cite{ugur-twepp2012}. This front-end has been successfully used in
the test beamtimes, see \cref{sec:juelich,sec:mainz}.
platform. The detection of leading and trailing edge in a single TDC
channel, which doubles the number of channels per board for timestamp
and width measurements. This feature is highly desired for the
-described charge-to-width front-end. The temperature
-\replaced[id=CU]{independence}{stability} of the PaDiWa thresholds and of the
-TDC calibration is currently investigated. There are also two further
-front-end developments: Integration of the MuPix ASIC for the PANDA luminosity
-detector and the SPADIC ASIC for a TPC in Mainz. Since both ASICs use the
-CBMnet protocol, an implementation of CBMnet on the TRB3 was
-started. Furthermore, an extension of TrbNet with defined propagation delays
-of trigger signals for PANDA is being developed and tested.
+described charge-to-width front-end. The temperature independence of
+the PaDiWa thresholds and of the TDC calibration is currently
+investigated. There are also two further front-end developments:
+Integration of the MuPix ASIC for the PANDA luminosity detector and
+the SPADIC ASIC for a TPC in Mainz. Since both ASICs use the CBMnet
+protocol, an implementation of CBMnet on the TRB3 was started.
+Furthermore, an extension of TrbNet with defined propagation delays of
+trigger signals for PANDA is being developed and tested.
jspc29 / publication.git / commitdiff