add reboot via GbE to gbe_standalone design

diff --git a/gbe_standalone/trb3sc_standalone.vhd b/gbe_standalone/trb3sc_standalone.vhd
index 08656a7c0e7a31e31da605a92d457e25d8cf4abe..0b52b201e246629c7d25a53877d1b7be6b93b9ab 100644 (file)
--- a/gbe_standalone/trb3sc_standalone.vhd
+++ b/gbe_standalone/trb3sc_standalone.vhd
@@ -131,6 +131,7 @@ architecture trb3sc_arch of trb3sc_standalone is
 
   signal reboot_from_gbe            : std_logic;
   signal reset_via_gbe              : std_logic;
+  signal do_reboot_i                : std_logic;
   signal ctrlbus_rx, bussci_rx, bustools_rx, busrdo_rx, bustc_rx, busgbeip_rx, busgbereg_rx, bus_master_out  : CTRLBUS_RX;
   signal ctrlbus_tx, bussci_tx, bustools_tx, busrdo_tx, bustc_tx, busgbeip_tx, busgbereg_tx, bus_master_in   : CTRLBUS_TX;
   
@@ -398,7 +399,7 @@ THE_CLOCK_RESET :  entity work.clock_reset_handler
       FLASH_IN    => FLASH_OUT,
       FLASH_OUT   => FLASH_IN,
       PROGRAMN    => PROGRAMN,
-      REBOOT_IN   => common_ctrl_reg(15),
+      REBOOT_IN   => do_reboot_i,
       --SPI
       SPI_CS_OUT  => spi_cs,  
       SPI_MOSI_OUT=> spi_mosi,
@@ -428,6 +429,9 @@ THE_CLOCK_RESET :  entity work.clock_reset_handler
       DEBUG_OUT  => debug_tools
       );
 
+  do_reboot_i <= common_ctrl_reg(15) or reboot_from_gbe;
+      
+      
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