TICK_MS_OUT : out std_logic;
TICK_US_OUT : out std_logic;
--
- ENPIRION_CLOCK : out std_logic;
LED_RED_OUT : out std_logic;
LED_GREEN_OUT : out std_logic
);
signal timer : unsigned(15 downto 0) := (others => '0');
signal clear_n_i : std_logic;
signal reset_i : std_logic;
-signal clk_enpirion : std_logic;
-signal pll_enpirion_locked : std_logic;
-signal enpirion_clock_i : std_logic;
signal ms_counter : unsigned(16 downto 0);
signal ms_counter_done_x : std_logic;
---------------------------------------------------------------------------
-- Startup timer, generates inital reset
+-- this times only runs at powerup!
---------------------------------------------------------------------------
THE_START_TIMER_PROC: process
begin
CLEAR_IN => GLOBAL_RESET_IN,
CLEAR_N_IN => clear_n_i,
CLK_IN => CLK_IN,
- PLL_LOCKED_IN => pll_enpirion_locked,
+ PLL_LOCKED_IN => '1',
RESET_IN => RESET_FROM_NET_IN,
- TRB_RESET_IN => '0', -- unused,
- CLEAR_OUT => open,
RESET_OUT => reset_i
);
RESET_OUT <= reset_i;
RESET_N_OUT <= not reset_i;
- THE_ENPIRION_PLL: entity pll_dcdc
- port map(
- CLK => CLK_IN,
- CLKOP => clk_enpirion,
- LOCK => pll_enpirion_locked
- );
-
- THE_ENPIRION_PROC: process( clk_enpirion )
- begin
- if( rising_edge(clk_enpirion) ) then
- enpirion_clock_i <= not enpirion_clock_i;
- end if;
- end process THE_ENPIRION_PROC;
-
- ENPIRION_CLOCK <= enpirion_clock_i;
-
- LED_RED_OUT <= not reset_i;
- LED_GREEN_OUT <= not pll_enpirion_locked;
+ LED_RED_OUT <= not GLOBAL_RESET_IN;
+ LED_GREEN_OUT <= not reset_i;
end architecture clock_reset_handler_arch;
CLK_IN : in std_logic; -- raw master clock, NOT from PLL/DLL!\r
PLL_LOCKED_IN : in std_logic; -- master PLL lock signal (async)\r
RESET_IN : in std_logic; -- general reset signal\r
- TRB_RESET_IN : in std_logic; -- TRBnet reset signal\r
- CLEAR_OUT : out std_logic; -- async reset out, USE WITH CARE!\r
RESET_OUT : out std_logic -- synchronous reset out\r
);\r
end entity reset_handler;\r
signal reset : std_logic;\r
\r
signal reset_pulse : std_logic_vector(1 downto 0) := (others => '0');\r
- signal trb_reset_pulse : std_logic_vector(1 downto 0) := (others => '0');\r
signal comb_async_rst_n : std_logic;\r
\r
attribute syn_preserve : boolean;\r
- attribute syn_preserve of async_sampler : signal is true;\r
- attribute syn_preserve of async_pulse : signal is true;\r
- attribute syn_preserve of reset : signal is true;\r
- attribute syn_preserve of reset_cnt : signal is true;\r
+ attribute syn_preserve of async_sampler : signal is true;\r
+ attribute syn_preserve of async_pulse : signal is true;\r
+ attribute syn_preserve of reset : signal is true;\r
+ attribute syn_preserve of reset_cnt : signal is true;\r
attribute syn_preserve of comb_async_rst_n : signal is true;\r
\r
attribute syn_hier : string;\r
begin\r
if( rising_edge(CLK_IN) ) then\r
reset_pulse <= reset_pulse(0) & RESET_IN;\r
- trb_reset_pulse <= trb_reset_pulse(0) & TRB_RESET_IN;\r
end if;\r
end process THE_SYNC_PROC;\r
\r
THE_GLOBAL_RESET_PROC: process( CLK_IN )\r
begin\r
if( rising_edge(CLK_IN) ) then\r
- if( (async_pulse = '1') or (reset_pulse(1) = '1') or (trb_reset_pulse(1) = '1') ) then\r
+ if( (async_pulse = '1') or (reset_pulse(1) = '1') ) then\r
reset_cnt <= (others => '0');\r
elsif( reset_cnt(reset_cnt'left) = '0' ) then\r
reset_cnt <= reset_cnt + 1;\r
----------------------------------------------------------------\r
-- Output signals\r
----------------------------------------------------------------\r
- CLEAR_OUT <= not comb_async_rst_n;\r
RESET_OUT <= reset;\r
\r
end architecture reset_handler_arch;\r
add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net_gbe_components.vhd"
#Basic Infrastructure
-add_file -vhdl -lib work "../../trb3sc/cores/pll_dcdc.vhd"
add_file -vhdl -lib work "../../trb3sc/gbe_hub/reset_handler.vhd"
add_file -vhdl -lib work "../../trb3sc/gbe_hub/clock_reset_handler.vhd"
add_file -vhdl -lib work "../../trbnet/special/spi_flash_and_fpga_reload_record.vhd"
--
TICK_MS_OUT => tick_ms_int,
TICK_US_OUT => tick_us_int,
- ENPIRION_CLOCK => ENPIRION_CLOCK,
LED_RED_OUT => LED_RJ_RED(1),
LED_GREEN_OUT => LED_RJ_GREEN(1)
);
+ -- could also be 'Z' due to PD on TRB3sc
+ ENPIRION_CLOCK <= '0'; -- not used anymore
+
+---------------------------------------------------------------------------
+-- Pin header I/O
+---------------------------------------------------------------------------
HDR_IO(1) <= dlm_inject_int;
HDR_IO(2) <= '0';
HDR_IO(3) <= '0';
dlm_enable_int <= aux_reg(31);
dlm_period_int <= aux_reg(23 downto 0);
+
+ -- BUG BUG BUG clk_sys NOT to be used here!
-- generates an adjustable period signal for sending DLMs
-- BUG: better use count down and preload
THE_DLM_SEND_PROC: process( clk_sys )
end case;
end process THE_DL_RX_MUX;
- ul_tx_data <= switch_rx_data when ul_tx_port_sel = '1' else local_rx_data;
+ ul_tx_data <= switch_rx_data when ul_tx_port_sel = '1' else local_rx_data;
- local_tx_data <= ul_rx_data when local_tx_port_sel = '1' else switch_rx_data;
+ local_tx_data <= ul_rx_data when local_tx_port_sel = '1' else switch_rx_data;
- dl_tx_data <= ul_rx_data when dl_tx_port_sel = '1' else local_rx_data;
+ dl_tx_data <= ul_rx_data when dl_tx_port_sel = '1' else local_rx_data;
-- Multiplexer could be like this:
-- switch_rx_data <= dl_rx_data(DL_RX_PORT_MUX_OUT);
MAC_RX_EOF_IN => sniffer_eof,
MAC_RX_ERROR_IN => sniffer_error,
--
- PCS_AN_READY_IN => link_active,
- LINK_ACTIVE_IN => link_active,
+ PCS_AN_READY_IN => link_active, -- check here
+ LINK_ACTIVE_IN => link_active, -- check here
-- unique adresses
MC_UNIQUE_ID_IN => timer.uid,
MY_TRBNET_ADDRESS_IN => timer.network_address,
FRAME_START_OUT(0) => ul_rx_data(10),
FRAME_REQ_IN(0) => ul_rx_frame_req,
FRAME_ACK_OUT(0) => ul_rx_frame_ack,
- --FRAME_AVAIL_OUT(0) => ul_rx_frame_avail,
+ FRAME_AVAIL_OUT(0) => ul_rx_frame_avail,
-- FIFO interface TX
FIFO_WR_IN(0) => ul_tx_data(9),
FIFO_DATA_IN(8 downto 0) => ul_tx_data(8 downto 0),
-- LED
---------------------------------------------------------------------------
-- LED are green, orange, red, yellow, white(2), rj_green(2), rj_red(2), sfp_green(2), sfp_red(2)
- LED_GREEN <= not status(0); --'0';
- LED_ORANGE <= not tx_clk_avail_i; --'0';
- LED_RED <= not link_tx_ready_i;
- LED_YELLOW <= not '0';
+ LED_GREEN <= not status_raw(12 * 8 + 6); --status(0);
+ LED_ORANGE <= not status_raw(12 * 8 + 2); --tx_clk_avail_i;
+ LED_RED <= not status_raw(12 * 8 + 1); --link_tx_ready_i;
+ LED_YELLOW <= not status_raw(12 * 8 + 0); --'0';
LED_HUB_LINKOK(1) <= not status_raw(10 * 8 + 7); --'0'; -- C2
LED_HUB_TX(1) <= not status_raw(10 * 8 + 2); --'0';
jspc29 / trb3sc.git / commitdiff