add_file -vhdl -lib "work" "tdc_release/LogicAnalyser.vhd"
add_file -vhdl -lib "work" "tdc_release/Readout.vhd"
add_file -vhdl -lib "work" "tdc_release/risingEdgeDetect.vhd"
- add_file -vhdl -lib "work" "tdc_release/ROM_encoder_ecp3.vhd"
+ add_file -vhdl -lib "work" "tdc_release/ROM_encoder_3.vhd"
add_file -vhdl -lib "work" "tdc_release/ShiftRegisterSISO.vhd"
- add_file -vhdl -lib "work" "tdc_release/Stretcher_A.vhd"
- add_file -vhdl -lib "work" "tdc_release/Stretcher_B.vhd"
- add_file -vhdl -lib "work" "tdc_release/Stretcher.vhd"
add_file -vhdl -lib "work" "tdc_release/TDC.vhd"
add_file -vhdl -lib "work" "tdc_release/TriggerHandler.vhd"
add_file -vhdl -lib "work" "tdc_release/up_counter.vhd"
generic map (
CHANNEL_NUMBER => TDC_CHANNEL_NUMBER, -- Number of TDC channels
STATUS_REG_NR => 21, -- Number of status regs
+ TDC_VERSION => TDC_VERSION,
CONTROL_REG_NR => TDC_CONTROL_REG_NR, -- Number of control regs - higher than 8 check tdc_ctrl_addr
DEBUG => c_NO
)