The trigger random code \textendash\ 8 bits \textendash\ is generated by the trbnet for each trigger in order to distinguish the trigger. It is repeated in the TDC HEADER, so data \& trigger matching can be tested.
-The error bits are used to indicate any error might occurred in the TDC since the last trigger. The error bits coded in the header is given in Table \ref{tab:tdcHeaderErrorBits}
+The error bits are used to indicate any error might occurred in the TDC since the last trigger. The error bits coded in the header is given in Table \ref{tab:tdcHeaderErrorBits}.
-\begin{table}[h]
+\begin{table}[ht]
\centering
\begin{tabular}{|c|l|}
\hline
The data format of the \textbf{\textit{time data}} word is shown below:
-\begin{table}[h]
+\begin{table}[ht]
\centering
\begin{tabular}{|W{0.7cm}|W{1.3cm}|W{2.18cm}|W{3.3cm}|W{0.73cm}|W{3.63cm}|}
\hline
\begin{tabbing}
"1" \hspace{1.5cm}\= 1 bit \hspace{0.8cm}\= Time Data marker\\
- reserved \> 3 bits \> Reserved for future use\\
+ reserved \> 2 bits \> Reserved for future use\\
channel no \> 7 bits \> 7 bits The channel number of the TDC\\
\> \> “000000” is the reference channel\\
fine time \> 10 bits \> The fine time value of the measurement\\
\newpage
\subsubsection{EPOCH Counter}
-
-As the global coarse counter has the time limit of \~10~us, a overflow counter
-(EPOCH counter) is implemented in order to increase the measurement range. The
-data format of the \textbf{\textit{EPOCH Counter}} word is shown below:
+As the global coarse counter has the time limit of $\sim$10~us, an overflow counter (EPOCH counter) is implemented in order to increase the measurement range. The data format of the \textbf{\textit{EPOCH Counter}} word is shown below:
\begin{table}[h]
\centering
\label{tab:tdcEpochCounte}
\end{table}
-The EPOCH counter is designed with 28 bits increasing the total
-measurement range up to \texttildelow45,8~min. For each channel an individual EPOCH
-counter is implemented and they are incremented, when the coarse counter
-wraps around. The value of the EPOCH counter is kept in a register before it
-is written in the channel memory. It is only written in the memory, if a time
-measurement takes place after the last increment of the EPOCH counter. The
-EPOCH counter word is written in the memory only once per channel for each
-increment, thus saving bandwidth. In order to be on the safe side and not
-overflow the EPOCH counter, the readout trigger frequency can be set minimum
-to 24~Hz.
+The EPOCH counter is designed with 28 bits increasing the total measurement range up to $\sim$45,8~min. For each channel an individual EPOCH counter is implemented and they are incremented, when the coarse counter wraps around. The value of the EPOCH counter is kept in a register before it is written in the channel memory. It is only written in the memory, if a time measurement takes place after the last increment of the EPOCH counter. The EPOCH counter word is written in the memory only once per channel for each increment, thus saving bandwidth. In order to be on the safe side and not overflow the EPOCH counter, the readout trigger frequency can be set minimum to 24~Hz.
\subsubsection{RESERVED}