make SED FPGA size flexible to cope with e.g. MDC-FEE

diff --git a/code/sedcheck.vhd b/code/sedcheck.vhd
index d0c9ebff8541f14e0eb60f6aca965fa41cdea52b..46f6b9d7638d4ba43bb57669eb7b7ce42eed42de 100644 (file)
--- a/code/sedcheck.vhd
+++ b/code/sedcheck.vhd
@@ -4,6 +4,7 @@ use ieee.numeric_std.all;
 
 library work;
 use work.trb_net_std.all;
+use work.config.all;
 
 library ecp5um;
 use ecp5um.components.all;
@@ -208,7 +209,7 @@ THE_SED : SEDGA
   generic map(
       CHECKALWAYS  => "DISABLED",
       SED_CLK_FREQ   => "38.8",
-      DEV_DENSITY  => "85KUM" 
+      DEV_DENSITY  => FPGA_SIZE --"85KUM" 
       )
   port map(
     SEDENABLE => sed_enable,