%85747 Garching, Germany}
\maketitle
%\section{Introduction}
-The Micro-Vertex-Detector (MVD) of the future CBM-experiment will rely on CMOS Monolithic Active Pixel Sensors (MAPS). Those sensors match so far the requirements of CBM in terms of excellent spatial resolution, ultra-light material budget and non-ionizing radiation tolerance. Intense R\&D is being carried out within a joint research program of the PICSEL group of the IPHC/Strasbourg and the IKF of the Goethe University of Frankfurt/Main in order to improve their tolerance to ionizing radiation and their read-out speed.
+The Micro-Vertex-Detector (MVD) of the future CBM-experiment will rely on CMOS Monolithic Active Pixel Sensors (MAPS). Those sensors match so far the requirements of CBM in terms of excellent spatial resolution, ultra-light material budget and non-ionizing radiation tolerance. Intense R\&D is being carried out within a joint research program of the PICSEL group of the IPHC/Strasbourg and the IKF of the Goethe University of Frankfurt/Main in order to improve their tolerance to ionizing radiation and their read-out speed. In the last years, we tested separately components build in the novel $0{.}18 \mum$ process and the results were very promising \cite{IWORID2013}. Therefore we designed and tested in 2014 the first full-integrated sensor FSBB
This review will show results of measurements made at the IPHC with the FSBB-M0 sensor. Three FSBB-M0 (\textbf{F}ull \textbf{S}cale \textbf{B}uilding \textbf{B}lock for \textbf{M}ISTRAL) sensor units will compose one full sensor which will be used in the outer layers of the Inner Tracking System (ITS) of the ALICE experiment, due to the latest improvements made in radiation hardness and readout-speed of CMOS sensors. One objective is to validate the complete sensor read-out chain at real scale, so further progress in this field can be archived.
-The $9{.}2 \times 16.9~\rm mm^2$ big FSBB-M0 sensors are made in a $0{.}18 \mum$ process, based on a high resistivity ($~1 k\Omega cm$) epitaxial layer of $18 \mum$ thickness. The chip consists of $416 \times 416$, $22 \times 33 \mum^2$ sized pixels. The sensor has end-of-column discrimination. Two rows are read simultaneously in rolling shutter mode (200 ns per 2 rows), this is possible because each column has two discriminators. To compress the data a zero suppression logic named SUZE02 is implemented. The FSBB-M0 sensor comes in two flavors (FSBB-M0a and FSBB-M0b) and are divided in two submatrices. They differ in diode size or have different input transistor dimensions of the in-pixel pre-amplifier. For details regarding the building scheme see~\cite{TWEPP2014}.
+The $9{.}2 \times 16.9~\rm mm^2$ big FSBB-M0 sensors are made in a $0{.}18 \mum$ process, based on a high resistivity ($~1 k\Omega cm$) epitaxial layer of $18 \mum$ thickness. The chip consists of $416 \times 416$, $22 \times 33 \mum^2$ sized pixels connected to 208 end-of-column discriminator pairs. Therefore two rows are read simultaneously in rolling shutter mode (200 ns per 2 rows). The read-out provides a normal operation mode with zero-suppression and a data output of $640~\rm Mb/s$. The chip provides also different test modes for the analog and digital part to characterize the pixels and the discriminators. The FSBB-M0 sensor has two flavors (FSBB-M0a and FSBB-M0b) and each is divided in two submatrices. They differ in diode size or have different input transistor dimensions of the in-pixel pre-amplifier. For details regarding the building scheme see~\cite{TWEPP2014}.
A total of 25 FSBB-M0 chips have been characterized, showing a remarkably similar temporal (pixel dispersion in time) and fixed pattern noise (spatial spread of the pixel threshold) performance. The results are presented in table~\ref{table:noise} and figure~\ref{fig:figure1}. Except for the outliers chip number 15, the new architecture based on the $0{.}18 \mum$ process has an excellent yield and a reliable behavior.
\label{table:noise}
\end{table}
-
-% The benefit of the in-pixel in comparison to the column-wise discrimination is the lower power consumption ($~14 \muA$ instead of $~120 \muA$ per pixel -- the analog buffer doesn't have to drive the long distance along the column) and the faster readout times ($15 \mus$ read-out time in comparison to $30 \mus$ -- the A-D conversion can be halved due to the small local parasitic). On the other hand, the in-pixel discrimination is an innovative architecture which has to be tested and validated more, while the column wise discrimination is a mature technology, which was already successfully implemented and used in previous MIMOSA chips.
-
-%For the discrimination in the columns, .
-%A sample transfer function study is shown in \ref{fig:figure1}. Each curve discribes the fire behavior of one pixel averaged over time as a function of the reference voltage. The distribution of the slopes is called temporal noise and is shown in \ref{fig:figure2}. %The two discrimination modes, as well as different transitor sizes were tested:
-%For the discrimination in the pixel one observes a distribution with two peaks, it seems that there are two main types of pixel behavior. To investigate the fixed pattern noise, the behavior of the pixels for different threshold voltages
-
\begin{figure}[htb]
\begin{center}
\includegraphics[width=0.4\textwidth]{yield}
\label{fig:figure1}
\end{figure}
+% The benefit of the in-pixel in comparison to the column-wise discrimination is the lower power consumption ($~14 \muA$ instead of $~120 \muA$ per pixel -- the analog buffer doesn't have to drive the long distance along the column) and the faster readout times ($15 \mus$ read-out time in comparison to $30 \mus$ -- the A-D conversion can be halved due to the small local parasitic). On the other hand, the in-pixel discrimination is an innovative architecture which has to be tested and validated more, while the column wise discrimination is a mature technology, which was already successfully implemented and used in previous MIMOSA chips.
+
+%For the discrimination in the columns, .
+%A sample transfer function study is shown in \ref{fig:figure1}. Each curve discribes the fire behavior of one pixel averaged over time as a function of the reference voltage. The distribution of the slopes is called temporal noise and is shown in \ref{fig:figure2}. %The two discrimination modes, as well as different transitor sizes were tested:
+%For the discrimination in the pixel one observes a distribution with two peaks, it seems that there are two main types of pixel behavior. To investigate the fixed pattern noise, the behavior of the pixels for different threshold voltages
+
+
\begin{thebibliography}{15}
%\bibitem{SuperPaper}
%Mathieu Goffe, \emph{An article with a good scheme for the FSBB-M sensors} (2014)
+\bibitem{IWORID2013}
+Doering, D., et al., \emph{Noise performance and ionizing radiation tolerance of CMOS Monolithic Active Pixel Sensors using the $0.18 \mum$ CMOS process}, Journal of Instrumentation 9.05 (2014): C05051
+
\bibitem{TWEPP2014}
Frédéric Morel, PICSEL group, IPHC Strasbourg, talk at TWEPP 2014, contribution 107, \emph{FSBB-M and FSBB-A: Two Large Scale CMOS Pixel Sensors Building Blocks Developed for the Upgrade of the Inner Tracking System of the ALICE Experiment} (2014)
+
\end{thebibliography}
\bibliographystyle{plain}
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