]> jspc29.x-matter.uni-frankfurt.de Git - trbnet.git/commitdiff
add option to discard events if they are below a certain threshold (e.g. headers...
authorJan Michel <j.michel@gsi.de>
Mon, 16 Jul 2018 15:52:24 +0000 (17:52 +0200)
committerJan Michel <j.michel@gsi.de>
Mon, 16 Jul 2018 15:52:24 +0000 (17:52 +0200)
special/handler_data.vhd
special/handler_trigger_and_data.vhd
trb_net16_endpoint_hades_full_handler_record.vhd
trb_net_components.vhd

index e99639a66e2c6837cf40a21ecb3142c6b50e2886..1e578cda48cfd200391e7b36d684c96ee17f26f2 100644 (file)
@@ -50,6 +50,7 @@ entity handler_data is
 
     TMG_TRG_ERROR_IN             : in  std_logic;
     MAX_EVENT_SIZE_IN            : in  std_logic_vector(15 downto 0) := x"FFFF";
+    MIN_EVENT_SIZE_IN            : in  std_logic_vector( 7 downto 0) := x"00";
     BUFFER_DISABLE_IN            : in  std_logic_vector(15 downto 0) := x"0000";
     --Status
     STAT_DATA_BUFFER_LEVEL       : out std_logic_vector(DATA_INTERFACE_NUMBER*32-1 downto 0);
@@ -148,6 +149,8 @@ architecture handler_data_arch of handler_data is
   signal tmg_trg_error_i           : std_logic;
   signal partially_missing_i       : std_logic;
   signal fee_write_overflow        : std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0);
+  signal event_large_enough        : std_logic_vector(DATA_INTERFACE_NUMBER-1 downto 0);
+  signal event_data_discard_i      : std_logic;
 begin
 
   assert DATA_BUFFER_FULL_THRESH >= (2**DATA_BUFFER_DEPTH)/2     report "Data buffer threshold too high" severity error;
@@ -181,9 +184,11 @@ begin
 
   end generate;
 
-  header_buffer_data_in          <= x"0" & "0" & partially_missing_i & tmg_trg_error_i & LVL1_TRG_INFO_IN(0) 
+  header_buffer_data_in          <= x"0" & "0" & partially_missing_i & tmg_trg_error_i & event_data_discard_i
                                     & LVL1_TRG_TYPE_IN & LVL1_TRG_CODE_IN & LVL1_TRG_NUMBER_IN;
 
+  event_data_discard_i <= LVL1_TRG_INFO_IN(0) or not or_all(event_large_enough);
+                                    
   process(CLOCK)
     begin
       if rising_edge(CLOCK) then
@@ -292,37 +297,41 @@ begin
     proc_length_count : process (CLOCK)
       begin
         if rising_edge(CLOCK) then
+          length_buffer_write(i)         <= '0';
+          length_buffer_data_in(i*18+17 downto i*18) <= LVL1_TRG_NUMBER_IN(1 downto 0) & std_logic_vector(data_counter(i));
+
+          case current_buffer_state(i) is
+            when IDLE =>
+              buffer_state_bits(i)       <= "001";
+              data_counter(i)            <= to_unsigned(0,16);
+              event_large_enough(i)      <= not or_all(MIN_EVENT_SIZE_IN);
+              if LVL1_VALID_TRIGGER_IN = '1' then
+                current_buffer_state(i)  <= BUSY;
+              end if;
+
+            when BUSY =>
+              buffer_state_bits(i)       <= "010";
+              if FEE_DATA_WRITE_IN(i) = '1' and fee_write_overflow(i) = '0' and BUFFER_DISABLE_IN(i) = '0' then
+                data_counter(i)          <= data_counter(i) + to_unsigned(1,1);
+              end if;
+              if data_counter(i)(7 downto 0) = unsigned(MIN_EVENT_SIZE_IN) then
+                event_large_enough(i) <= '1';
+              end if;
+              
+              if FEE_DATA_FINISHED_IN(i) = '1' then
+                current_buffer_state(i)  <= WAITING;
+                length_buffer_write(i)   <= '1';
+              end if;
+
+            when WAITING =>
+              buffer_state_bits(i)       <= "100";
+              if lvl1_busy_release_i = '1' then
+                current_buffer_state(i)  <= IDLE;
+              end if;
+
+          end case;
           if RESET = '1' then
             current_buffer_state(i)        <= IDLE;
-          else
-            length_buffer_write(i)         <= '0';
-            length_buffer_data_in(i*18+17 downto i*18) <= LVL1_TRG_NUMBER_IN(1 downto 0) & std_logic_vector(data_counter(i));
-
-            case current_buffer_state(i) is
-              when IDLE =>
-                buffer_state_bits(i)       <= "001";
-                data_counter(i)            <= to_unsigned(0,16);
-                if LVL1_VALID_TRIGGER_IN = '1' then
-                  current_buffer_state(i)  <= BUSY;
-                end if;
-
-              when BUSY =>
-                buffer_state_bits(i)       <= "010";
-                if FEE_DATA_WRITE_IN(i) = '1' and fee_write_overflow(i) = '0' and BUFFER_DISABLE_IN(i) = '0' then
-                  data_counter(i)          <= data_counter(i) + to_unsigned(1,1);
-                end if;
-                if FEE_DATA_FINISHED_IN(i) = '1' then
-                  current_buffer_state(i)  <= WAITING;
-                  length_buffer_write(i)   <= '1';
-                end if;
-
-              when WAITING =>
-                buffer_state_bits(i)       <= "100";
-                if lvl1_busy_release_i = '1' then
-                  current_buffer_state(i)  <= IDLE;
-                end if;
-
-            end case;
           end if;
         end if;
       end process;
index a794a2e5336fd8c38c7939c8b6f6463876ea02c2..0683e83a555631fea523ca93c6d8b1224a1b4740 100644 (file)
@@ -60,6 +60,7 @@ entity handler_trigger_and_data is
 
     TMG_TRG_ERROR_IN             : in  std_logic;
     MAX_EVENT_SIZE_IN            : in  std_logic_vector(15 downto 0) := x"FFFF";
+    MIN_EVENT_SIZE_IN            : in  std_logic_vector( 7 downto 0) := x"FF";
     BUFFER_DISABLE_IN            : in  std_logic_vector(15 downto 0) := x"0000";
     --Status Registers
     STAT_DATA_BUFFER_LEVEL       : out std_logic_vector(DATA_INTERFACE_NUMBER*32-1 downto 0);
@@ -156,7 +157,7 @@ begin
 -- The data handler, containing all buffers
 -----------------------------------------------------------------------
 
-  THE_DATA_HANDLER : handler_data
+  THE_DATA_HANDLER : entity work.handler_data
     generic map(
       DATA_INTERFACE_NUMBER        => DATA_INTERFACE_NUMBER,
       DATA_BUFFER_DEPTH            => DATA_BUFFER_DEPTH,
@@ -195,6 +196,7 @@ begin
       IPU_HDR_DATA_EMPTY_OUT       => ipu_header_empty,
       TMG_TRG_ERROR_IN             => TMG_TRG_ERROR_IN,
       MAX_EVENT_SIZE_IN            => MAX_EVENT_SIZE_IN,
+      MIN_EVENT_SIZE_IN            => MIN_EVENT_SIZE_IN,
       BUFFER_DISABLE_IN            => BUFFER_DISABLE_IN,
 --       Status
       STAT_DATA_BUFFER_LEVEL       => buf_STAT_DATA_BUFFER_LEVEL,
@@ -346,4 +348,4 @@ begin
   STATUS_OUT(95 downto 64)                       <= status_ipu_handler_i;
   STATUS_OUT(127 downto 96)                      <= (others => '0');
 
-end architecture;
\ No newline at end of file
+end architecture;
index 7871f7fbabea84cde9ec0cceda597e6b400a5326..18565315d226e5beba3227378fd12223adab87d5 100644 (file)
@@ -159,6 +159,7 @@ architecture trb_net16_endpoint_hades_full_handler_record_arch of trb_net16_endp
   signal fee_trg_statusbits_in : std_logic_vector(32*DATA_INTERFACE_NUMBER-1 downto 0);
   
   signal max_event_size            : std_logic_vector(15 downto 0);
+  signal min_event_size            : std_logic_vector( 7 downto 0);
   signal buffer_disable            : std_logic_vector(15 downto 0);  
   signal new_max_size              : std_logic_vector(15 downto 0);
 
@@ -356,7 +357,7 @@ info_registers(3) <=   std_logic_vector(to_unsigned(TRG_RELEASE_AFTER_DATA,1))
                      & "0000000"
                      & std_logic_vector(to_unsigned(HEADER_BUFFER_FULL_THRESH,16)) 
                      & std_logic_vector(to_unsigned(HEADER_BUFFER_DEPTH,8));
-info_registers(4) <= x"0000" & buffer_disable;                     
+info_registers(4) <= x"00" & min_event_size & buffer_disable;                     
 
   proc_maxeventsize : process begin
     wait until rising_edge(CLK);
@@ -365,12 +366,14 @@ info_registers(4) <= x"0000" & buffer_disable;
     if RESET = '1' then
       max_event_size <= std_logic_vector(to_unsigned((2**DATA_BUFFER_DEPTH-DATA_BUFFER_FULL_THRESH-1),16));
       buffer_disable <= (others => '0');
+      min_event_size <= (others => '0');
     elsif info_rx.write = '1' and info_rx.addr(2 downto 0) = "001" then
       max_event_size  <= info_rx.data(15 downto 0);
       info_tx.wack <= '1';
       info_wr_nack <= '0';
     elsif info_rx.write = '1' and info_rx.addr(2 downto 0) = "100" then
       buffer_disable  <= info_rx.data(15 downto 0);
+      min_event_size  <= info_rx.data(23 downto 16);
       info_tx.wack <= '1';
       info_wr_nack <= '0';
     end if;
@@ -450,6 +453,7 @@ stat_handler_registers(2) <= stat_handler_i(95 downto 64);
 
       TMG_TRG_ERROR_IN           => tmg_trg_error_i,
       MAX_EVENT_SIZE_IN          => max_event_size,
+      MIN_EVENT_SIZE_IN          => min_event_size,
       BUFFER_DISABLE_IN          => buffer_disable,      
       --Status Registers
       STAT_DATA_BUFFER_LEVEL     => stat_data_buffer_level,
index 8a3cc3856cc31fdba2cce6f3d5af0e95e9fc8bf1..2cf3a7bd738465ac103d013262a39f9813eb6745 100644 (file)
@@ -1147,6 +1147,7 @@ end component;
 \r
       TMG_TRG_ERROR_IN         : in  std_logic;\r
       MAX_EVENT_SIZE_IN        : in  std_logic_vector(15 downto 0) := x"FFFF";\r
+      MIN_EVENT_SIZE_IN            : in  std_logic_vector( 7 downto 0) := x"FF";\r
       BUFFER_DISABLE_IN            : in  std_logic_vector(15 downto 0) := x"0000";      \r
       --Status\r
       STAT_DATA_BUFFER_LEVEL   : out std_logic_vector(DATA_INTERFACE_NUMBER*32-1 downto 0);\r
@@ -1308,6 +1309,7 @@ end component;
 \r
       TMG_TRG_ERROR_IN         : in  std_logic;\r
       MAX_EVENT_SIZE_IN        : in  std_logic_vector(15 downto 0) := x"FFFF";\r
+      MIN_EVENT_SIZE_IN        : in  std_logic_vector( 7 downto 0) := x"FF";\r
       BUFFER_DISABLE_IN        : in  std_logic_vector(15 downto 0) := x"0000";\r
       --Status Registers\r
       STATUS_OUT               : out std_logic_vector(127 downto 0);\r