only D0CH0 on Tomcat ist inverted...

diff --git a/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d0ch1.lpc b/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d0ch1.lpc
index a958dddf817c13af7ed31d1a50c32db6c77262ce..b96e477e9e6046f0d022ecd794543c2d0c218f3f 100644 (file)
--- a/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d0ch1.lpc
+++ b/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d0ch1.lpc
@@ -15,7 +15,7 @@ Date=07/26/2022
 ModuleName=serdes_d0ch1
 ParameterFileVersion=1.0
 SourceFormat=vhdl
-Time=10:09:05
+Time=10:44:26
 VendorName=Lattice Semiconductor Corporation
 [Parameters]
 ;ACHARA=0 00H
@@ -77,7 +77,7 @@ TXDEPOST=Disabled
 TXDEPRE=Disabled
 TXDIFFTERM=50 ohms
 TXFIFO_ENABLE=Enabled
-TXINVPOL=Invert
+TXINVPOL=Non-invert
 TXLDR=Off
 TXPLLLOLTHRESHOLD=1
 TXPLLMULT=10X

diff --git a/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d0ch1.vhd b/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d0ch1.vhd
index 07466054c86d2176b0f4dcec6634a08f9405f91a..567160fb2f601f89ddbeafcde47a2e244af37b03 100644 (file)
--- a/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d0ch1.vhd
+++ b/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d0ch1.vhd
@@ -103,7 +103,7 @@ begin
         D_CDR_LOL_SET=>"0b11",D_TXPLL_PWDNB=>"0b1",D_BITCLK_LOCAL_EN=>"0b1",
         D_BITCLK_ND_EN=>"0b0",D_BITCLK_FROM_ND_EN=>"0b0",D_SYNC_LOCAL_EN=>"0b1",
         D_SYNC_ND_EN=>"0b0",CH1_UC_MODE=>"0b0",CH1_PCIE_MODE=>"0b0",CH1_RIO_MODE=>"0b0",
-        CH1_WA_MODE=>"0b0",CH1_INVERT_RX=>"0b0",CH1_INVERT_TX=>"0b1",CH1_PRBS_SELECTION=>"0b0",
+        CH1_WA_MODE=>"0b0",CH1_INVERT_RX=>"0b0",CH1_INVERT_TX=>"0b0",CH1_PRBS_SELECTION=>"0b0",
         CH1_GE_AN_ENABLE=>"0b1",CH1_PRBS_LOCK=>"0b0",CH1_PRBS_ENABLE=>"0b0",
         CH1_ENABLE_CG_ALIGN=>"0b1",CH1_TX_GEAR_MODE=>"0b0",CH1_RX_GEAR_MODE=>"0b0",
         CH1_PCS_DET_TIME_SEL=>"0b00",CH1_PCIE_EI_EN=>"0b0",CH1_TX_GEAR_BYPASS=>"0b0",

diff --git a/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d1ch1.lpc b/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d1ch1.lpc
index 06626ce4b04613e7f80b03e0b03e3f5f2803b16f..40b40769e2129257c05bb5ae1d2ded4d791db378 100644 (file)
--- a/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d1ch1.lpc
+++ b/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d1ch1.lpc
@@ -15,7 +15,7 @@ Date=07/26/2022
 ModuleName=serdes_d1ch1
 ParameterFileVersion=1.0
 SourceFormat=vhdl
-Time=10:11:42
+Time=10:43:42
 VendorName=Lattice Semiconductor Corporation
 [Parameters]
 ;ACHARA=0 00H
@@ -77,7 +77,7 @@ TXDEPOST=Disabled
 TXDEPRE=Disabled
 TXDIFFTERM=50 ohms
 TXFIFO_ENABLE=Enabled
-TXINVPOL=Invert
+TXINVPOL=Non-invert
 TXLDR=Off
 TXPLLLOLTHRESHOLD=1
 TXPLLMULT=10X

diff --git a/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d1ch1.vhd b/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d1ch1.vhd
index e5ae638b885c77480f3c829f0d5b0af254a16cee..abab1b706d3ae4453dc94e1adf6f2bc52234aa69 100644 (file)
--- a/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d1ch1.vhd
+++ b/gbe_trb_ecp5/media/ecp5-5g/serdes/serdes_d1ch1.vhd
@@ -103,7 +103,7 @@ begin
         D_CDR_LOL_SET=>"0b11",D_TXPLL_PWDNB=>"0b1",D_BITCLK_LOCAL_EN=>"0b1",
         D_BITCLK_ND_EN=>"0b0",D_BITCLK_FROM_ND_EN=>"0b0",D_SYNC_LOCAL_EN=>"0b1",
         D_SYNC_ND_EN=>"0b0",CH1_UC_MODE=>"0b0",CH1_PCIE_MODE=>"0b0",CH1_RIO_MODE=>"0b0",
-        CH1_WA_MODE=>"0b0",CH1_INVERT_RX=>"0b0",CH1_INVERT_TX=>"0b1",CH1_PRBS_SELECTION=>"0b0",
+        CH1_WA_MODE=>"0b0",CH1_INVERT_RX=>"0b0",CH1_INVERT_TX=>"0b0",CH1_PRBS_SELECTION=>"0b0",
         CH1_GE_AN_ENABLE=>"0b1",CH1_PRBS_LOCK=>"0b0",CH1_PRBS_ENABLE=>"0b0",
         CH1_ENABLE_CG_ALIGN=>"0b1",CH1_TX_GEAR_MODE=>"0b0",CH1_RX_GEAR_MODE=>"0b0",
         CH1_PCS_DET_TIME_SEL=>"0b00",CH1_PCIE_EI_EN=>"0b0",CH1_TX_GEAR_BYPASS=>"0b0",