Maybe improved config signal handling

diff --git a/ADC/source/adc_handler.vhd b/ADC/source/adc_handler.vhd
index 9cc7edbe3eb726187b9c07eb64dc93f579f34cb5..6aacd81d2b7f1432f2a421364629acfb47149c49 100644 (file)
--- a/ADC/source/adc_handler.vhd
+++ b/ADC/source/adc_handler.vhd
@@ -31,10 +31,10 @@ entity adc_handler is
 end entity;
 
 architecture adc_handler_arch of adc_handler is
---  attribute syn_keep : boolean;
---  attribute syn_preserve : boolean;
---  attribute syn_hier : string;
---  attribute syn_hier of adc_handler_arch : architecture is "hard";
+  attribute syn_keep : boolean;
+  attribute syn_preserve : boolean;
+  attribute syn_hier : string;
+  attribute syn_hier of adc_handler_arch : architecture is "hard";
 
   type psa_data_t is array (0 to DEVICES - 1) of std_logic_vector(8 downto 0);
 
@@ -45,10 +45,10 @@ architecture adc_handler_arch of adc_handler is
 
   signal ctrl_reg   : std_logic_vector(31 downto 0);
   signal strobe_reg : std_logic_vector(31 downto 0);
---  attribute syn_keep of ctrl_reg : signal is true;
---  attribute syn_preserve of ctrl_reg : signal is true;
---  attribute syn_keep of strobe_reg : signal is true;
---  attribute syn_preserve of strobe_reg : signal is true;
+  attribute syn_keep of ctrl_reg : signal is true;
+  attribute syn_preserve of ctrl_reg : signal is true;
+  attribute syn_keep of strobe_reg : signal is true;
+  attribute syn_preserve of strobe_reg : signal is true;
 
   signal buffer_ctrl_reg : std_logic_vector(31 downto 0);
   signal adc_restart     : std_logic;
@@ -58,6 +58,10 @@ architecture adc_handler_arch of adc_handler is
 
   signal config        : cfg_t;
   signal config_cfd    : cfg_cfd_t;
+  attribute syn_keep of config : signal is true;
+  attribute syn_preserve of config : signal is true;
+  attribute syn_keep of config_cfd : signal is true;
+  attribute syn_preserve of config_cfd : signal is true;
   signal buffer_addr   : std_logic_vector(4 downto 0);
   signal buffer_data   : buffer_data_t;
   signal buffer_read   : std_logic_vector(15 downto 0);

diff --git a/ADC/source/adc_processor_cfd.vhd b/ADC/source/adc_processor_cfd.vhd
index c9e117d1bffb61731a5702d5d635877e4a4274b3..c389cddff702f3d0383f39812dea21e85ab5ad35 100644 (file)
--- a/ADC/source/adc_processor_cfd.vhd
+++ b/ADC/source/adc_processor_cfd.vhd
@@ -31,14 +31,14 @@ entity adc_processor_cfd is
 end entity adc_processor_cfd;
 
 architecture arch of adc_processor_cfd is
---  attribute syn_hier : string;
---  attribute syn_keep : boolean;
---  attribute syn_preserve : boolean;
---  attribute syn_hier of arch : architecture is "hard";
+  attribute syn_hier : string;
+  attribute syn_keep : boolean;
+  attribute syn_preserve : boolean;
+  attribute syn_hier of arch : architecture is "hard";
 
   signal CONF_adc, CONF_sys : cfg_cfd_t := cfg_cfd_t_INIT;
---  attribute syn_keep of CONF_adc, CONF_sys : signal is true;
---  attribute syn_preserve of CONF_adc, CONF_sys : signal is true;
+  attribute syn_keep of CONF_adc, CONF_sys : signal is true;
+  attribute syn_preserve of CONF_adc, CONF_sys : signal is true;
 
   signal trigger_gen, trigger_mask : std_logic_vector(CHANNELS - 1 downto 0);
   type debug_t is array (CHANNELS - 1 downto 0) of debug_cfd_t;
@@ -65,8 +65,8 @@ architecture arch of adc_processor_cfd is
   signal busy_in_adc, busy_in_sys : std_logic_vector(CHANNELS-1 downto 0) := (others => '0');
   signal busy_out_adc, busy_out_sys : std_logic_vector(CHANNELS-1 downto 0) := (others => '0');
 begin
-  CONF_adc <= CONFIG when rising_edge(CLK_ADC);
-  CONF_sys <= CONFIG when rising_edge(CLK_SYS);
+  CONF_adc <= CONF_sys when rising_edge(CLK_ADC);
+  CONF_sys <= CONFIG   when rising_edge(CLK_SYS);
 
   trigger_mask <= CONF_sys.TriggerEnable((DEVICE + 1) * CHANNELS - 1 downto DEVICE * CHANNELS);
   TRIGGER_OUT  <= or_all(trigger_gen and trigger_mask) when rising_edge(CLK_SYS);