constant INIT_ADDRESS : std_logic_vector := x"F570";
constant BROADCAST_SPECIAL_ADDR : std_logic_vector;
- constant INCLUDE_UART : integer := c_YES; --300 slices
- constant INCLUDE_SPI : integer := c_YES; --300 slices
+ constant INCLUDE_UART : integer := c_YES;
+ constant INCLUDE_SPI : integer := c_YES;
constant INCLUDE_ADC : integer := c_YES;
- constant INCLUDE_LCD : integer := c_NO; --800 slices
- constant INCLUDE_DEBUG_INTERFACE: integer := c_NO; --300 slices
+ constant INCLUDE_I2C : integer := c_NO;
+ constant INCLUDE_DEBUG_INTERFACE: integer := c_NO;
--input monitor and trigger generation logic
- constant INCLUDE_TRIGGER_LOGIC : integer := c_YES; --400 slices @32->2
- constant INCLUDE_STATISTICS : integer := c_NO; --1300 slices, 1 RAM @32
+ constant INCLUDE_TRIGGER_LOGIC : integer := c_YES;
+ constant INCLUDE_STATISTICS : integer := c_NO;
constant TRIG_GEN_INPUT_NUM : integer := 32;
constant TRIG_GEN_OUTPUT_NUM : integer := 4;
constant MONITOR_INPUT_NUM : integer := 32;
--End of design configuration
------------------------------------------------------------------------------
-
- type data_t is array (0 to 1023) of std_logic_vector(7 downto 0);
- constant LCD_DATA : data_t := (others => x"00");
-
------------------------------------------------------------------------------
--Select settings by configuration
------------------------------------------------------------------------------
t(42 downto 42) := std_logic_vector(to_unsigned(INCLUDE_SPI,1));
t(43 downto 43) := std_logic_vector(to_unsigned(INCLUDE_UART,1));
t(44 downto 44) := std_logic_vector(to_unsigned(INCLUDE_STATISTICS,1));
+ t(47 downto 47) := std_logic_vector(to_unsigned(INCLUDE_I2C,1));
t(51 downto 48) := std_logic_vector(to_unsigned(INCLUDE_TRIGGER_LOGIC,4));
t(52 downto 52) := std_logic_vector(to_unsigned(USE_120_MHZ,1));
t(53 downto 53) := std_logic_vector(to_unsigned(USE_RXCLOCK,1));
constant INIT_ADDRESS : std_logic_vector := x"F575";
constant BROADCAST_SPECIAL_ADDR : std_logic_vector := x"82";
- constant INCLUDE_UART : integer := c_NO; --300 slices
- constant INCLUDE_SPI : integer := c_NO; --300 slices
+ constant INCLUDE_UART : integer := c_NO;
+ constant INCLUDE_SPI : integer := c_NO;
constant INCLUDE_ADC : integer := c_YES;
- constant INCLUDE_LCD : integer := c_NO; --800 slices
constant INCLUDE_I2C : integer := c_YES;
- constant INCLUDE_DEBUG_INTERFACE: integer := c_NO; --300 slices
+ constant INCLUDE_DEBUG_INTERFACE: integer := c_NO;
--input monitor and trigger generation logic
- constant INCLUDE_TRIGGER_LOGIC : integer := c_NO; --400 slices @32->2
- constant INCLUDE_STATISTICS : integer := c_NO; --1300 slices, 1 RAM @32
+ constant INCLUDE_TRIGGER_LOGIC : integer := c_NO;
+ constant INCLUDE_STATISTICS : integer := c_NO;
constant TRIG_GEN_INPUT_NUM : integer := 32;
constant TRIG_GEN_OUTPUT_NUM : integer := 4;
constant MONITOR_INPUT_NUM : integer := 32;
--End of design configuration
------------------------------------------------------------------------------
-
- type data_t is array (0 to 1023) of std_logic_vector(7 downto 0);
- constant LCD_DATA : data_t := (others => x"00");
-
------------------------------------------------------------------------------
--Select settings by configuration
------------------------------------------------------------------------------
t(42 downto 42) := std_logic_vector(to_unsigned(INCLUDE_SPI,1));
t(43 downto 43) := std_logic_vector(to_unsigned(INCLUDE_UART,1));
t(44 downto 44) := std_logic_vector(to_unsigned(INCLUDE_STATISTICS,1));
+ t(47 downto 47) := std_logic_vector(to_unsigned(INCLUDE_I2C,1));
t(51 downto 48) := std_logic_vector(to_unsigned(INCLUDE_TRIGGER_LOGIC,4));
t(52 downto 52) := std_logic_vector(to_unsigned(USE_120_MHZ,1));
t(53 downto 53) := std_logic_vector(to_unsigned(USE_RXCLOCK,1));
--set to 0 for backplane serdes, set to 1 for SFP serdes
- constant SERDES_NUM : integer := 1;
+ constant SERDES_NUM : integer := 0;
--TDC settings
constant FPGA_TYPE : integer := 5; --3: ECP3, 5: ECP5
constant INIT_ADDRESS : std_logic_vector := x"F570";
constant BROADCAST_SPECIAL_ADDR : std_logic_vector;
- constant INCLUDE_UART : integer := c_YES; --300 slices
- constant INCLUDE_SPI : integer := c_YES; --300 slices
- constant INCLUDE_ADC : integer := c_YES;
- constant INCLUDE_LCD : integer := c_NO; --800 slices
- constant INCLUDE_DEBUG_INTERFACE: integer := c_NO; --300 slices
+ constant INCLUDE_UART : integer := c_NO;
+ constant INCLUDE_SPI : integer := c_YES;
+ constant INCLUDE_ADC : integer := c_NO;
+ constant USE_I2C : integer := c_NO;
+ constant INCLUDE_DEBUG_INTERFACE: integer := c_NO;
--input monitor and trigger generation logic
- constant INCLUDE_TRIGGER_LOGIC : integer := c_YES; --400 slices @32->2
- constant INCLUDE_STATISTICS : integer := c_NO; --1300 slices, 1 RAM @32
+ constant INCLUDE_TRIGGER_LOGIC : integer := c_YES;
+ constant INCLUDE_STATISTICS : integer := c_YES;
constant TRIG_GEN_INPUT_NUM : integer := 32;
constant TRIG_GEN_OUTPUT_NUM : integer := 4;
constant MONITOR_INPUT_NUM : integer := 32;
t(42 downto 42) := std_logic_vector(to_unsigned(INCLUDE_SPI,1));
t(43 downto 43) := std_logic_vector(to_unsigned(INCLUDE_UART,1));
t(44 downto 44) := std_logic_vector(to_unsigned(INCLUDE_STATISTICS,1));
+ t(47 downto 47) := std_logic_vector(to_unsigned(INCLUDE_I2C,1));
t(51 downto 48) := std_logic_vector(to_unsigned(INCLUDE_TRIGGER_LOGIC,4));
t(52 downto 52) := std_logic_vector(to_unsigned(USE_120_MHZ,1));
t(53 downto 53) := std_logic_vector(to_unsigned(USE_RXCLOCK,1));