-static char rcsId[] = "$Header: /misc/hadesprojects/daq/cvsroot/eventbuilder/hadaq/Attic/hwtof.c,v 1.5 1999-09-02 12:38:03 hades Exp $";
+static char rcsId[] = "$Header: /misc/hadesprojects/daq/cvsroot/eventbuilder/hadaq/Attic/hwtof.c,v 1.6 1999-09-05 11:31:37 hades Exp $";
#define _POSIX_C_SOURCE 199309L
#include <unistd.h>
#include "param.h"
#include "subevt.h"
+#include "hwdtu.h"
+#include "hwsis3801.h"
+#include "hwv488.h"
#include "hwv775.h"
#include "hwv878.h"
#include "hardware.h"
-#define NV775S 1
-#define NV878S 1
+#define NV775S 2
+#define NV878S 4
typedef struct ModulesS {
+ HwDtu *dtu;
+ HwSis3801 *sis3801;
+ HwV488 *v556;
+ HwV488 *v488;
HwV775 *v775[NV775S];
HwV878 *v878[NV878S];
-} Modules;
+}
+
+Modules;
size_t Hardware_maxSubEvtSize(const Hardware *my)
{
{
Hardware *my;
Param paramS, *param = ¶mS;
+ HwDtu *dtu;
+ HwSis3801 *sis3801;
+ HwV488 *v556;
+ HwV488 *v488;
HwV775 *v775[NV775S];
HwV878 *v878[NV878S];
int i;
my->maxSubEvtSize = SubEvt_hdrSize()
+ (NV775S * 34 * sizeof(UInt4))
- + (NV878S * 34 * sizeof(UInt4));
+ + (NV878S * 34 * sizeof(UInt4))
+ + (9 * sizeof(UInt2))
+ + (9 * sizeof(UInt2))
+ + ((1 + 2 * 32) * sizeof(UInt2));
+
+ dtu = allocMem(sizeof(HwDtu));
+ if (0 > conHwDtu(dtu, "dtu", param)) {
+ msglog(LOG_DEBUG, "%s:%d:%s\n", __FILE__, __LINE__, strerror(errno));
+ return NULL;
+ }
+ ((Modules *) my->specific)->dtu = dtu;
+
+ sis3801 = allocMem(sizeof(HwSis3801));
+ if (0 > conHwSis3801(sis3801, "scaler0", param)) {
+ msglog(LOG_DEBUG, "%s:%d:%s\n", __FILE__, __LINE__, strerror(errno));
+ return NULL;
+ }
+ ((Modules *) my->specific)->sis3801 = sis3801;
+ v556 = allocMem(sizeof(HwV488));
+ if (0 > conHwV488(v556, "adc0", param)) {
+ msglog(LOG_DEBUG, "%s:%d:%s\n", __FILE__, __LINE__, strerror(errno));
+ return NULL;
+ }
+ ((Modules *) my->specific)->v556 = v556;
+ v488 = allocMem(sizeof(HwV488));
+ if (0 > conHwV488(v488, "tdc8", param)) {
+ msglog(LOG_DEBUG, "%s:%d:%s\n", __FILE__, __LINE__, strerror(errno));
+ return NULL;
+ }
+ ((Modules *) my->specific)->v488 = v488;
for (i = 0; i < NV775S; i++) {
char buf[16];
((Modules *) my->specific)->v878[i] = v878[i];
}
-
desParam(param);
return my;
}
void deleteHardware(Hardware *my)
{
int i;
+ HwDtu *dtu = ((Modules *) my->specific)->dtu;
+ HwSis3801 *sis3801 = ((Modules *) my->specific)->sis3801;
+ HwV488 *v556 = ((Modules *) my->specific)->v556;
+ HwV488 *v488 = ((Modules *) my->specific)->v488;
HwV775 **v775 = ((Modules *) my->specific)->v775;
HwV878 **v878 = ((Modules *) my->specific)->v878;
desHwV775(v775[i]);
freeMem(v775[i]);
}
+ desHwV488(v488);
+ freeMem(v488);
+ desHwV488(v556);
+ freeMem(v556);
+ desHwSis3801(sis3801);
+ freeMem(sis3801);
+ desHwDtu(dtu);
+ freeMem(dtu);
freeMem(my);
}
void Hardware_waitForTrigger(const Hardware *my, void *subEvt)
{
- HwV775 **v775 = ((Modules *) my->specific)->v775;
+ HwDtu *dtu = ((Modules *) my->specific)->dtu;
+ static int nextId = SubEvtId_trigCode;
+ static int doReadOut;
static UInt1 trigTag = 0;
static unsigned long trigNr = 0;
- while (HwV775_isEmpty(v775[0])) {
+ switch (nextId) {
+ case SubEvtId_trigCode:
+ do {
+ while (HwDtu_isEmpty(dtu)) {
#if 1
- struct timespec tS, *t = &tS;
- t->tv_sec = 0;
- t->tv_nsec = 020000000;
- nanosleep(t, NULL);
+ struct timespec tS, *t = &tS;
+ t->tv_sec = 0;
+ t->tv_nsec = 020000000;
+ nanosleep(t, NULL);
#endif
+ }
+ HwDtu_read(dtu);
+ msglog(LOG_DEBUG, "Dtu: tag: 0x%02x, code: 0x%02x\n", dtu->trigTag, dtu->trigCode);
+ switch (dtu->trigCode) {
+ case 0x02:
+ case 0x03:
+ trigTag = dtu->trigTag;
+ doReadOut = 0;
+ break;
+ default:
+ doReadOut = 1;
+ break;
+ }
+ } while (!doReadOut);
+ SubEvt_setSize(subEvt, SubEvt_hdrSize());
+ SubEvt_setDecoding(subEvt, SubEvtDecoding_32bitData);
+ SubEvt_setTrigNr(subEvt, trigNr << 8 | trigTag);
+ SubEvt_setId(subEvt, SubEvtId_trigCode);
+ nextId = SubEvtId_trigInfo;
+ break;
+ case SubEvtId_trigInfo:
+ SubEvt_setSize(subEvt, SubEvt_hdrSize());
+ SubEvt_setDecoding(subEvt, SubEvtDecoding_16bitData);
+ SubEvt_setTrigNr(subEvt, trigNr << 8 | trigTag);
+ SubEvt_setId(subEvt, SubEvtId_trigInfo);
+ nextId = SubEvtId_tofTest;
+ break;
+ case SubEvtId_tofTest:
+ SubEvt_setSize(subEvt, SubEvt_hdrSize());
+ SubEvt_setDecoding(subEvt, SubEvtDecoding_32bitData);
+ SubEvt_setTrigNr(subEvt, trigNr << 8 | trigTag);
+ SubEvt_setId(subEvt, SubEvtId_tofTest);
+ nextId = SubEvtId_trigCode;
+ trigTag = dtu->trigTag;
+ trigNr++;
+ break;
}
- SubEvt_setSize(subEvt, SubEvt_hdrSize());
- SubEvt_setDecoding(subEvt, SubEvtDecoding_32bitData);
- SubEvt_setTrigNr(subEvt, trigNr << 24 | trigTag);
- SubEvt_setId(subEvt, SubEvtId_tofTest);
+}
+
+static void readoutDummy(void *subEvt)
+{
+ UInt4 *data = SubEvt_data(subEvt);
+ UInt4 *first = data;
- trigTag++;
- trigNr++;
+ *data++ = 0x01;
+
+ SubEvt_setSize(subEvt, SubEvt_size(subEvt) + sizeof(UInt4) * (data - first));
}
+
void Hardware_readout(const Hardware *my, void *subEvt)
{
int i;
+ HwDtu *dtu = ((Modules *) my->specific)->dtu;
+ HwSis3801 *sis3801 = ((Modules *) my->specific)->sis3801;
+ HwV488 *v556 = ((Modules *) my->specific)->v556;
+ HwV488 *v488 = ((Modules *) my->specific)->v488;
HwV775 **v775 = ((Modules *) my->specific)->v775;
HwV878 **v878 = ((Modules *) my->specific)->v878;
- for (i = 0; i < NV775S; i++) {
- HwV775_readData(v775[i], subEvt);
- }
- for (i = 0; i < NV878S; i++) {
- HwV878_readData(v878[i], subEvt);
+ switch (SubEvt_id(subEvt)) {
+ case SubEvtId_trigCode:
+ readoutDummy(subEvt);
+ break;
+ case SubEvtId_trigInfo:
+ HwV488_readData(v556, subEvt);
+ HwV488_readData(v488, subEvt);
+ HwSis3801_readData(sis3801, subEvt);
+ break;
+ case SubEvtId_tofTest:
+ for (i = 0; i < NV775S; i++) {
+ HwV775_readData(v775[i], subEvt);
+ }
+ for (i = 0; i < NV878S; i++) {
+ HwV878_readData(v878[i], subEvt);
+ }
+ break;
}
}
-indent: Standard input: 93: Error:Stuff missing from end of file.
-static char rcsId[] = "$Header: /misc/hadesprojects/daq/cvsroot/eventbuilder/hadaq/Attic/hwv488.c,v 1.1 1999-09-02 11:20:09 hades Exp $";
+static char rcsId[] = "$Header: /misc/hadesprojects/daq/cvsroot/eventbuilder/hadaq/Attic/hwv488.c,v 1.2 1999-09-05 11:31:55 hades Exp $";
#define _POSIX_C_SOURCE 199309L
#include <unistd.h>
freeMem(my->lvme);
}
-int HwV488_read(HwV488 * my, void *subEvt)
+int HwV488_isEmpty(HwV488 *my) {
+ return !LVme_tstBitW(my->lvme, V488_CTRL_REG, 14);
+}
+
+int HwV488_readData(HwV488 * my, void *subEvt)
{
UInt2 *data = SubEvt_end(subEvt);
- UInt2 *first = data;
UInt2 hdr;
int nWords;
UInt1 trigTag;
msglog(LOG_DEBUG, "V488 First word is header: 0x%04x\n", hdr);
}
+#if 0
trigTag = hdr & 0xff;
if (trigTag != (SubEvt_trigNr(subEvt) & 0xff)) {
msglog(LOG_EMERG, "%s trigNr mismatch: 0x%08x != 0x%02x \n",
- v488->name, SubEvt_trigNr(subEvt), trigTag);
+ my->name, SubEvt_trigNr(subEvt), trigTag);
}
+#endif
nWords = (hdr >> 12 & 0x07) + 1;
while (--nWords >= 0) {
*data++ = LVme_getW(my->lvme, V488_OUT_BUF);
}
- SubEvt_setSize(subEvt, SubEvt_size(subEvt) + (char *) data - (char *) first);
- return 0;
}
+ SubEvt_setSize(subEvt, (char *) data - (char *) subEvt);
+ return 0;
}
unsigned long trigNr;
} HwV488;
-#define V488_NCHANNELS 32
-
#define V488_OUT_BUF 0x18
-#define V488_STAT_REG 0x1a
-#define V488_RANGE_SET 0x14
+#define V488_CTRL_REG 0x1a
+#define V488_RANGE 0x14
#define V488_THRH 0x12
#define V488_THRL 0x10
#define V488_RESET 0x1c
void desHwV488(HwV488 *my);
int HwV488_isEmpty(HwV488 *my);
-int HwV488_readSubEvt(HwV488 *my, void *subEvt);
+int HwV488_readData(HwV488 *my, void *subEvt);
#endif
-static char rcsId[] = "$Header: /misc/hadesprojects/daq/cvsroot/eventbuilder/hadaq/Attic/hwv775.c,v 1.6 1999-09-02 12:38:03 hades Exp $";
+static char rcsId[] = "$Header: /misc/hadesprojects/daq/cvsroot/eventbuilder/hadaq/Attic/hwv775.c,v 1.7 1999-09-05 11:32:17 hades Exp $";
#define _POSIX_C_SOURCE 199309L
#include <unistd.h>
msglog(LOG_DEBUG, "%s:%d:%s\n", __FILE__, __LINE__, strerror(errno));
return -1;
}
- LVme_setW(my->lvme, V775_BIT_SET_1, 0x0080);
- LVme_setW(my->lvme, V775_BIT_CLR_1, 0x0080);
+ LVme_setW(my->lvme, V775_RESET, 0);
LVme_setW(my->lvme, V775_BIT_SET_2, 0x0004);
LVme_setW(my->lvme, V775_BIT_CLR_2, 0x0004);
- LVme_setW(my->lvme, V775_CTRL_REG_2, 0x0002);
+ LVme_setW(my->lvme, V775_CTRL_REG_2, 0x0003);
LVme_setW(my->lvme, V775_CRATE_REG, 0x0000);
LVme_setW(my->lvme, V775_RANGE_SET, Param_getVal(param, my->name, "range"));
LVme_setW(my->lvme, V775_VSET, Param_getVal(param, my->name, "vset"));
msglog(LOG_EMERG, "%s trigNr mismatch: 0x%08x != 0x%02x \n",
my->name, SubEvt_trigNr(subEvt), trigTag);
}
- SubEvt_setSize(subEvt, (char *) data - (char *) subevt);
+ SubEvt_setSize(subEvt, (char *) data - (char *) subEvt);
return 0;
}
#define V775_BIT_CLR_1 0x08
#define V775_STAT_REG_1 0x0e
#define V775_CTRL_REG_1 0x10
+#define V775_RESET 0x18
#define V775_CTRL_REG_2 0x20
#define V775_STAT_REG_2 0x22
#define V775_RANGE_SET 0x2e
-static char rcsId[] = "$Header: /misc/hadesprojects/daq/cvsroot/eventbuilder/hadaq/Attic/hwv878.c,v 1.4 1999-09-02 12:38:03 hades Exp $";
+static char rcsId[] = "$Header: /misc/hadesprojects/daq/cvsroot/eventbuilder/hadaq/Attic/hwv878.c,v 1.5 1999-09-05 11:32:22 hades Exp $";
#define _POSIX_C_SOURCE 199309L
#include <unistd.h>
LVme_setW(my->lvme, V878_BIT_CLR_1, 0x0080);
LVme_setW(my->lvme, V878_BIT_SET_2, 0x0004);
LVme_setW(my->lvme, V878_BIT_CLR_2, 0x0004);
- LVme_setW(my->lvme, V878_BIT_SET_2, 0x8800);
+ LVme_setW(my->lvme, V878_BIT_SET_2, 0x9800);
+ LVme_setW(my->lvme, V878_BIT_CLR_2, 0x4000);
LVme_setW(my->lvme, V878_CRATE_REG, 0x0000);
+ LVme_setW(my->lvme, V878_FCLR_WIN, Param_getVal(param, my->name, "fclr_win"));
LVme_setW(my->lvme, V878_VSET, Param_getVal(param, my->name, "vset"));
LVme_setW(my->lvme, V878_VOFF, Param_getVal(param, my->name, "voff"));
+ LVme_setW(my->lvme, V878_CLR_TIME, Param_getVal(param, my->name, "clr_time"));
for (i = 0; i < V878_NCHANNELS; i++) {
char buf[16];
msglog(LOG_EMERG, "%s trigNr mismatch: 0x%08x != 0x%02x \n",
my->name, SubEvt_trigNr(subEvt), trigTag);
}
- SubEvt_setSize(subEvt, (char *) data - (char *) subevt);
+ SubEvt_setSize(subEvt, (char *) data - (char *) subEvt);
return 0;
}
#define V878_BIT_CLR_1 0x1008
#define V878_STAT_REG_1 0x100e
#define V878_CTRL_REG_1 0x1010
+#define V878_STAT_REG_2 0x1022
+#define V878_FCLR_WIN 0x102E
#define V878_BIT_SET_2 0x1032
#define V878_BIT_CLR_2 0x1034
#define V878_CRATE_REG 0x103c
#define V878_VSET 0x1060
#define V878_VOFF 0x1062
+#define V878_CLR_TIME 0x1066
#define V878_THRESH 0x1080
set soft(size) 1024
-set dtu0(cardbase) 1148190720 ;# 0x44700000
-set dtu0(deadtime) 10
+set dtu(cardbase) 0x44500000
-set tdc0(cardbase) 3992977408 ;# 0xee000000
+set tdc0(cardbase) 0x22020000
set tdc0(threshold00) 0
set tdc0(threshold01) 0
set tdc0(threshold02) 0
set tdc0(threshold29) 0
set tdc0(threshold30) 0
set tdc0(threshold31) 0
-set tdc0(range) 255
-set tdc0(vset) 254
+set tdc0(range) 254
+set tdc0(vset) 255
set tdc0(voff) 0
-set tdc1(cardbase) 3993108480 ;# 0xee000000
+set tdc1(cardbase) 0x22040000
set tdc1(threshold00) 0
set tdc1(threshold01) 0
set tdc1(threshold02) 0
set tdc1(threshold29) 0
set tdc1(threshold30) 0
set tdc1(threshold31) 0
-set tdc1(range) 255
-set tdc1(vset) 254
+set tdc1(range) 254
+set tdc1(vset) 255
set tdc1(voff) 0
set tdc2(cardbase) 3993239552 ;# 0xee000000
set tdc3(vset) 254
set tdc3(voff) 0
-set tdc4(cardbase) 3993370624 ;# 0xee000000
+set tdc4(cardbase) 0xdd000000
set tdc4(threshold00) 0
set tdc4(threshold01) 0
set tdc4(threshold02) 0
set tdc4(threshold29) 0
set tdc4(threshold30) 0
set tdc4(threshold31) 0
-set tdc4(vset) 254
+set tdc4(vset) 148
set tdc4(voff) 0
+set tdc4(fclr_win) 254
+set tdc4(clr_time) 0x8085
-set tdc5(cardbase) 3993370624 ;# 0xee000000
+set tdc5(cardbase) 0xdd020000
set tdc5(threshold00) 0
set tdc5(threshold01) 0
set tdc5(threshold02) 0
set tdc5(threshold29) 0
set tdc5(threshold30) 0
set tdc5(threshold31) 0
-set tdc5(vset) 254
+set tdc5(vset) 148
set tdc5(voff) 0
+set tdc5(fclr_win) 254
+set tdc5(clr_time) 0x8085
-set tdc6(cardbase) 3993370624 ;# 0xee000000
+set tdc6(cardbase) 0xdd040000
set tdc6(threshold00) 0
set tdc6(threshold01) 0
set tdc6(threshold02) 0
set tdc6(threshold29) 0
set tdc6(threshold30) 0
set tdc6(threshold31) 0
-set tdc6(vset) 254
+set tdc6(vset) 148
set tdc6(voff) 0
+set tdc6(fclr_win) 254
+set tdc6(clr_time) 0x8085
-set tdc7(cardbase) 3993370624 ;# 0xee000000
+set tdc7(cardbase) 0xdd060000
set tdc7(threshold00) 0
set tdc7(threshold01) 0
set tdc7(threshold02) 0
set tdc7(threshold29) 0
set tdc7(threshold30) 0
set tdc7(threshold31) 0
-set tdc7(vset) 254
+set tdc7(vset) 148
set tdc7(voff) 0
+set tdc7(fclr_win) 254
+set tdc7(clr_time) 0x8085
-set tdc8(cardbase) 2097408 ;# 0x200100
-set tdc8(lowThreshold) 1
-set tdc8(highThreshold) 198
+set tdc8(cardbase) 0x200000
+set tdc8(ctrl) 0x00ff
+set tdc8(thrl) 1
+set tdc8(thrh) 198
set tdc8(range) 192 ;# 0 = 90ns, 224 = 770ns
-set adc0(cardbase) 0 ;# 0
-set adc0(lowThreshold) 8
-set adc0(highThreshold) 198
+set adc0(cardbase) 0x000000
+set adc0(ctrl) 0x00ff
+set adc0(thrl) 8
+set adc0(thrh) 198
set adc0(delay) 0
+
+set scaler0(cardbase) 0xa0000000
-#!/usr/bin/sh
+:
./daq_evtbuild -p -1 -s 3 -v notice &
echo $! >evtbuild.pid
sleep 1;
./daq_readout -p -2 -v notice &
echo $! >readout.pid
sleep 1;
-./daq_ctrlctu 0 &
+./daq_ctrlctu -v notice &
echo $! >ctrlctu.pid
exit 0
-#!/usr/bin/sh
+:
kill $(cat ctrlctu.pid)
rm ctrlctu.pid
+sleep 1
+sleep 1
kill $(cat readout.pid)
rm readout.pid
+sleep 1
kill $(cat evtbuild.pid)
rm evtbuild.pid
exit 0