added configuration table for ADC AddOn

diff --git a/trb3/IncludedFeaturesTable.tex b/trb3/IncludedFeaturesTable.tex
index 82f0300838a7b15d570f57f39e449439a4b94aeb..6af472ec73a2e514e7b5b848447fdc22d8a3cd3c 100644 (file)
--- a/trb3/IncludedFeaturesTable.tex
+++ b/trb3/IncludedFeaturesTable.tex
@@ -53,5 +53,15 @@ Through Clock Manager (cbmtof only)\\
  & 42       & Spi         & Contains SPI on all relevant I/Os depending on AddOn board design\\
  & 43       & Uart        & Contains an Uart\\
  & 55 -- 52 & Clock       & See table 1\\
+ \hline\hline
+4 & \multicolumn{3}{X|}{``ADC'' - For ADC AddOn designs.}\\
+ & 7 -- 0   & Frequency   & ADC sampling frequency in MHz \\
+ & 11 -- 8  & Processing  & Type of processing logic. 0: basic readout. 1: simple preprocessing. 8:full feature extraction \\
+ & 14       & Baseline    & Baseline determination\\
+ & 15       & Trigger     & Trigger generation\\
+ & 23 -- 16 & Channels    & Number of channels\\
+ & 42       & Spi         & Contains SPI on all relevant I/Os depending on AddOn board design\\
+ & 43       & Uart        & Contains an Uart\\
+ & 55 -- 52 & Clock       & See table 1\\
 \hline
 \end{longtable}