Add option of trigger forwarding to central gbe design

diff --git a/trb3_gbe/trb3_central_gbe.vhd b/trb3_gbe/trb3_central_gbe.vhd
index 07c6aa6e93d8a47d96fb0d7a8658308b5eba53be..dca233ec273a8f1dd14387f8232073390040f179 100644 (file)
--- a/trb3_gbe/trb3_central_gbe.vhd
+++ b/trb3_gbe/trb3_central_gbe.vhd
@@ -955,6 +955,10 @@ gen_TRIG_LOGIC : if INCLUDE_TRIGGER_LOGIC = 1 generate
   trig_inputs <= FPGA4_COMM(10 downto 7) & FPGA3_COMM(10 downto 7) & FPGA2_COMM(10 downto 7) & FPGA1_COMM(10 downto 7); 
 end generate;
 
+gen_no_TRIG_LOGIC : if INCLUDE_TRIGGER_LOGIC = 0 generate
+  TRIGGER_OUT2 <= TRIGGER_RIGHT;
+end generate;
+
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 -- Input Statistics
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