Added ETM info in CTS header and TRBnet data

diff --git a/trb3/CtsBuildingBlocks.tex b/trb3/CtsBuildingBlocks.tex
index 739d15bd850b01100a19332e44530e0dcd51b4d5..563a94f25aa269bec7252181ac8327ebdf40f3fd 100644 (file)
--- a/trb3/CtsBuildingBlocks.tex
+++ b/trb3/CtsBuildingBlocks.tex
@@ -54,7 +54,12 @@
             \multicolumn{3}{|c|}{\addr{24:20}} & &{Number of Trigger Channels used (two words per channel, same format as above)}\\
             \multicolumn{3}{|c|}{\addr{25}} & &{Include \emph{last idle}, \emph{dead time} counters (two words)}\\
             \multicolumn{3}{|c|}{\addr{26}} & &{Include Counters \emph{Trigger asserted}, \emph{Trigger Edges}, \emph{Triggers Accepted} (three words)}\\
-            \multicolumn{3}{|c|}{\addr{27}} & &{Timestamp with resolution of 10 ns / tick (one word) }\\\hline
+            \multicolumn{3}{|c|}{\addr{27}} & &{Timestamp with resolution of 10 ns / tick (one word) }\\
+            \multicolumn{3}{|c|}{\addr{29:28}} & &{00: External Trigger Module (ETM) not present,\newline 
+              01: ETM sends 1 word,\newline
+              10: ETM sends 4 words,\newline
+              11: ETM sends data with header and arbitrary
+              number of words}\\\hline
          \end{tabularx}
          \caption[CTS SubSubEvent Header]{CTS SubSubEvent Header. The upper two bytes describe the package's content. Its total
             length can be computed using the length denoted in the brackets behind each property.  All
@@ -68,14 +73,16 @@
       \begin{tabular}{|r|r|l|}\hline
          Addr & Value & Description \\\hline\hline
 
-         -1   & \texttt{0x002cf3c0} & SubSubEvent Header, indicating a length of 0x11 \\\hline
-         0x00 & \texttt{0x06ee43c01} & CTS Header. \\
+         -1   & \texttt{0x002cf3c0} & SubSubEvent Header, indicating a
+         length of 0x2c and a TrbAddress of 0xf3c0 \\\hline
+         0x00 & \texttt{0x1ee43c01} & CTS Header. \\
                            && ITC status bitmask: 0x3c01\\
                            && Number of Input Counters: 0x4\\
                            && Number of ITC Counters: 0xe\\
                            && Idle/Dead counters: yes\\
                            && Trigger statistics: yes\\
-                           && Timestamp: yes \\\hline\hline
+                           && Timestamp: yes \\
+                           && ETM present, sends 1 word\\\hline\hline
          0x01 & \texttt{0xcb1a3130} & Level Counter Input 0 (\# cycles input was asserted) \\\hline
          0x02 & \texttt{0x00000000} & Edge  Counter Input 0 (\# rising edges) \\\hline
          0x03 & \texttt{0x004118ba} & Level Counter Input 1 (\# cycles input was asserted) \\\hline
@@ -265,4 +272,8 @@
    \end{itemize*}
 
    Both latencies measured have a positive jitter of 10~ns, i.e.\ the sampling period of the CTS running at
-   100~MHz. Thus, the design itself can be considered jitter free.
\ No newline at end of file
+   100~MHz. Thus, the design itself can be considered jitter free.
+%%% Local Variables: 
+%%% mode: latex
+%%% TeX-master: "main"
+%%% End: