+++ /dev/null
-<?xml version="1.0" encoding="UTF-8"?>
-<BaliProject version="3.0" title="CU_trb3_soda_client" device="LFE3-150EA-8FN672C" default_implementation="CU_trb3_soda_client">
- <Options>
- <Option name="HDL type" value="VHDL"/>
- </Options>
- <Implementation title="CU_trb3_soda_client" dir="CU_trb3_soda_client" description="CU_trb3_soda_client" synthesis="synplify" default_strategy="Strategy1">
- <Options def_top="Cu_trb3_periph_sodaclient" top="Cu_trb3_periph_sodaclient"/>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
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- <Options/>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
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- <Options/>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
- </Source>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
- </Source>
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- <Options/>
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- <Options/>
- </Source>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
- </Source>
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- <Options/>
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- <Options/>
- </Source>
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- <Options/>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
- <Source name="../trbnet/lattice/ecp3/fifo/fifo_18x2k_oreg.vhd" type="VHDL" type_short="VHDL">
- <Options/>
- </Source>
- <Source name="../trbnet/lattice/ecp3/fifo/fifo_19x16_obuf.vhd" type="VHDL" type_short="VHDL">
- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
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- <Options/>
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- <Options/>
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- <Options/>
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- <Options/>
- </Source>
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- <Options/>
- </Source>
- <Source name="code/Cu_trb3_periph_sodaclient.vhd" type="VHDL" type_short="VHDL">
- <Options top_module="Cu_trb3_periph_sodaclient"/>
- </Source>
- <Source name="Cu_trb3_soda_client.lpf" type="Logic Preference" type_short="LPF">
- <Options/>
- </Source>
- <Source name="Cu_trb3_soda_client.rvl" type="Reveal" type_short="Reveal">
- <Options/>
- </Source>
- <Source name="Cu_trb3_soda_dual_client.xcf" type="Programming Project File" type_short="Programming" excluded="TRUE">
- <Options/>
- </Source>
- <Source name="code/soda_client_synconstraints.fdc" type="Synplify Design Constraints File" type_short="SDC" excluded="TRUE">
- <Options/>
- </Source>
- </Implementation>
- <Strategy name="Strategy1" file="soda_client1.sty"/>
-</BaliProject>
+++ /dev/null
-rvl_alias "reveal_ist_125" "the_sync_link/rx_full_clk";
-BLOCK RESETPATHS ;
-BLOCK ASYNCPATHS ;
-BLOCK RD_DURING_WR_PATHS ;
-#################################################################
-# Basic Settings
-#################################################################
-# SYSCONFIG MCCLK_FREQ = 2.5;
-# FREQUENCY PORT CLK_PCLK_RIGHT 200 MHz;
-# FREQUENCY PORT "CLK_PCLK_LEFT" 200.000000 MHz ;
-# FREQUENCY PORT CLK_GPLL_LEFT 125 MHz;
-#################################################################
-# Clock I/O
-#################################################################
-#LOCATE COMP "CLK_PCLK_RIGHT" SITE "U20" ;
-#LOCATE COMP "CLK_PCLK_LEFT" SITE "M4" ;
-#LOCATE COMP "CLK_SERDES_INT_RIGHT" SITE "AC18";
-#LOCATE COMP "CLK_SERDES_INT_LEFT" SITE "AC10";s
-LOCATE COMP "CLK_GPLL_RIGHT" SITE "W1" ;
-#LOCATE COMP "CLK_GPLL_LEFT" SITE "U25";
-DEFINE PORT GROUP "CLK_group" "CLK*" ;
-IOBUF GROUP "CLK_group" IO_TYPE=LVDS25 ;
-#################################################################
-# Trigger I/O
-#################################################################
-#Trigger from fan-out
-#LOCATE COMP "TRIGGER_LEFT" SITE "V3";
-#LOCATE COMP "TRIGGER_RIGHT" SITE "N24";
-#IOBUF PORT "TRIGGER_RIGHT" IO_TYPE=LVDS25 ;
-#IOBUF PORT "TRIGGER_LEFT" IO_TYPE=LVDS25 ;
-#################################################################
-# To central FPGA
-#################################################################
-LOCATE COMP "FPGA5_COMM_0" SITE "AD4";
-LOCATE COMP "FPGA5_COMM_1" SITE "AE3";
-LOCATE COMP "FPGA5_COMM_2" SITE "AA7";
-LOCATE COMP "FPGA5_COMM_3" SITE "AB7";
-LOCATE COMP "FPGA5_COMM_4" SITE "AD3";
-LOCATE COMP "FPGA5_COMM_5" SITE "AC4";
-LOCATE COMP "FPGA5_COMM_6" SITE "AE2";
-LOCATE COMP "FPGA5_COMM_7" SITE "AF3";
-LOCATE COMP "FPGA5_COMM_8" SITE "AE4";
-LOCATE COMP "FPGA5_COMM_9" SITE "AF4";
-LOCATE COMP "FPGA5_COMM_10" SITE "V10";
-LOCATE COMP "FPGA5_COMM_11" SITE "W10";
-DEFINE PORT GROUP "FPGA_group" "FPGA*" ;
-IOBUF GROUP "FPGA_group" IO_TYPE=LVCMOS25 PULLMODE=UP ;
-LOCATE COMP "TEST_LINE[0]" SITE "A5" ;
-LOCATE COMP "TEST_LINE[1]" SITE "A6" ;
-LOCATE COMP "TEST_LINE[2]" SITE "G8" ;
-LOCATE COMP "TEST_LINE[3]" SITE "F9" ;
-LOCATE COMP "TEST_LINE[4]" SITE "D9" ;
-LOCATE COMP "TEST_LINE[5]" SITE "D10" ;
-LOCATE COMP "TEST_LINE[6]" SITE "F10" ;
-LOCATE COMP "TEST_LINE[7]" SITE "E10" ;
-LOCATE COMP "TEST_LINE[8]" SITE "A8" ;
-LOCATE COMP "TEST_LINE[9]" SITE "B8" ;
-LOCATE COMP "TEST_LINE[10]" SITE "G10" ;
-LOCATE COMP "TEST_LINE[11]" SITE "G9" ;
-LOCATE COMP "TEST_LINE[12]" SITE "C9" ;
-LOCATE COMP "TEST_LINE[13]" SITE "C10" ;
-LOCATE COMP "TEST_LINE[14]" SITE "H10" ;
-LOCATE COMP "TEST_LINE[15]" SITE "H11" ;
-DEFINE PORT GROUP "TEST_LINE_group" "TEST_LINE*" ;
-IOBUF GROUP "TEST_LINE_group" IO_TYPE=LVCMOS25 PULLMODE=DOWN DRIVE=12 ;
-#################################################################
-# Connection to AddOn
-#################################################################
-LOCATE COMP "LED_LINKOK[1]" SITE "P1" ;#DQLL0_0 #1
-LOCATE COMP "LED_RX[1]" SITE "P2" ;#DQLL0_1 #3
-LOCATE COMP "LED_TX[1]" SITE "T2" ;#DQLL0_2 #5
-LOCATE COMP "SFP_MOD0[1]" SITE "U3" ;#DQLL0_3 #7
-#LOCATE COMP "SFP_MOD1_1" SITE "R1"; #DQLL0_4 #9
-#LOCATE COMP "SFP_MOD2_1" SITE "R2"; #DQLL0_5 #11
-#LOCATE COMP "SFP_RATESEL_1" SITE "N3"; #DQSLL0_T #13
-LOCATE COMP "SFP_TXDIS[1]" SITE "P3" ;#DQSLL0_C #15
-LOCATE COMP "SFP_LOS[1]" SITE "P5" ;#DQLL0_6 #17
-#LOCATE COMP "SFP_TXFAULT_1" SITE "P6"; #DQLL0_7 #19
-LOCATE COMP "LED_LINKOK[2]" SITE "N5" ;#DQLL0_8 #21
-LOCATE COMP "LED_RX[2]" SITE "N6" ;#DQLL0_9 #23
-LOCATE COMP "LED_TX[2]" SITE "AC2" ;#DQLL2_0 #25
-LOCATE COMP "SFP_MOD0[2]" SITE "AC3" ;#DQLL2_1 #27
-#LOCATE COMP "SFP_MOD1_2" SITE "AB1"; #DQLL2_2 #29
-#LOCATE COMP "SFP_MOD2_2" SITE "AC1"; #DQLL2_3 #31
-#LOCATE COMP "SFP_RATESEL_2" SITE "AA1"; #DQLL2_4 #33
-LOCATE COMP "SFP_TXDIS[2]" SITE "AA2" ;#DQLL2_5 #35
-LOCATE COMP "SFP_LOS[2]" SITE "W7" ;#DQLL2_T #37 #should be DQSLL2
-#LOCATE COMP "SFP_TXFAULT_2" SITE "W6"; #DQLL2_C #39 #should be DQSLL2
-LOCATE COMP "LED_LINKOK[3]" SITE "AD1" ;#DQLL3_0 #2
-LOCATE COMP "LED_RX[3]" SITE "AD2" ;#DQLL3_1 #4
-LOCATE COMP "LED_TX[3]" SITE "AB5" ;#DQLL3_2 #6
-LOCATE COMP "SFP_MOD0[3]" SITE "AB6" ;#DQLL3_3 #8
-#LOCATE COMP "SFP_MOD1_3" SITE "AB3"; #DQLL3_4 #10
-#LOCATE COMP "SFP_MOD2_3" SITE "AB4"; #DQLL3_5 #12
-#LOCATE COMP "SFP_RATESEL_3" SITE "Y6"; #DQLL3_T #14 #should be DQSLL3
-LOCATE COMP "SFP_TXDIS[3]" SITE "Y7" ;#DQLL3_C #16 #should be DQSLL3
-LOCATE COMP "SFP_LOS[3]" SITE "AA3" ;#DQLL3_6 #18
-#LOCATE COMP "SFP_TXFAULT_3" SITE "AA4"; #DQLL3_7 #20
-LOCATE COMP "LED_LINKOK[4]" SITE "W8" ;#DQLL3_8 #22
-LOCATE COMP "LED_RX[4]" SITE "W9" ;#DQLL3_9 #24
-LOCATE COMP "LED_TX[4]" SITE "V1" ;#DQLL1_0 #26
-LOCATE COMP "SFP_MOD0[4]" SITE "U2" ;#DQLL1_1 #28
-#LOCATE COMP "SFP_MOD1_4" SITE "T1"; #DQLL1_2 #30
-#LOCATE COMP "SFP_MOD2_4" SITE "U1"; #DQLL1_3 #32
-#LOCATE COMP "SFP_RATESEL_4" SITE "P4"; #DQLL1_4 #34
-LOCATE COMP "SFP_TXDIS[4]" SITE "R3" ;#DQLL1_5 #36
-LOCATE COMP "SFP_LOS[4]" SITE "T3" ;#DQSLL1_T #38
-#LOCATE COMP "SFP_TXFAULT_4" SITE "R4"; #DQSLL1_C #40
-LOCATE COMP "LED_LINKOK[5]" SITE "W23" ;#DQLR1_0 #169
-LOCATE COMP "LED_RX[5]" SITE "W22" ;#DQLR1_1 #171
-LOCATE COMP "LED_TX[5]" SITE "AA25" ;#DQLR1_2 #173
-LOCATE COMP "SFP_MOD0[5]" SITE "Y24" ;#DQLR1_3 #175
-#LOCATE COMP "SFP_MOD1_5" SITE "AA26"; #DQLR1_4 #177
-#LOCATE COMP "SFP_MOD2_5" SITE "AB26"; #DQLR1_5 #179
-#LOCATE COMP "SFP_RATESEL_5" SITE "W21"; #DQSLR1_T #181
-LOCATE COMP "SFP_TXDIS[5]" SITE "W20" ;#DQSLR1_C #183
-LOCATE COMP "SFP_LOS[5]" SITE "AA24" ;#DQLR1_6 #185
-#LOCATE COMP "SFP_TXFAULT_5" SITE "AA23"; #DQLR1_7 #187
-LOCATE COMP "LED_LINKOK[6]" SITE "R25" ;#DQLR2_0 #170
-LOCATE COMP "LED_RX[6]" SITE "R26" ;#DQLR2_1 #172
-LOCATE COMP "LED_TX[6]" SITE "T25" ;#DQLR2_2 #174
-LOCATE COMP "SFP_MOD0[6]" SITE "T24" ;#DQLR2_3 #176
-#LOCATE COMP "SFP_MOD1_6" SITE "T26"; #DQLR2_4 #178
-#LOCATE COMP "SFP_MOD2_6" SITE "U26"; #DQLR2_5 #180
-#LOCATE COMP "SFP_RATESEL_6" SITE "V21"; #DQSLR2_T #182
-LOCATE COMP "SFP_TXDIS[6]" SITE "V22" ;#DQSLR2_C #184
-LOCATE COMP "SFP_LOS[6]" SITE "U24" ;#DQLR2_6 #186
-#LOCATE COMP "SFP_TXFAULT_6" SITE "V24"; #DQLR2_7 #188
-DEFINE PORT GROUP "SFP_group" "SFP*" ;
-IOBUF GROUP "SFP_group" IO_TYPE=LVCMOS25 PULLMODE=UP ;
-#################################################################
-# Additional Lines to AddOn
-#################################################################
-#Lines 0/1 are terminated with 100 Ohm, pads available on 0-3
-#all lines are input only
-#line 4/5 go to PLL input
-#LOCATE COMP "SPARE_LINE_0" SITE "M25"; #194
-#LOCATE COMP "SPARE_LINE_1" SITE "M26"; #196
-#LOCATE COMP "SPARE_LINE_2" SITE "W4"; #198
-#LOCATE COMP "SPARE_LINE_3" SITE "W5"; #200
-#LOCATE COMP "SPARE_LINE_4" SITE "M3"; #DQUL3_8_OUTOFLANE_FPGA__3 #69
-#LOCATE COMP "SPARE_LINE_5" SITE "M2"; #DQUL3_9_OUTOFLANE_FPGA__3 #71
-#################################################################
-# Flash ROM and Reboot
-#################################################################
-LOCATE COMP "FLASH_CLK" SITE "B12" ;
-LOCATE COMP "FLASH_CS" SITE "E11" ;
-LOCATE COMP "FLASH_DIN" SITE "E12" ;
-LOCATE COMP "FLASH_DOUT" SITE "A12" ;
-DEFINE PORT GROUP "FLASH_group" "FLASH*" ;
-IOBUF GROUP "FLASH_group" IO_TYPE=LVCMOS25 PULLMODE=NONE ;
-LOCATE COMP "PROGRAMN" SITE "B11" ;
-IOBUF PORT "PROGRAMN" IO_TYPE=LVCMOS25 PULLMODE=UP DRIVE=8 ;
-#################################################################
-# Misc
-#################################################################
-LOCATE COMP "TEMPSENS" SITE "A13" ;
-IOBUF PORT "TEMPSENS" IO_TYPE=LVCMOS25 PULLMODE=UP DRIVE=8 ;
-#coding of FPGA number
-LOCATE COMP "CODE_LINE[1]" SITE "AA20" ;
-LOCATE COMP "CODE_LINE[0]" SITE "Y21" ;
-IOBUF PORT "CODE_LINE[1]" IO_TYPE=LVCMOS25 PULLMODE=UP ;
-IOBUF PORT "CODE_LINE[0]" IO_TYPE=LVCMOS25 PULLMODE=UP ;
-#terminated differential pair to pads
-LOCATE COMP "SUPPL" SITE "C14" ;
-#IOBUF PORT "SUPPL" IO_TYPE=LVDS25;
-#################################################################
-# LED
-#################################################################
-LOCATE COMP "LED_GREEN" SITE "F12" ;
-LOCATE COMP "LED_ORANGE" SITE "G13" ;
-LOCATE COMP "LED_RED" SITE "A15" ;
-LOCATE COMP "LED_YELLOW" SITE "A16" ;
-DEFINE PORT GROUP "LED_group" "LED*" ;
-IOBUF GROUP "LED_group" IO_TYPE=LVCMOS25 PULLMODE=NONE DRIVE=12 ;
-BLOCK RESETPATHS ;
-BLOCK ASYNCPATHS ;
-BLOCK RD_DURING_WR_PATHS ;
-#################################################################
-#GSR_NET NET "GSR_N";
-#################################################################
-# Locate Serdes and media interfaces
-#################################################################
-LOCATE COMP "THE_MEDIA_UPLINK/gen_serdes_1_200_THE_SERDES/PCSD_INST" SITE "PCSA" ;
-LOCATE COMP "THE_SYNC_LINK/THE_SERDES/PCSD_INST" SITE "PCSA" ;
-
-MULTICYCLE FROM CELL "THE_RESET_HANDLER/rese*" 20.000000 ns ;
-MULTICYCLE TO CELL "THE_SYNC_LINK/SCI_DATA_OUT*" 20.000000 ns ;
-MULTICYCLE TO CELL "THE_SYNC_LINK/sci*" 20.000000 ns ;
-MULTICYCLE FROM CELL "THE_SYNC_LINK/sci*" 20.000000 ns ;
-#MULTICYCLE TO CELL "THE_MEDIA_UPLINK/SCI_DATA_OUT*" 50 ns;
-
-BLOCK JTAGPATHS ;
-## IOBUF ALLPORTS ;
-USE PRIMARY NET "clk_200_osc" ;
-USE PRIMARY NET "clk_100_osc" ;
-FREQUENCY NET "clk_200_osc" 200.000000 MHz ;
-FREQUENCY NET "clk_100_osc" 100.000000 MHz ;
+++ /dev/null
-<?xml version='1.0' encoding='utf-8' ?>
-<!DOCTYPE ispXCF SYSTEM "IspXCF.dtd" >
-<ispXCF version="2.1.0">
- <Comment></Comment>
- <Chain>
- <Comm>JTAG</Comm>
- <Device>
- <SelectedProg value="FALSE"/>
- <Pos>1</Pos>
- <Vendor>Lattice</Vendor>
- <Family>LatticeECP3</Family>
- <Name>LFE3-150EA</Name>
- <IDCode>0x01015043</IDCode>
- <Package>All</Package>
- <PON>LFE3-150EA</PON>
- <Bypass>
- <InstrLen>8</InstrLen>
- <InstrVal>11111111</InstrVal>
- <BScanLen>1</BScanLen>
- <BScanVal>0</BScanVal>
- </Bypass>
- <File>/local/lemmens/lattice/soda/trb3_central_gbe_20130626.bit</File>
- <FileTime>09/24/13 10:52:51</FileTime>
- <Operation>Bypass</Operation>
- <Option>
- <SVFVendor>JTAG STANDARD</SVFVendor>
- <IOState>HighZ</IOState>
- <PreloadLength>1326</PreloadLength>
- <IOVectorData>0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF</IOVectorData>
- <TCKFrequency>1.000000 MHz</TCKFrequency>
- <SVFProcessor>SVF Processor</SVFProcessor>
- <AccessMode>JTAG</AccessMode>
- </Option>
- </Device>
- <Device>
- <SelectedProg value="TRUE"/>
- <Pos>2</Pos>
- <Vendor>Lattice</Vendor>
- <Family>LatticeECP3</Family>
- <Name>LFE3-150EA</Name>
- <IDCode>0x01015043</IDCode>
- <Package>All</Package>
- <PON>LFE3-150EA</PON>
- <Bypass>
- <InstrLen>8</InstrLen>
- <InstrVal>11111111</InstrVal>
- <BScanLen>1</BScanLen>
- <BScanVal>0</BScanVal>
- </Bypass>
- <File>/local/lemmens/lattice/soda/CU_trb3_periph_soda_client_20141112.bit</File>
- <FileTime>11/12/14 10:02:17</FileTime>
- <Operation>Fast Program</Operation>
- <Option>
- <SVFVendor>JTAG STANDARD</SVFVendor>
- <IOState>HighZ</IOState>
- <PreloadLength>1326</PreloadLength>
- <IOVectorData>0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF</IOVectorData>
- <OverideUES value="TRUE"/>
- <TCKFrequency>1.000000 MHz</TCKFrequency>
- <SVFProcessor>ispVM</SVFProcessor>
- <Usercode>0x00000000</Usercode>
- <AccessMode>JTAG</AccessMode>
- </Option>
- </Device>
- <Device>
- <SelectedProg value="FALSE"/>
- <Pos>3</Pos>
- <Vendor>Lattice</Vendor>
- <Family>LatticeECP3</Family>
- <Name>LFE3-150EA</Name>
- <IDCode>0x01015043</IDCode>
- <Package>All</Package>
- <PON>LFE3-150EA</PON>
- <Bypass>
- <InstrLen>8</InstrLen>
- <InstrVal>11111111</InstrVal>
- <BScanLen>1</BScanLen>
- <BScanVal>0</BScanVal>
- </Bypass>
- <File>/home/gsi/bitfiles/trb3_periph_sodasource_20130903.bit</File>
- <FileTime>09/03/13 16:32:30</FileTime>
- <JedecChecksum>N/A</JedecChecksum>
- <Operation>Bypass</Operation>
- <Option>
- <SVFVendor>JTAG STANDARD</SVFVendor>
- <IOState>HighZ</IOState>
- <PreloadLength>1326</PreloadLength>
- <IOVectorData>0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF</IOVectorData>
- <OverideUES value="TRUE"/>
- <TCKFrequency>1.000000 MHz</TCKFrequency>
- <SVFProcessor>ispVM</SVFProcessor>
- <Usercode>0x00000000</Usercode>
- <AccessMode>JTAG</AccessMode>
- </Option>
- </Device>
- <Device>
- <SelectedProg value="FALSE"/>
- <Pos>4</Pos>
- <Vendor>Lattice</Vendor>
- <Family>LatticeECP3</Family>
- <Name>LFE3-150EA</Name>
- <IDCode>0x01015043</IDCode>
- <Package>All</Package>
- <PON>LFE3-150EA</PON>
- <Bypass>
- <InstrLen>8</InstrLen>
- <InstrVal>11111111</InstrVal>
- <BScanLen>1</BScanLen>
- <BScanVal>0</BScanVal>
- </Bypass>
- <Operation>Bypass</Operation>
- <Option>
- <SVFVendor>JTAG STANDARD</SVFVendor>
- <IOState>HighZ</IOState>
- <PreloadLength>1326</PreloadLength>
- <IOVectorData>0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF</IOVectorData>
- <OverideUES value="TRUE"/>
- <TCKFrequency>1.000000 MHz</TCKFrequency>
- <SVFProcessor>ispVM</SVFProcessor>
- <AccessMode>JTAG</AccessMode>
- </Option>
- </Device>
- <Device>
- <SelectedProg value="TRUE"/>
- <Pos>5</Pos>
- <Vendor>Lattice</Vendor>
- <Family>LatticeECP3</Family>
- <Name>LFE3-150EA</Name>
- <IDCode>0x01015043</IDCode>
- <Package>All</Package>
- <PON>LFE3-150EA</PON>
- <Bypass>
- <InstrLen>8</InstrLen>
- <InstrVal>11111111</InstrVal>
- <BScanLen>1</BScanLen>
- <BScanVal>0</BScanVal>
- </Bypass>
- <File>/local/lemmens/lattice/soda/trb3_periph_sodasource_20140915.bit</File>
- <FileTime>09/11/14 08:56:37</FileTime>
- <Operation>Fast Program</Operation>
- <Option>
- <SVFVendor>JTAG STANDARD</SVFVendor>
- <IOState>HighZ</IOState>
- <PreloadLength>1326</PreloadLength>
- <IOVectorData>0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF</IOVectorData>
- <TCKFrequency>1.000000 MHz</TCKFrequency>
- <SVFProcessor>SVF Processor</SVFProcessor>
- <Usercode>0x00000000</Usercode>
- <AccessMode>JTAG</AccessMode>
- </Option>
- </Device>
- <Device>
- <SelectedProg value="TRUE"/>
- <Pos>6</Pos>
- <Vendor>Lattice</Vendor>
- <Family>ispCLOCK</Family>
- <Name>ispPAC-CLK5410D</Name>
- <IDCode>0x00190043</IDCode>
- <Package>64-pin QFNS</Package>
- <PON>ispPAC-CLK5410D-XXSN64C</PON>
- <Bypass>
- <InstrLen>8</InstrLen>
- <InstrVal>11111111</InstrVal>
- <BScanLen>1</BScanLen>
- <BScanVal>0</BScanVal>
- </Bypass>
- <File>/local/lemmens/lattice/trb3/base/clockmanager/CM1_125twice.jed</File>
- <FileTime>04/10/13 09:35:41</FileTime>
- <JedecChecksum>0x1C57</JedecChecksum>
- <Operation>Erase,Program,Verify</Operation>
- <Option>
- <SVFVendor>JTAG STANDARD</SVFVendor>
- <IOState>HighZ</IOState>
- <PreloadLength>32</PreloadLength>
- <IOVectorData>0x00000000</IOVectorData>
- <OverideUES value="TRUE"/>
- <TCKFrequency>1.000000 MHz</TCKFrequency>
- <SVFProcessor>ispVM</SVFProcessor>
- <Usercode>0xFFFFFFFF</Usercode>
- <AccessMode>JTAG</AccessMode>
- </Option>
- </Device>
- <Device>
- <SelectedProg value="FALSE"/>
- <Pos>7</Pos>
- <Vendor>Lattice</Vendor>
- <Family>ispCLOCK</Family>
- <Name>ispPAC-CLK5410D</Name>
- <IDCode>0x00190043</IDCode>
- <Package>64-pin QFNS</Package>
- <PON>ispPAC-CLK5410D-XXSN64C</PON>
- <Bypass>
- <InstrLen>8</InstrLen>
- <InstrVal>11111111</InstrVal>
- <BScanLen>1</BScanLen>
- <BScanVal>0</BScanVal>
- </Bypass>
- <Operation>Bypass</Operation>
- <Option>
- <SVFVendor>JTAG STANDARD</SVFVendor>
- <IOState>HighZ</IOState>
- <PreloadLength>32</PreloadLength>
- <IOVectorData>0x00000000</IOVectorData>
- <OverideUES value="TRUE"/>
- <TCKFrequency>1.000000 MHz</TCKFrequency>
- <SVFProcessor>ispVM</SVFProcessor>
- <AccessMode>JTAG</AccessMode>
- </Option>
- </Device>
- </Chain>
- <ProjectOptions>
- <Program>SEQUENTIAL</Program>
- <Process>ENTIRED CHAIN</Process>
- <OperationOverride>No Override</OperationOverride>
- <StartTAP>TLR</StartTAP>
- <EndTAP>TLR</EndTAP>
- <VerifyUsercode value="FALSE"/>
- </ProjectOptions>
- <CableOptions>
- <CableName>USB</CableName>
- <PortAdd>EzUSB-0</PortAdd>
- </CableOptions>
-</ispXCF>
SCI_ACK : out std_logic := '0';
SCI_NACK : out std_logic := '0';
-- Status and control port
- STAT_OP : out t_HUB_WORD; --std_logic_vector (15 downto 0);
- CTRL_OP : in t_HUB_WORD; --std_logic_vector (15 downto 0) := (others => '0');
+-- STAT_OP : out t_HUB_WORD; --std_logic_vector (15 downto 0);
+-- CTRL_OP : in t_HUB_WORD; --std_logic_vector (15 downto 0) := (others => '0');
+ STAT_OP : out std_logic_vector (63 downto 0);
+ CTRL_OP : in std_logic_vector (63 downto 0) := (others => '0');
STAT_DEBUG : out std_logic_vector (63 downto 0);
CTRL_DEBUG : in std_logic_vector (63 downto 0) := (others => '0')
);
sci_rd => sci_read_i,
sci_wrn => sci_write_i,
- fpga_txrefclk => clk_200_txdata, --clk_200_osc, --clk_200_i(0),
+ fpga_txrefclk => clk_200_txdata,
tx_serdes_rst_c => '0', --tx_serdes_rst(0), -- resets tx_pll PL 1906
tx_pll_lol_qd_s => tx_pll_lol_quad,
tx_sync_qd_c => '0', -- unused; signal to synchronise channels/serdesses for multi-channel protocols
- rst_qd_c => rst_down_quad, -- jemig wat is Oscar toch gasfjkl[glk
+ rst_qd_c => rst_down_quad,
serdes_rst_qd_c => serdes_rst_down_quad
);
THE_RX_FSM : rx_reset_fsm
port map(
RST_N => rst_n(i),
- RX_REFCLK => rx_full_clk(i), --clk_200_osc, -- want de rx_refclk is clk_200_osc !!! en moet er altijd zijn
+ RX_REFCLK => rx_full_clk(i),
TX_PLL_LOL_QD_S => tx_pll_lol(i),
RX_SERDES_RST_CH_C => rx_serdes_rst(i),
RX_CDR_LOL_CH_S => rx_cdr_lol(i),
THE_TX_FSM : tx_reset_fsm
port map(
RST_N => rst_n(i),
- TX_REFCLK => clk_200_txdata, --clk_200_osc,
+ TX_REFCLK => clk_200_txdata,
TX_PLL_LOL_QD_S => tx_pll_lol(i),
RST_QD_C => rst_qd(i),
TX_PCS_RST_CH_C => tx_pcs_rst(i),
SEND_DLM => TX_DLM(i),
SEND_DLM_WORD => TX_DLM_WORD(i),
- SEND_LINK_RESET_IN => CTRL_OP(i)(15),
+ SEND_LINK_RESET_IN => CTRL_OP(i*16 + 15), --CTRL_OP(i)(15),
TX_ALLOW_IN => tx_allow(i),
RX_ALLOW_IN => rx_allow(i),
LINK_PHASE_OUT => link_phase_S(i), --PL!
);
internal_make_link_reset_out(i) <= make_link_reset_i(i) when (IS_SYNC_SLAVE=c_YES) else '0';
- sd_los_i(i) <= SD_LOS_IN(i) when rising_edge(SYSCLK); -- PL!
+-- sd_los_i(i) <= SD_LOS_IN(i) when rising_edge(SYSCLK); --PL! 200115
+ sd_los_i(i) <= SD_LOS_IN(i) when rising_edge(clk_200_txdata);
end generate;
PROC_SCI_CTRL: process
variable cnt : integer range 0 to 4 := 0;
begin
-wait until rising_edge(SYSCLK);
+wait until rising_edge(SYSCLK);\r
SCI_ACK <= '0';
case sci_state is
when IDLE =>
-- internal_make_link_reset_out(i) <= make_link_reset_i(i) when (IS_SYNC_SLAVE=c_YES) else '0';
-- sd_los_i(i) <= SD_LOS_IN(i) when rising_edge(SYSCLK); -- PL!
- STAT_OP(i)(15) <= send_link_reset_i(i) when rising_edge(SYSCLK);
- STAT_OP(i)(14) <= '0';
- STAT_OP(i)(13) <= internal_make_link_reset_out(i) when rising_edge(SYSCLK); --make trbnet reset
- STAT_OP(i)(12) <= '0';
- STAT_OP(i)(11) <= '0';
- STAT_OP(i)(10) <= rx_allow(i);
- STAT_OP(i)(9) <= tx_allow(i);
- STAT_OP(i)(8) <= got_link_ready_i(i);
- STAT_OP(i)(7) <= send_link_reset_i(i);
- STAT_OP(i)(6) <= make_link_reset_i(i);
- STAT_OP(i)(5) <= request_retr_i(i);
- STAT_OP(i)(4) <= start_retr_i(i);
- STAT_OP(i)(3 downto 0) <= x"0" when rx_allow_q(i) = '1' and tx_allow_q(i) = '1' else x"7";
+ STAT_OP(i*16 + 15) <= send_link_reset_i(i) when rising_edge(SYSCLK);
+ STAT_OP(i*16 + 14) <= '0';
+ STAT_OP(i*16 + 13) <= internal_make_link_reset_out(i) when rising_edge(SYSCLK); --make trbnet reset
+ STAT_OP(i*16 + 12) <= '0';
+ STAT_OP(i*16 + 11) <= '0';
+ STAT_OP(i*16 + 10) <= rx_allow(i);
+ STAT_OP(i*16 + 9) <= tx_allow(i);
+ STAT_OP(i*16 + 8) <= got_link_ready_i(i);
+ STAT_OP(i*16 + 7) <= send_link_reset_i(i);
+ STAT_OP(i*16 + 6) <= make_link_reset_i(i);
+ STAT_OP(i*16 + 5) <= request_retr_i(i);
+ STAT_OP(i*16 + 4) <= start_retr_i(i);
+ STAT_OP(i*16 + 3 downto i*16) <= x"0" when rx_allow_q(i) = '1' and tx_allow_q(i) = '1' else x"7";
+\r-- STAT_OP(i)(15) <= send_link_reset_i(i) when rising_edge(SYSCLK);
+-- STAT_OP(i)(14) <= '0';
+-- STAT_OP(i)(13) <= internal_make_link_reset_out(i) when rising_edge(SYSCLK); --make trbnet reset
+-- STAT_OP(i)(12) <= '0';
+-- STAT_OP(i)(11) <= '0';
+-- STAT_OP(i)(10) <= rx_allow(i);
+-- STAT_OP(i)(9) <= tx_allow(i);
+-- STAT_OP(i)(8) <= got_link_ready_i(i);
+-- STAT_OP(i)(7) <= send_link_reset_i(i);
+-- STAT_OP(i)(6) <= make_link_reset_i(i);
+-- STAT_OP(i)(5) <= request_retr_i(i);
+-- STAT_OP(i)(4) <= start_retr_i(i);
+-- STAT_OP(i)(3 downto 0) <= x"0" when rx_allow_q(i) = '1' and tx_allow_q(i) = '1' else x"7";
+
end generate;
end med_ecp3_sfp_4_sync_down_arch;
CLK_100 => rx_half_clk, --SYSCLK,
RESET_IN => rst, --CLEAR, PL!
- TX_DATA_IN => (others => '0'), --MED_DATA_IN,
- TX_PACKET_NUMBER_IN => (others => '0'), --MED_PACKET_NUM_IN,
- TX_WRITE_IN => '0', --MED_DATAREADY_IN,
- TX_READ_OUT => open, --MED_READ_OUT,
+ TX_DATA_IN => MED_DATA_IN,
+ TX_PACKET_NUMBER_IN => MED_PACKET_NUM_IN,
+ TX_WRITE_IN => MED_DATAREADY_IN,
+ TX_READ_OUT => MED_READ_OUT,
TX_DATA_OUT => tx_data,
TX_K_OUT => tx_k,
-------------------------------------------------
THE_RX_CONTROL : rx_control
port map(
- CLK_200 => rx_full_clk, --clk_200_i, PL!
- CLK_100 => rx_half_clk, --SYSCLK,
- RESET_IN => rst, --CLEAR, PL!
+ CLK_200 => rx_full_clk,
+ CLK_100 => rx_half_clk,\r
+ RESET_IN => rst,
- RX_DATA_OUT => open, --MED_DATA_OUT,
- RX_PACKET_NUMBER_OUT => open, --MED_PACKET_NUM_OUT,
- RX_WRITE_OUT => open, --MED_DATAREADY_OUT,
- RX_READ_IN => '0', --MED_READ_IN,
+ RX_DATA_OUT => MED_DATA_OUT,
+ RX_PACKET_NUMBER_OUT => MED_PACKET_NUM_OUT,
+ RX_WRITE_OUT => MED_DATAREADY_OUT,
+ RX_READ_IN => MED_READ_IN,
RX_DATA_IN => rx_data,
RX_K_IN => rx_k,
STAT_DEBUG <= debug_reg;
internal_make_link_reset_out <= make_link_reset_i when IS_SYNC_SLAVE = c_YES else '0';
-sd_los_i <= SD_LOS_IN when rising_edge(SYSCLK); -- PL!
+--sd_los_i <= SD_LOS_IN when rising_edge(SYSCLK); -- PL!
+sd_los_i <= SD_LOS_IN when rising_edge(rx_full_clk); -- PL! 200115
STAT_OP(15) <= send_link_reset_i when rising_edge(SYSCLK);
STAT_OP(14) <= '0';
SCI_ACK : out std_logic := '0';
SCI_NACK : out std_logic := '0';
-- Status and control port
- STAT_OP : out t_HUB_WORD; --std_logic_vector (15 downto 0);
- CTRL_OP : in t_HUB_WORD; --std_logic_vector (15 downto 0) := (others => '0');
+ STAT_OP : out std_logic_vector (63 downto 0);
+ CTRL_OP : in std_logic_vector (63 downto 0) := (others => '0');
STAT_DEBUG : out std_logic_vector (63 downto 0);
CTRL_DEBUG : in std_logic_vector (63 downto 0) := (others => '0')
);
SODACLK => SODACLK,
RESET => RESET,
--Internal Connection
- LINK_PHASE_IN => UPLINK_PHASE_IN, --link_phase_S, PL! 17092014 vergeten ??? of niet nodig ?
+ LINK_PHASE_IN => UPLINK_PHASE_IN, --link_phase_S, PL! 17092014 vergeten ??? of niet nodig ?
SODA_CMD_STROBE_IN => TXsoda_cmd_valid_S(i),
START_OF_SUPERBURST => TXstart_of_superburst_S(i),
SUPER_BURST_NR_IN => TXsuper_burst_nr_S(i)(30 downto 0),
port map(
OSC_CLK => clk_200_osc,
TX_DATACLK => rxup_full_clk,
- SYSCLK => clk_100_osc, -- rx_half_clk is selectively used inside med_ecp3_sfp_4_sync_down.vhd
+ SYSCLK => rxup_half_clk, --clk_100_osc,
RESET => downlink_reset,
CLEAR => downlink_clear,
---------------------------------------------------------------------------------------------------------------------------------------------------------
SCI_NACK => sci2_nack,
--Status and control port
- STAT_OP(0) => med_stat_op(1*16+15 downto 1*16),
- STAT_OP(1) => med_stat_op(6*16+15 downto 6*16),
- STAT_OP(2) => med_stat_op(2*16+15 downto 2*16),
- STAT_OP(3) => med_stat_op(4*16+15 downto 4*16),
-
- CTRL_OP(0) => med_ctrl_op(1*16+15 downto 1*16),
- CTRL_OP(1) => med_ctrl_op(6*16+15 downto 6*16),
- CTRL_OP(2) => med_ctrl_op(2*16+15 downto 2*16),
- CTRL_OP(3) => med_ctrl_op(4*16+15 downto 4*16),
+-- STAT_OP(0) => med_stat_op(1*16+15 downto 1*16),
+-- STAT_OP(1) => med_stat_op(6*16+15 downto 6*16),
+-- STAT_OP(2) => med_stat_op(2*16+15 downto 2*16),
+-- STAT_OP(3) => med_stat_op(4*16+15 downto 4*16),
+ STAT_OP(15 downto 0) => med_stat_op(1*16+15 downto 1*16),
+ STAT_OP(31 downto 16) => med_stat_op(6*16+15 downto 6*16),
+ STAT_OP(47 downto 32) => med_stat_op(2*16+15 downto 2*16),
+ STAT_OP(63 downto 48) => med_stat_op(4*16+15 downto 4*16),
+
+-- CTRL_OP(0) => med_ctrl_op(1*16+15 downto 1*16),
+-- CTRL_OP(1) => med_ctrl_op(6*16+15 downto 6*16),
+-- CTRL_OP(2) => med_ctrl_op(2*16+15 downto 2*16),
+-- CTRL_OP(3) => med_ctrl_op(4*16+15 downto 4*16),
+ CTRL_OP(15 downto 0) => med_ctrl_op(1*16+15 downto 1*16),
+ CTRL_OP(31 downto 16) => med_ctrl_op(6*16+15 downto 6*16),
+ CTRL_OP(47 downto 32) => med_ctrl_op(2*16+15 downto 2*16),
+ CTRL_OP(63 downto 48) => med_ctrl_op(4*16+15 downto 4*16),
STAT_DEBUG => open,
CTRL_DEBUG => (others => '0')
<Option name="HDL type" value="VHDL"/>
</Options>
<Implementation title="soda_hub" dir="soda_hub" description="soda_hub" synthesis="synplify" default_strategy="Strategy1">
- <Options def_top="trb3_periph_sodahub" top="trb3_periph_sodahub"/>
+ <Options top="trb3_periph_sodahub"/>
<Source name="code/version.vhd" type="VHDL" type_short="VHDL">
<Options/>
</Source>
MULTICYCLE TO CELL "THE_HUB_SYNC_UPLINK/PROC_SCI_CTRL.wa_position[0]" 20.000000 ns ;
## IOBUF ALLPORTS ;
-USE PRIMARY NET "clk_200_osc" ;
-USE PRIMARY NET "clk_100_osc" ;
-USE PRIMARY NET "rxup_full_clk" ;
+#USE PRIMARY NET "clk_200_osc" ;
+#USE PRIMARY NET "clk_100_osc" ;
+#USE PRIMARY NET "rxup_full_clk" ;
FREQUENCY NET "clk_200_osc" 200.000000 MHz ;
FREQUENCY NET "clk_100_osc" 100.000000 MHz ;
-FREQUENCY NET "rxup_full_clk" 100.000000 MHz ;
+#FREQUENCY NET "rxup_full_clk" 200.000000 MHz ;
-<Project ModBy="Inserter" SigType="0" Name="/local/lemmens/lattice/soda/soda_hub_probe.rvl" Date="2015-01-07">
+<Project ModBy="Inserter" SigType="0" Name="/local/lemmens/lattice/soda/soda_hub_probe.rvl" Date="2015-01-20">
<IP Version="1_5_062609"/>
<Design DesignEntry="Schematic/VHDL" Synthesis="synplify" DeviceFamily="LatticeECP3" DesignName="soda_hub"/>
- <Core InsertDataset="0" Insert="1" Reveal_sig="2085538867" Name="trb3_periph_sodahub_LA0" ID="0">
+ <Core InsertDataset="0" Insert="1" Reveal_sig="2087239949" Name="trb3_periph_sodahub_LA0" ID="0">
<Setting>
<Clock SampleClk="rxup_full_clk" SampleEnable="0" EnableClk="" EnableClk_Pri="0"/>
<TraceBuffer Implementation="0" BitTimeStamp="0" hasTimeStamp="0" IncTrigSig="1" BufferDepth="64"/>
<Dataset Name="Base">
<Trace>
<Sig Type="SIG" Name="the_hub_sync_uplink/got_link_ready_i"/>
- <Bus Name="the_hub_sync_downlink/got_link_ready_i">
- <Sig Type="SIG" Name="the_hub_sync_downlink/got_link_ready_i:0"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/got_link_ready_i:1"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/got_link_ready_i:2"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/got_link_ready_i:3"/>
- </Bus>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/start_of_superburst"/>
- <Bus Name="the_hub_sync_downlink/rx_allow_q">
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_allow_q:0"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_allow_q:1"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_allow_q:2"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_allow_q:3"/>
- </Bus>
- <Bus Name="the_hub_sync_downlink/tx_allow_q">
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_allow_q:0"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_allow_q:1"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_allow_q:2"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_allow_q:3"/>
- </Bus>
- <Bus Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in">
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:0"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:1"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:2"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:3"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:4"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:5"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:6"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:7"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:8"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:9"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:10"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:11"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:12"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:13"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:14"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:15"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:16"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:17"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:18"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:19"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:20"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:21"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:22"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:23"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:24"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:25"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:26"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:27"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:28"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:29"/>
- <Sig Type="SIG" Name="a_soda_hub/\channel(0)\/packet_builder/super_burst_nr_in:30"/>
- </Bus>
- <Bus Name="a_soda_hub/txstart_of_superburst_s">
- <Sig Type="SIG" Name="a_soda_hub/txstart_of_superburst_s:0"/>
- <Sig Type="SIG" Name="a_soda_hub/txstart_of_superburst_s:1"/>
- <Sig Type="SIG" Name="a_soda_hub/txstart_of_superburst_s:2"/>
- <Sig Type="SIG" Name="a_soda_hub/txstart_of_superburst_s:3"/>
- </Bus>
- <Bus Name="a_soda_hub/txsuper_burst_nr_s[3:0]">
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:0"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:1"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:2"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:3"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:4"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:5"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:6"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:7"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:8"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:9"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:10"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:11"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:12"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:13"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:14"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:15"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:16"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:17"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:18"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:19"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:20"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:21"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:22"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:23"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:24"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:25"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:26"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:27"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:28"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:29"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:30"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:0:31"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:0"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:1"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:2"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:3"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:4"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:5"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:6"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:7"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:8"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:9"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:10"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:11"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:12"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:13"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:14"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:15"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:16"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:17"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:18"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:19"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:20"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:21"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:22"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:23"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:24"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:25"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:26"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:27"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:28"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:29"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:30"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:1:31"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:0"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:1"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:2"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:3"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:4"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:5"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:6"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:7"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:8"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:9"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:10"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:11"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:12"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:13"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:14"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:15"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:16"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:17"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:18"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:19"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:20"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:21"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:22"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:23"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:24"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:25"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:26"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:27"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:28"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:29"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:30"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:2:31"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:0"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:1"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:2"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:3"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:4"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:5"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:6"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:7"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:8"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:9"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:10"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:11"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:12"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:13"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:14"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:15"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:16"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:17"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:18"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:19"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:20"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:21"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:22"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:23"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:24"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:25"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:26"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:27"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:28"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:29"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:30"/>
- <Sig Type="SIG" Name="a_soda_hub/txsuper_burst_nr_s:3:31"/>
+ <Sig Type="SIG" Name="downlink_clear"/>
+ <Sig Type="SIG" Name="downlink_reset"/>
+ <Bus Name="dnlink_phase_s">
+ <Sig Type="SIG" Name="dnlink_phase_s:0"/>
+ <Sig Type="SIG" Name="dnlink_phase_s:1"/>
+ <Sig Type="SIG" Name="dnlink_phase_s:2"/>
+ <Sig Type="SIG" Name="dnlink_phase_s:3"/>
</Bus>
<Bus Name="the_hub_sync_uplink/rx_data">
<Sig Type="SIG" Name="the_hub_sync_uplink/rx_data:0"/>
<Sig Type="SIG" Name="the_hub_sync_uplink/rx_data:6"/>
<Sig Type="SIG" Name="the_hub_sync_uplink/rx_data:7"/>
</Bus>
- <Sig Type="SIG" Name="the_hub_sync_uplink/rx_dlm"/>
- <Bus Name="the_hub_sync_uplink/rx_dlm_word">
- <Sig Type="SIG" Name="the_hub_sync_uplink/rx_dlm_word:0"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/rx_dlm_word:1"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/rx_dlm_word:2"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/rx_dlm_word:3"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/rx_dlm_word:4"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/rx_dlm_word:5"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/rx_dlm_word:6"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/rx_dlm_word:7"/>
- </Bus>
<Sig Type="SIG" Name="the_hub_sync_uplink/rx_k"/>
<Bus Name="the_hub_sync_uplink/tx_data">
<Sig Type="SIG" Name="the_hub_sync_uplink/tx_data:0"/>
<Sig Type="SIG" Name="the_hub_sync_uplink/tx_data:6"/>
<Sig Type="SIG" Name="the_hub_sync_uplink/tx_data:7"/>
</Bus>
- <Sig Type="SIG" Name="the_hub_sync_uplink/tx_dlm"/>
- <Bus Name="the_hub_sync_uplink/tx_dlm_word">
- <Sig Type="SIG" Name="the_hub_sync_uplink/tx_dlm_word:0"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/tx_dlm_word:1"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/tx_dlm_word:2"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/tx_dlm_word:3"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/tx_dlm_word:4"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/tx_dlm_word:5"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/tx_dlm_word:6"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/tx_dlm_word:7"/>
- </Bus>
<Sig Type="SIG" Name="the_hub_sync_uplink/tx_k"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/tx_half_clk_out"/>
- <Sig Type="SIG" Name="the_hub_sync_uplink/rx_half_clk_out"/>
+ <Bus Name="med_ctrl_op">
+ <Sig Type="SIG" Name="med_ctrl_op:15"/>
+ <Sig Type="SIG" Name="med_ctrl_op:31"/>
+ <Sig Type="SIG" Name="med_ctrl_op:47"/>
+ <Sig Type="SIG" Name="med_ctrl_op:63"/>
+ <Sig Type="SIG" Name="med_ctrl_op:79"/>
+ <Sig Type="SIG" Name="med_ctrl_op:95"/>
+ <Sig Type="SIG" Name="med_ctrl_op:111"/>
+ </Bus>
+ <Bus Name="the_hub_sync_downlink/send_link_reset_i">
+ <Sig Type="SIG" Name="the_hub_sync_downlink/send_link_reset_i:0"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/send_link_reset_i:1"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/send_link_reset_i:2"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/send_link_reset_i:3"/>
+ </Bus>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/ctrl_op:15"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/ctrl_op:31"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/ctrl_op:47"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/ctrl_op:63"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/stat_op:15"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/stat_op:31"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/stat_op:47"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/stat_op:63"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/send_link_reset_i"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(1)\/the_rx_control/send_link_reset_i"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(2)\/the_rx_control/send_link_reset_i"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(3)\/the_rx_control/send_link_reset_i"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/send_link_reset_out"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(1)\/the_rx_control/send_link_reset_out"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(2)\/the_rx_control/send_link_reset_out"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(3)\/the_rx_control/send_link_reset_out"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_tx/send_link_reset_in"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(1)\/the_tx/send_link_reset_in"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(2)\/the_tx/send_link_reset_in"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(3)\/the_tx/send_link_reset_in"/>
+ <Sig Type="SIG" Name="the_hub_sync_uplink/send_link_reset_i"/>
+ <Sig Type="SIG" Name="the_hub_sync_uplink/ctrl_op:15"/>
+ <Sig Type="SIG" Name="the_hub_sync_uplink/stat_op:15"/>
+ <Sig Type="SIG" Name="the_hub_sync_uplink/the_rx_control/send_link_reset_i"/>
+ <Sig Type="SIG" Name="the_hub_sync_uplink/the_rx_control/send_link_reset_out"/>
+ <Sig Type="SIG" Name="the_hub_sync_uplink/the_tx/send_link_reset_in"/>
+ <Bus Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/rx_state">
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/rx_state:0"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/rx_state:1"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/rx_state:2"/>
+ </Bus>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/reg_rx_k_in"/>
+ <Bus Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/reg_rx_data_in">
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/reg_rx_data_in:0"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/reg_rx_data_in:1"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/reg_rx_data_in:2"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/reg_rx_data_in:3"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/reg_rx_data_in:4"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/reg_rx_data_in:5"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/reg_rx_data_in:6"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/reg_rx_data_in:7"/>
+ </Bus>
+ <Bus Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/rx_state_bits">
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/rx_state_bits:0"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/rx_state_bits:1"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/rx_state_bits:2"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/rx_state_bits:3"/>
+ </Bus>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/\generated_logic(0)\/the_rx_control/rx_allow_in"/>
+ <Bus Name="the_hub_sync_downlink/rx_allow">
+ <Sig Type="SIG" Name="the_hub_sync_downlink/rx_allow:0"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/rx_allow:1"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/rx_allow:2"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/rx_allow:3"/>
+ </Bus>
+ <Bus Name="the_hub_sync_downlink/tx_allow">
+ <Sig Type="SIG" Name="the_hub_sync_downlink/tx_allow:0"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/tx_allow:1"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/tx_allow:2"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/tx_allow:3"/>
+ </Bus>
+ <Bus Name="the_hub_sync_downlink/got_link_ready_i">
+ <Sig Type="SIG" Name="the_hub_sync_downlink/got_link_ready_i:0"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/got_link_ready_i:1"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/got_link_ready_i:2"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/got_link_ready_i:3"/>
+ </Bus>
+ <Bus Name="the_hub_sync_downlink/rx_allow_q">
+ <Sig Type="SIG" Name="the_hub_sync_downlink/rx_allow_q:0"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/rx_allow_q:1"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/rx_allow_q:2"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/rx_allow_q:3"/>
+ </Bus>
+ <Bus Name="the_hub_sync_downlink/tx_allow_q">
+ <Sig Type="SIG" Name="the_hub_sync_downlink/tx_allow_q:0"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/tx_allow_q:1"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/tx_allow_q:2"/>
+ <Sig Type="SIG" Name="the_hub_sync_downlink/tx_allow_q:3"/>
+ </Bus>
<Bus Name="the_hub_sync_downlink/rx_data[3:0]">
<Sig Type="SIG" Name="the_hub_sync_downlink/rx_data:0:0"/>
<Sig Type="SIG" Name="the_hub_sync_downlink/rx_data:0:1"/>
<Sig Type="SIG" Name="the_hub_sync_downlink/rx_k:2"/>
<Sig Type="SIG" Name="the_hub_sync_downlink/rx_k:3"/>
</Bus>
- <Bus Name="the_hub_sync_downlink/rx_dlm">
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm:0"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm:1"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm:2"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm:3"/>
- </Bus>
- <Bus Name="the_hub_sync_downlink/rx_dlm_word[3:0]">
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:0:0"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:0:1"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:0:2"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:0:3"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:0:4"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:0:5"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:0:6"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:0:7"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:1:0"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:1:1"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:1:2"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:1:3"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:1:4"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:1:5"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:1:6"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:1:7"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:2:0"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:2:1"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:2:2"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:2:3"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:2:4"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:2:5"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:2:6"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:2:7"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:3:0"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:3:1"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:3:2"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:3:3"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:3:4"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:3:5"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:3:6"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/rx_dlm_word:3:7"/>
- </Bus>
<Bus Name="the_hub_sync_downlink/tx_data[3:0]">
<Sig Type="SIG" Name="the_hub_sync_downlink/tx_data:0:0"/>
<Sig Type="SIG" Name="the_hub_sync_downlink/tx_data:0:1"/>
<Sig Type="SIG" Name="the_hub_sync_downlink/tx_k:2"/>
<Sig Type="SIG" Name="the_hub_sync_downlink/tx_k:3"/>
</Bus>
- <Bus Name="the_hub_sync_downlink/tx_dlm">
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm:0"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm:1"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm:2"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm:3"/>
- </Bus>
- <Bus Name="the_hub_sync_downlink/tx_dlm_word[3:0]">
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:0:0"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:0:1"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:0:2"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:0:3"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:0:4"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:0:5"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:0:6"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:0:7"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:1:0"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:1:1"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:1:2"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:1:3"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:1:4"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:1:5"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:1:6"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:1:7"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:2:0"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:2:1"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:2:2"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:2:3"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:2:4"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:2:5"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:2:6"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:2:7"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:3:0"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:3:1"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:3:2"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:3:3"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:3:4"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:3:5"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:3:6"/>
- <Sig Type="SIG" Name="the_hub_sync_downlink/tx_dlm_word:3:7"/>
- </Bus>
</Trace>
<Trigger>
<TU Serialbits="0" Type="0" ID="1" Sig="a_soda_hub/start_of_superburst_s,"/>
<TU Serialbits="0" Type="0" ID="2" Sig="a_soda_hub/soda_cmd_valid_s,"/>
<TU Serialbits="0" Type="0" ID="3" Sig="the_hub_sync_uplink/watchdog_trigger,"/>
<TU Serialbits="0" Type="0" ID="4" Sig="med_stat_op:13,"/>
- <TU Serialbits="0" Type="0" ID="5" Sig="reset_i,"/>
+ <TU Serialbits="0" Type="0" ID="5" Sig="the_hub_sync_uplink/the_tx/send_link_reset_in,"/>
+ <TU Serialbits="0" Type="0" ID="6" Sig="the_hub_sync_downlink/\generated_logic(0)\/the_tx/send_link_reset_in,"/>
<TE MaxSequence="1" MaxEvnCnt="1" ID="1" Resource="1"/>
<TE MaxSequence="2" MaxEvnCnt="1" ID="2" Resource="0"/>
<TE MaxSequence="2" MaxEvnCnt="1" ID="3" Resource="0"/>
<TE MaxSequence="2" MaxEvnCnt="1" ID="4" Resource="0"/>
<TE MaxSequence="2" MaxEvnCnt="1" ID="5" Resource="0"/>
+ <TE MaxSequence="2" MaxEvnCnt="1" ID="6" Resource="0"/>
</Trigger>
</Dataset>
</Core>
<BScanLen>1</BScanLen>
<BScanVal>0</BScanVal>
</Bypass>
- <File>/local/lemmens/lattice/soda/trb3_periph_sodahub_20150107.bit</File>
- <FileTime>01/07/15 13:15:28</FileTime>
+ <File>/local/lemmens/lattice/soda/trb3_periph_sodahub_20150120.bit</File>
+ <FileTime>01/20/15 10:28:57</FileTime>
<Operation>Fast Program</Operation>
<Option>
<SVFVendor>JTAG STANDARD</SVFVendor>
<BScanVal>0</BScanVal>
</Bypass>
<File>/local/lemmens/lattice/soda/trb3_periph_sodaclient_20150113.bit</File>
- <FileTime>01/13/15 09:01:54</FileTime>
+ <FileTime>01/13/15 10:01:17</FileTime>
<Operation>Fast Program</Operation>
<Option>
<SVFVendor>JTAG STANDARD</SVFVendor>
jspc29 / soda.git / commitdiff