CTS: Triggers from periph. FGPAs

diff --git a/trb3/CtsBuildingBlocks.tex b/trb3/CtsBuildingBlocks.tex
old mode 100644 (file)
new mode 100755 (executable)
index e362011..b56c610
--- a/trb3/CtsBuildingBlocks.tex
+++ b/trb3/CtsBuildingBlocks.tex
@@ -1,4 +1,4 @@
-\newpage
+%\newpage
 
 \begin{figure}
   \centering
@@ -200,6 +200,14 @@
    
    The multiplexer introduces an deterministic delay of two system clock cycles, i.e. 20~ns. 
    
+\subsubsection{Triggers from Peripheral FPGAs}
+   Each peripheral FPGA can use its \texttt{FPGA5\_COMM(10)} line to communicate a high-active trigger request to the CTS.
+   The line should be asserted for at least 10~ns, however, can be safely hold up, until a trigger was received via TrbNet.
+   In this case take care, that the line is pulled down before the busy-release is send over the network.
+   
+   Using a bitmask in the CTS, each FPGA line can be selected individually. If any selected line fires, the trigger is
+   propageted using to the ITC. Atmost one module can be synthesised.
+   
 \subsubsection{Coincidence detection}
 \label{sec:cts_bb_trigger_logic_coin}
    \begin{figure}[h]

diff --git a/trb3/CtsGettingStarted.tex b/trb3/CtsGettingStarted.tex
index 5cd10d0a3a4bdfba67e9be6f699b0d84fd946be6..cdc7d8ed3862aef71fe61670259be322beb3bc5d 100644 (file)
--- a/trb3/CtsGettingStarted.tex
+++ b/trb3/CtsGettingStarted.tex
@@ -1,10 +1,10 @@
 
-\subsubsection{Building the design}
-   no content yet
+%\subsubsection{Building the design}
+%   no content yet
    
-\subsubsection{\cmdname{cts} - The console interface}
-\label{sec:cts_gs_cli}
-   no content yet
+%\subsubsection{\cmdname{cts} - The console interface}
+%\label{sec:cts_gs_cli}
+%   no content yet
 
 \subsubsection{The GUI}
 %\emph{For a quick getting started see sections \ref{sec:daq_startup} and \ref{sec:web_interface}.} The GUI is a web application
@@ -12,10 +12,13 @@
 %Perl script\footnote{\filename{~/trbsoft/trb3/cts/htdocs/cts.pl}} can be invoked via the HTTP interface to investigate
 %and manipulate the state of the CTS.
 \begin{warning}
-  It is experienced that the GUI is not displayed correctly with some borwsers
+  It is experienced that the GUI is not displayed correctly with some browsers
   or some versions of the browsers. If you can not see the GUI correctly (no
   plot, no trigger registers etc.), but you are sure, that everything is set
   correctly in your set up and the output of the cts\_gui script doesn't show
   any error messages, then you should try to connect with a different browser.
+  If available, a recent Firefox version is recommended.
 \end{warning}
-   no content yet
+%   no content yet
+
+\newpage

diff --git a/trb3/CtsSlowControl.tex b/trb3/CtsSlowControl.tex
old mode 100644 (file)
new mode 100755 (executable)
index ea544a1..6574e98
--- a/trb3/CtsSlowControl.tex
+++ b/trb3/CtsSlowControl.tex
@@ -170,6 +170,10 @@
       atleast one AddOn Input Multiplexer. It contains one word per module, which is interpreted as an unsigned index for
       the multiplexer. The mapping is defined in table \ref{tab:cts_addon_input_mapping}.
       
+      \item \textbf{\addr{0x13} Peripherial FPGA Trigger Inputs}. This block is present, when CTS was synthesised with
+      \texttt{PERIPH\_TRIGGER\_COUNT} = 1 and contains a single word payload of which the lower four bit are used as
+      a bitmask to select the active FPGAs. The LSB correspondins to FPGA 1, the MSB to FPGA 4.
+      
       \item \textbf{\addr{0x20} Coincidence Configuration}. Each coincidence detection module (see
 ~\ref{sec:cts_bb_trigger_logic_coin}) has one configuration register. Thus, the number of registers
       inside this block matches the number of \texttt{COIN}s.