]> jspc29.x-matter.uni-frankfurt.de Git - dirich.git/commitdiff
change dirich project to new Serdes files
authorJan Michel <j.michel@gsi.de>
Tue, 23 Jun 2020 14:41:59 +0000 (16:41 +0200)
committerJan Michel <j.michel@gsi.de>
Tue, 23 Jun 2020 14:41:59 +0000 (16:41 +0200)
dirich/dirich.prj

index b0f7c89316b4cea40f7a57c731932a132583b6a5..f7dee802736744bffefb704bf05413a06aa43f56 100644 (file)
@@ -136,9 +136,11 @@ add_file -vhdl -lib work "../../trbnet/media_interfaces/med_ecp5_sfp_sync.vhd"
 #add_file -verilog -lib work "diamond/pcs/serdes_sync_0/serdes_sync_0_softlogic.v"
 #add_file -vhdl -lib work "diamond/pcs/serdes_sync_0/serdes_sync_0.vhd"
 #add_file -vhdl -lib work "diamond/pcs/pcs.vhd"
-add_file -verilog -lib work "../../trbnet/media_interfaces/ecp5/serdes_sync_0/serdes_sync_0_softlogic.v"
-add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/serdes_sync_0/serdes_sync_0.vhd"
-add_file -vhdl -lib work "../cores/pcs.vhd"
+add_file -verilog -lib work "../../trbnet/media_interfaces/ecp5/serdes_sync_0_softlogic.v"
+add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/chan0_0/serdes_sync_0.vhd"
+add_file -vhdl -lib work "../../trbnet/media_interfaces/ecp5/pcs.vhd"
+
+
 
 #TrbNet Endpoint
 add_file -vhdl -lib work "../../trbnet/trb_net16_term_buf.vhd"