fixed farich setup_script, mt

diff --git a/base/serials_farich.db b/base/serials_farich.db
index fdd5f1283b5ed74aafecb492d14857939ade5c86..6e9ea28eb9a95670c22d29f56b0979de00558db3 100644 (file)
--- a/base/serials_farich.db
+++ b/base/serials_farich.db
@@ -31,3 +31,6 @@
 0241    0x0000d75d00552941
 0251    0x00001c5700572941
 0261    0x0000020800572941
+
+0271    0x0000667700562941
+0281    0x0000e35900562941

diff --git a/base/serials_farich_concentrator.db b/base/serials_farich_concentrator.db
index ca792edaad5f50aff0507761e7fdf800f900f1f4..204e3886b98fc4d3f32ec712926a7823283be6da 100644 (file)
--- a/base/serials_farich_concentrator.db
+++ b/base/serials_farich_concentrator.db
@@ -1,4 +1,5 @@
 # concentrator/combiner for FaRICH
    0010      0x6c00000c890ac828
    0020      0x8000000c88a6ae28
+   0030      0x9400000c890ac328
    

diff --git a/users/gsi_ee_trb84/db/addresses_farich_concentrator.db b/users/gsi_ee_trb84/db/addresses_farich_concentrator.db
index 73756bd3e1584d23aa509d9276455064ef03bf02..dc93e1cdc820ea113112120e0b2dba74822cacc9 100644 (file)
--- a/users/gsi_ee_trb84/db/addresses_farich_concentrator.db
+++ b/users/gsi_ee_trb84/db/addresses_farich_concentrator.db
@@ -1,4 +1,5 @@
 # concentrator/combiner
 0x8500    001   0
 0x8501    002   0
+0x8501    003   0
 

diff --git a/users/gsi_ee_trb84/startup_461.sh b/users/gsi_ee_trb84/startup_461.sh
index 3d4a5969e130b7324864cb2dea38f40e0e0cbd18..00185073982984a5f6523c0b09f546553308fa6a 100755 (executable)
--- a/users/gsi_ee_trb84/startup_461.sh
+++ b/users/gsi_ee_trb84/startup_461.sh
@@ -91,18 +91,18 @@ echo "TDC settings end"
 trbcmd w 0xfffe 0xc5 0x50ff
 
 #Dirich-Concentrator: enable reference time from RJ45
-######trbcmd loadbit 0x8300 0xd580 0x6 0x6
+trbcmd loadbit 0x8501 0xd580 0x6 0x6
 
 echo "pulser"
 # pulser #0 to 10 kHz
-trbcmd w 0xc001 0xa146 0x00000b4 # set pulser frequency to 50kHz
-trbcmd w 0xc001 0xa147 0x00004b4 # set pulser frequency to 50kHz
-trbcmd w 0xc001 0xa148 0x00074b4 # set pulser frequency to 50kHz
+trbcmd w 0xc001 0xa153 0x00002b4 # set pulser frequency to 100kHz
+trbcmd w 0xc001 0xa154 0x00004b4 # set pulser frequency to 50kHz
+trbcmd w 0xc001 0xa156 0x00002b4 # set pulser frequency to 100kHz
 #trbcmd w 0xc001 0xa150 0x0022270f   
 
 echo "trigger type"
 # set trigger type to 0x1
-trbcmd setbit 0xc001 0xa14f 0x1
+trbcmd setbit 0xc001 0xa158 0x1
 
 
 #trbcmd clearbit 0x1130 0xc801 0x80000000 # disable window
@@ -131,55 +131,19 @@ echo "pulser frequency"
 #trbcmd w 0xc001 0xa154 0x3e7 # Pulser 1: 100kHz
 #trbcmd w 0xc001 0xa155 0x3e7 # Pulser 2: 100kHz
 
-
-# only for tdcv4
-
-# ./tdcv4_caltrg_init_new.sh 0xfe53
-# #./tdcv4_caltrg_init.sh 0xfe55
-
-
-
-# trbcmd setbit 0xfe53 0xcd00 0x08000000  # enable TDL of RefChan
-# trbcmd setbit 0xfe55 0xcd00 0x08000000  # enable TDL of RefChan
-# #trbcmd w 0xfe53 0xcd12 0x2801 # enable channels
-# #trbcmd w 0xfe53 0xcd22 0x8002 # enable channels
-# trbcmd clearbit 0xfe53 0xcd00 0x1
-# trbcmd clearbit 0xfe55 0xcd00 0x1
-
-
-# # set Oscillator frequency
-# trbcmd loadbit 0xfe53 0xcd24 0xff000000 0x60000000  # 8 LSBs of oscillator frequency in units of 10kHz
-# trbcmd loadbit 0xfe53 0xcd25 0xff000000 0x6d000000  # 8 MSBs of oscillator frequency in units of 10kHz
-
-# trbcmd loadbit 0xfe55 0xcd24 0xff000000 0x60000000  # 8 LSBs of oscillator frequency in units of 10kHz
-# trbcmd loadbit 0xfe55 0xcd25 0xff000000 0x6d000000  # 8 MSBs of oscillator frequency in units of 10kHz
-
-
-# #enable Hitcounters TDCv4
-# trbcmd setbit   0xfe53 0xcd00 0x200
-# trbcmd clearbit 0xfe53 0xcd00 0x100
-
-# trbcmd setbit   0xfe55 0xcd00 0x200
-# trbcmd clearbit 0xfe55 0xcd00 0x100
-
-
-
-# # Stretcher
-# trbcmd loadbit 0xfe53 0xcd17 0xffff 0xffff  # enable Stretcher for Channels 15..0
-# trbcmd loadbit 0xfe53 0xcd27 0xffff 0xffff  # enable Stretcher for Channels 31..16
-# trbcmd setbit  0xfe53 0xcd00 0x40000000     # enable Stretcher for Reference Channel
-
-# trbcmd loadbit 0xfe55 0xcd17 0xffff 0xffff  # enable Stretcher for Channels 15..0
-# trbcmd loadbit 0xfe55 0xcd27 0xffff 0xffff  # enable Stretcher for Channels 31..16
-# trbcmd setbit  0xfe55 0xcd00 0x40000000     # enable Stretcher for Reference Channel
+./tdcv4_setup.sh 0xfe55
+./tdcv4_setup.sh 0xfe53
 
 # # Enable
-# #./tdcv4_enable_channels.sh 0xfe53 0x11 0x0 #enable channel 5 and 0
-# ./tdcv4_enable_channels.sh 0xfe53 0xf 0xf #enable channel 5 and 0
+#./tdcv4_enable_channels.sh 0xfe55 0xf 0xf #enable channels
 
 # ./tdcv4_enable_channels.sh 0xfe55 0xf 0xf #enable channel 5 and 0 
 # end of tdcv4 block
 
+#~/trbsoft/daqtools/tools/switchport.pl 0xc001 all off 1
+#~/trbsoft/daqtools/tools/switchport.pl 0xc001 all off 3
+
+
 echo "pulser enable"
 trbcmd setbit 0xc001 0xa101 0x2
 # pulser enable

diff --git a/users/gsi_ee_trb84/tdcv4_caltrg_init_new.sh b/users/gsi_ee_trb84/tdcv4_caltrg_init_new.sh
index 39386fd3e089f653824cf5d9940d70beb273432f..975f8495de4f15d37f4ccd0fe03ee8b600ccae9f 100755 (executable)
--- a/users/gsi_ee_trb84/tdcv4_caltrg_init_new.sh
+++ b/users/gsi_ee_trb84/tdcv4_caltrg_init_new.sh
@@ -4,6 +4,7 @@ trbcmd loadbit $ADDR 0xcd26 0xff000000 0x12000000  # 8 LSBs of oscillator freque
 trbcmd loadbit $ADDR 0xcd27 0xff000000 0x7a000000  # 8 MSBs of oscillator frequency in units of 10kHz
 trbcmd setbit $ADDR 0xcd28 0x20000000              # Frequency is precise
 trbcmd setbit $ADDR 0xcd01 0x04000000              # Enable calibration clock
-trbcmd loadbit $ADDR 0xcd01 0xff 0x7c              # 8 / OscFreq = 25.6ns, all channels, 1 Pulse per trigger
+#trbcmd loadbit $ADDR 0xcd01 0xff 0x7c              # 8 / OscFreq = 25.6ns, all channels, 1 Pulse per trigger
+trbcmd loadbit $ADDR 0xcd01 0xff 0x3c              # 4 / OscFreq = 25.8ns, all channels, 1 Pulse per trigger, only for testdesign with internal osc
 trbcmd w $ADDR 0xcd30 0x1000                       # set frequency divider
 trbcmd w $ADDR 0xcd30 0x800                        # set calibration parameters

diff --git a/users/gsi_ee_trb84/tdcv4_setup.sh b/users/gsi_ee_trb84/tdcv4_setup.sh
new file mode 100755 (executable)
index 0000000..d0c9a9f
--- /dev/null
+++ b/users/gsi_ee_trb84/tdcv4_setup.sh
@@ -0,0 +1,33 @@
+ADDR=$1
+
+
+trbcmd loadbit  $ADDR 0xcd24 0xff000000 0x30000000  # 8 LSBs of sampling clock in units of 10kHz
+trbcmd loadbit  $ADDR 0xcd25 0xff000000 0x75000000  # 8 MSBs of sampling clock in units of 10kHz
+trbcmd setbit   $ADDR 0xcd28 0x10000000             # Frequency is precise
+trbcmd loadbit  $ADDR 0xcd26 0xff000000 0x12000000  # 8 LSBs of cal-oscillator frequency in units of 10kHz
+trbcmd loadbit  $ADDR 0xcd27 0xff000000 0x7a000000  # 8 MSBs of cal-oscillator frequency in units of 10kHz
+trbcmd setbit   $ADDR 0xcd28 0x20000000             # Frequency is precise
+
+trbcmd setbit   $ADDR 0xcd00 0x200                  # Programmable Hit Counter Gate: : Enable hits
+trbcmd clearbit $ADDR 0xcd00 0x100                  # Programmable Hit Counter Reset : remove reset
+
+trbcmd loadbit  $ADDR 0xcd17 0xffff 0xffff          # enable Stretcher for Channels 15..0
+trbcmd loadbit  $ADDR 0xcd27 0xffff 0xffff          # enable Stretcher for Channels 31..16
+trbcmd w        $ADDR 0xcd12 0xffff                 # enable TDL-channels 0-15
+trbcmd w        $ADDR 0xcd22 0xffff                 # enable TDL-channels 16-31
+trbcmd w        $ADDR 0xcd10 0                      # Un-Block input buffer, no built-in self-test
+trbcmd w        $ADDR 0xcd20 0                      # Un-Block input buffer, no built-in self-test
+
+trbcmd setbit   $ADDR 0xcd00 0x40000000             # enable Stretcher for Reference Channel
+trbcmd setbit   $ADDR 0xcd00 0x08000000             # Enable TDL for Reference Channel
+trbcmd clearbit $ADDR 0xcd00 0x02000000             # Un-Block Input Buffer of the Reference Channel
+
+trbcmd setbit   $ADDR 0xcd01 0x04000000             # Enable calibration clock
+trbcmd loadbit  $ADDR 0xcd01 0xff 0x7c              # 8 / OscFreq = 25.6ns, all channels, 1 Pulse per trigger
+                                                    # 312MHz => 0x7c; 200MHz => 0x4c, internal Osc (155MHz) => 0x3c.
+
+trbcmd clearbit $ADDR 0xcd00 0x1                    # release Programmable TDC Reset
+
+trbcmd w        $ADDR 0xcd30 0x1000                 # set frequency divider
+trbcmd w        $ADDR 0xcd30 0x800                  # set calibration parameters
+