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+One of the most important aspects of particle identification
+experiments is the digitisation of time, amplitude and charge data
+from detectors. These conversions are done mostly with Application
+Specific ICs (ASICs). However, the recent developments in Field
+Programmable Gate Array (FPGA) technology allow us to use commercial
+electronic components for the required Front-End Electronics (FEE) and
+do the digitisation in the FPGA. It is possible to do Time-of-Flight
+(ToF), Time-over-Threshold (ToT), amplitude and charge measurements
+with converters implemented in FPGA. We call this principle come &
+kiss: Use COMplex COMmercial Elements & Keep It Small and Simple.
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+Particle identification in nuclear physics experiments requires the
+digitisation of analogue data generated by the detectors, such as
+time, amplitude and charge information. Up to now digitisation of data
+is done mainly by Application Specific Integrated Circuits (ASICs),
+which requires a long time and a lot of resources for development.
+With the recent developments in the Field Programmable Gate Array
+(FPGA) technology, it is now possible to use FPGAs for data
+digitisation by using complex commercial electronic components for the
+necessary Front-End Electronics (FEE). We call this concept come &
+kiss: COMplex COMmercial Elements & Keep It Small and Simple.
+
+To gain the time information (e.g., Time-of-Flight (ToF) or
+Time-over-Threshold (ToT)) of a signal generated by the necessary
+detectors, it is pre-amplified using available cell phone amplifiers
+to a certain level. The amplified signal is digitised in an FPGA
+differential input buffer used as a discriminator. By this
+configuration the time information of the particle is encoded in the
+rising and falling edges of a digital pulse. ToF measurements can be
+carried out by measuring the rising edges of 2 signals, whereas the
+ToT measurements can be done by measuring the pulse width of the
+discriminated signal. For precise time measurements a Time-to-Digital
+Converter (TDC) is implemented in the FPGA with high time resolution
+(<15 ps RMS).
+
+For amplitude measurements an Analogue-to-Digital
+Converter (ADC) can be implemented in a FPGA by means of a TDC. The
+signal to be measured is applied to a differential input buffer of an
+FPGA with a reference voltage generated by a linear sawtooth generator
+on the second input. The differential buffer behaves as a comparator
+and generates a digital signal at the crossing of the reference
+sawtooth signal and the analogue signal. From the shape of the
+reference signal and the switching time measured by the TDC the
+amplitude of the input signal can be calculated.
+
+Charge measurements are done in a similar fashion. The charge of the
+signal above the threshold is encoded in the width of a digital pulse
+via a constant current discharge of the integrated signal. The width
+of the pulse is proportional to the charge of the analogue signal.
+Using a TDC the width of the pulse is measured and the charge value is
+calculated. The FPGA based data digitisation has advantages over the
+traditional ASIC solutions as well as disadvantages. The components
+used for a come & kiss system, basic cell phone amplifiers and FPGAs,
+are cheap and are always easily available removing the risks of mature
+devices. This method doesn't require as much amount of time, resource
+and cost as an ASIC design and has the advantage of being easily
+adaptable to different requirements. Of course, creating a solution by
+using commercial components is not as small as a special ASIC
+solution.
+
+For all described digitisation methods test boards were developed and
+the results and limits are presented.
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