signal make_link_reset_real_i : std_logic := '0';
signal send_link_reset_real_i : std_logic := '0';
-signal reset_i, rst_n : std_logic;
+signal reset_i, rst_n, rst_n_tx : std_logic;
signal media_med2int_i : MED2INT;
begin
+rst_n_tx <= not (CLEAR or make_link_reset_real_i);
rst_n <= not (CLEAR or sd_los_i or make_link_reset_real_i);
reset_i <= (CLEAR or sd_los_i or make_link_reset_real_i);
-------------------------------------------------
THE_RX_FSM : rx_reset_fsm
port map(
- RST_N => RST_N,
+ RST_N => rst_n,
RX_REFCLK => CLK_REF,
TX_PLL_LOL_QD_S => TX_LOL,
RX_SERDES_RST_CH_C => RX_SERDES_RST,
THE_TX_FSM : tx_reset_fsm
port map(
- RST_N => RST_N,
+ RST_N => rst_n_tx,
TX_REFCLK => CLK_REF,
TX_PLL_LOL_QD_S => TX_LOL,
RST_QD_C => QUAD_RST,