]> jspc29.x-matter.uni-frankfurt.de Git - dirich.git/commitdiff
include original register 0x006 information to calibration entity
authorAdrian Weber <adrian.a.weber@exp2.physik.uni-giessen.de>
Mon, 1 Feb 2021 15:04:51 +0000 (16:04 +0100)
committerAdrian Weber <adrian.a.weber@exp2.physik.uni-giessen.de>
Mon, 1 Feb 2021 15:04:51 +0000 (16:04 +0100)
combiner_cts/code_EBR/Calibration.vhd

index 5870c2fd9e5d7a0cff86dc40c322ac804ff808f0..93fcb5d3acc47c583a77011d0cf700f05cc524ee 100644 (file)
@@ -268,9 +268,7 @@ begin
                           BUS_TX.data( 9 downto  0) <= Bus_min;
         when x"5"     =>  BUS_TX.data(31 downto 10) <= (others => '0');
                           BUS_TX.data( 9 downto  0) <= Bus_max;
-        when x"6"      => BUS_TX.data(31 downto 16) <= (others => '0');
-                          BUS_TX.data(15 downto  0) <= MY_ADDRESS_IN;
-                          --BUS_TX.data <= std_logic_vector(docal_debug_in);
+        when x"6"      => BUS_TX.data <= std_logic_vector(docal_debug_in);
         when x"7"      => BUS_TX.data <= std_logic_vector(docal_debug_out);
         when x"8"      => BUS_TX.data(11 downto  8) <= FPGA_Lim;
                           BUS_TX.data(7) <= '0';