]> jspc29.x-matter.uni-frankfurt.de Git - trb3sc.git/commitdiff
update beamabort project files
authorJan Michel <michel@physik.uni-frankfurt.de>
Wed, 12 Apr 2023 12:06:29 +0000 (14:06 +0200)
committerJan Michel <michel@physik.uni-frankfurt.de>
Wed, 12 Apr 2023 12:06:29 +0000 (14:06 +0200)
shutdownlogic/config.vhd
shutdownlogic/config_compile_frankfurt.pl
shutdownlogic/trb3sc_basic.prj

index 246f612bf53799d88f42168a1f7fb981874a6bd0..1725ffb7726e9db71e24797818daefdad592051b 100644 (file)
@@ -30,10 +30,11 @@ package config is
 --set to 0 for backplane serdes, set to 3 for front SFP serdes
     constant SERDES_NUM             : integer := 3;
    
-    constant INCLUDE_UART           : integer  := c_YES;
+    constant INCLUDE_UART           : integer  := c_NO;
     constant INCLUDE_SPI            : integer  := c_YES;
+    constant INCLUDE_ADC            : integer  := c_YES; 
     constant INCLUDE_I2C            : integer  := c_NO;
-    constant INCLUDE_DEBUG_INTERFACE: integer  := c_YES;
+    constant INCLUDE_DEBUG_INTERFACE: integer  := c_NO;
 
     --input monitor and trigger generation logic
     constant INCLUDE_TRIGGER_LOGIC  : integer  := c_YES;
index 5f49246b9e1796a95cdc9bf7cde28047cd5add1b..882ea3056cdf6fae77b535292d1b356fa9396d80 100644 (file)
@@ -1,8 +1,8 @@
 TOPNAME                      => "trb3sc_basic",
 lm_license_file_for_synplify => "27020\@jspc29", #"27000\@lxcad01.gsi.de";
 lm_license_file_for_par      => "1702\@hadeb05.gsi.de",
-lattice_path                 => '/d/jspc29/lattice/diamond/3.11_x64',
-synplify_path                => '/d/jspc29/lattice/synplify/P-2019.09-SP1/',
+lattice_path                 => '/d/jspc29/lattice/diamond/3.12',
+synplify_path                => '/d/jspc29/lattice/synplify/S-2021.09-SP2/',
 #synplify_command             => "/d/jspc29/lattice/diamond/3.6_x64/bin/lin64/synpwrap -fg -options",
 # synplify_command             => "/d/jspc29/lattice/synplify/J-2014.09-SP2/bin/synplify_premier_dp",
 
index 3f87e9e04980784fc200d8cf698072827bcfc794..f698ed837e137ace7352e219c605781c06d6c4d0 100644 (file)
@@ -109,7 +109,7 @@ add_file -vhdl -lib work "../../trbnet/special/spi_slim.vhd"
 add_file -vhdl -lib work "../../trbnet/special/spi_databus_memory.vhd"
 add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/trb3sc_tools.vhd"
-add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd"
+#add_file -vhdl -lib work "../../trb3sc/code/lcd.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/debuguart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart.vhd"
 add_file -vhdl -lib work "../../trbnet/special/uart_rec.vhd"
@@ -119,6 +119,8 @@ add_file -vhdl -lib work "../../trb3sc/code/load_settings.vhd"
 add_file -vhdl -lib work "../../trb3sc/code/spi_master_generic.vhd"
 add_file -vhdl -lib work "../../trb3/base/code/input_to_trigger_logic_record.vhd"
 add_file -vhdl -lib work "../../trb3/base/code/input_statistics.vhd"
+add_file -vhdl -lib work "../../trbnet/basics/ram_dp_19x8_preset.vhd"
+add_file -vhdl -lib work "../../trb3sc/code/adc_controller.vhd"
 
 #SlowControl files
 add_file -vhdl -lib work "../../trbnet/trb_net16_regio_bus_handler.vhd"