-- SERDES_200N : in std_logic;
-- SERDES_200P : in std_logic;
-- ADO_LV : in std_logic_vector(61 downto 0);
+ --addon connector
ADO_TTL : inout std_logic_vector(46 downto 0);
+ --diode
DBAD : out std_logic;
DGOOD : out std_logic;
DINT : out std_logic;
TX_DIS : out std_logic_vector(16 downto 1);
IPLL : out std_logic;
OPLL : out std_logic;
+ --data to/from optical tranceivers
SFP_INP_N : in std_logic_vector(15 downto 0);
SFP_INP_P : in std_logic_vector(15 downto 0);
SFP_OUT_N : out std_logic_vector(15 downto 0);
);
end component;
component flexi_PCS_synch
- generic (
- HOW_MANY_CHANNELS : positive);
- port (
- CLK : in std_logic_vector((HOW_MANY_CHANNELS+3)/4-1 downto 0);
- RX_CLK : in std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*4-1 downto 0);
- RESET : in std_logic;
- RXD : in std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0);
- RXD_SYNCH : out std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0);
- RX_K : in std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*8-1 downto 0);
- RX_RST : out std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
- CV : in std_logic_vector(HOW_MANY_CHANNELS*2-1 downto 0);
- TXD : in std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0);
- TXD_SYNCH : out std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0);
- TX_FORCE_DISP : out std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
- DATA_VALID_IN : in std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
- DATA_VALID_OUT : out std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
- FLEXI_PCS_SYNCH_STATUS : out std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0)
- );
+ generic (
+ HOW_MANY_CHANNELS : positive);
+ port (
+ CLK : in std_logic_vector(((HOW_MANY_CHANNELS+3)/4)-1 downto 0);
+ RX_CLK : in std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*4-1 downto 0);
+ RESET : in std_logic;
+ RXD : in std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*64-1 downto 0);
+ MED_DATA_OUT : out std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0);
+ RX_K : in std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*8-1 downto 0);
+ RX_RST : out std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*4-1 downto 0);
+ CV : in std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*8-1 downto 0);
+ MED_DATA_IN : in std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0);
+ TXD_SYNCH : out std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*64-1 downto 0);
+ TX_FORCE_DISP : out std_logic_vector(((HOW_MANY_CHANNELS+3)/4)*8-1 downto 0);
+ MED_DATAREADY_IN : in std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
+ MED_DATAREADY_OUT : out std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
+ FLEXI_PCS_SYNCH_STATUS : out std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0);
+ MED_PACKET_NUM_IN : in std_logic_vector(HOW_MANY_CHANNELS*2-1 downto 0);
+ MED_PACKET_NUM_OUT : out std_logic_vector(HOW_MANY_CHANNELS*2-1 downto 0);
+ MED_READ_IN : in std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
+ MED_READ_OUT : out std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
+ MED_ERROR_OUT : out std_logic_vector(HOW_MANY_CHANNELS*3-1 downto 0)
+ );
end component;
component pll_ref
port (
end component;
component trb_net16_hub_base
generic (
- MUX_SECURE_MODE : integer range 0 to 1;
- MUX_WIDTH : integer range 1 to 3;
- DATA_WIDTH : integer range 16 to 16;
- NUM_WIDTH : integer range 2 to 2;
- HUB_ADDRESS : std_logic_vector(15 downto 0);
- HUB_CTRL_CHANNELNUM : integer range 0 to 3 :=3;
- HUB_CTRL_DEPTH : integer range 0 to 6;
- HUB_CTRL_REG_ADDR_WIDTH : integer range 1 to 7;
- MII_NUMBER : integer range 2 to 16;
--- MII_INIT_DEPTH : hub_iobuf_config_t;
--- MII_REPLY_DEPTH : hub_iobuf_config_t;
- API_NUMBER : integer range 0 to 16;
--- API_CHANNELS : hub_api_config_t;
--- API_TYPE : hub_api_config_t;
--- API_FIFO_TO_INT_DEPTH : hub_api_config_t;
--- API_FIFO_TO_APL_DEPTH : hub_api_config_t;
- TRG_NUMBER : integer range 0 to 16);
--- TRG_CHANNELS : hub_api_config_t);
+ --general settings
+ MUX_SECURE_MODE : integer range 0 to 1 := c_NO;
+ --hub control
+ HUB_CTRL_CHANNELNUM : integer range 0 to 3 := 0;--c_SLOW_CTRL_CHANNEL;
+ HUB_CTRL_DEPTH : integer range 0 to 6 := c_FIFO_SMALL;
+ HUB_CTRL_REG_ADDR_WIDTH : integer range 1 to 7 := 4;
+ HUB_USED_CHANNELS : hub_channel_config_t := (c_YES,c_YES,c_YES,c_YES);
+ IBUF_SECURE_MODE : integer range 0 to 1 := c_NO;
+ --media interfaces
+ MII_NUMBER : integer range 2 to c_MAX_MII_PER_HUB := 12;
+ --each row is one media interface and each column is one channel. starting with 0,0, ending with 15,15
+ MII_INIT_DEPTH : hub_iobuf_config_t := std_HUB_INIT_DEPTH;
+ MII_REPLY_DEPTH : hub_iobuf_config_t := std_HUB_REPLY_DEPTH;
+ -- settings for apis
+ API_NUMBER : integer range 0 to c_MAX_API_PER_HUB := 0;
+ API_CHANNELS : hub_api_config_t := (3,3,3,3,3,3,3,3);
+ --channel, each api is connected to
+ API_TYPE : hub_api_config_t := (0,0,0,0,0,0,0,0);
+ API_FIFO_TO_INT_DEPTH : hub_api_config_t := (1,1,1,1,1,1,1,1);
+ API_FIFO_TO_APL_DEPTH : hub_api_config_t := (1,1,1,1,1,1,1,1);
+ --trigger reading interfaces
+ TRG_NUMBER : integer range 0 to c_MAX_TRG_PER_HUB := 0;
+ TRG_SECURE_MODE : integer range 0 to 1 := c_NO;
+ TRG_CHANNELS : hub_api_config_t := (0,1,0,0,0,0,0,0)
+ );
port (
CLK : in std_logic;
RESET : in std_logic;
signal hub_register_16_i : std_logic_vector(7 downto 0);
signal ADO_TTL_12 : std_logic;
-----------------------------------------------------------------------------
- -- flexi_PCS to api interface
+ -- flexi_PCS to hub interface
-----------------------------------------------------------------------------
- signal data_valid_in_i : std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
- signal data_valid_out_i : std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
-
+ signal med_dataready_in_i : std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
+ signal med_dataready_out_i : std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
+ signal med_read_in_i : std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
+ signal med_read_out_i : std_logic_vector(HOW_MANY_CHANNELS-1 downto 0);
+ signal med_data_out_i : std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0);
+ signal med_data_in_i : std_logic_vector(HOW_MANY_CHANNELS*16-1 downto 0);
+ signal med_packet_num_out_i : std_logic_vector(HOW_MANY_CHANNELS*2-1 downto 0);
+ signal med_packet_num_in_i : std_logic_vector(HOW_MANY_CHANNELS*2-1 downto 0);
+ signal med_error_in_i : std_logic_vector(HOW_MANY_CHANNELS*3-1 downto 0);
-----------------------------------------------------------------------------
-- other
-----------------------------------------------------------------------------
RX_CLK => rx_clk_i,
RESET => ADO_TTL(0),
RXD => rxd_i,
- RXD_SYNCH => rxd_synch_i,
+ MED_DATA_OUT => med_data_out_i,
RX_K => rx_k_i,
RX_RST => rx_rst_i,
CV => cv_i,
- TXD => txd_i,
+ MED_DATA_IN => med_data_in_i,
TXD_SYNCH => txd_synch_i,
TX_FORCE_DISP => tx_force_disp_i,
- DATA_VALID_IN => data_valid_in_i,
- DATA_VALID_OUT => data_valid_out_i,
FLEXI_PCS_SYNCH_STATUS => flexi_pcs_synch_status_i
- );
+ MED_DATAREADY_IN => med_dataready_in_i,
+ MED_DATAREADY_OUT => med_dataready_out_i,
+ MED_PACKET_NUM_IN => med_packet_num_in_i,
+ MED_PACKET_NUM_OUT => med_packet_num_out_i,
+ MED_READ_IN => med_read_in_i,
+ MED_READ_OUT => med_read_out_i,
+ MED_ERROR_OUT => med_error_out_i
+ );
HUB_API: trb_net16_hub_base
- generic map (
- MUX_SECURE_MODE => 0,
- MUX_WIDTH => 2,
- DATA_WIDTH => 16,
- NUM_WIDTH => 2,
- HUB_ADDRESS => x"F001",
- HUB_CTRL_CHANNELNUM => 3,
- HUB_CTRL_DEPTH => 1,
- HUB_CTRL_REG_ADDR_WIDTH => 4,
- MII_NUMBER => HOW_MANY_CHANNELS,
- API_NUMBER => 0,
- TRG_NUMBER => 0)
--- MII_INIT_DEPTH => (6,6,6,6, --MII 6
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6),
--- MII_REPLY_DEPTH => (6,6,6,6,6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6,
--- 6,6,6,6), 6,6,6,6),
--- API_CHANNELS => (3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3),
--- API_TYPE => (0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0),
--- API_FIFO_TO_INT_DEPTH => (1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1),
--- API_FIFO_TO_APL_DEPTH => (1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1),
--- TRG_CHANNELS => (0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0))
port map (
CLK => LVDS_CLK_200P,
RESET => ADO_TTL(0),
CLK_EN => '1',
- MED_DATAREADY_OUT => OPT_DATA_VALID_OUT,--data_valid_in_i,
- MED_DATA_OUT => OPT_DATA_OUT,--txd_i,
- MED_PACKET_NUM_OUT => open,
- MED_READ_IN => (others => '1'),
- MED_DATAREADY_IN => OPT_DATA_VALID_IN,--data_valid_out_i,
- MED_DATA_IN => OPT_DATA_IN,--rxd_synch_i,
- MED_PACKET_NUM_IN => med_packet_num_in_i,
- MED_READ_OUT => open,
- MED_ERROR_IN => med_error_in_i,
+ MED_DATAREADY_OUT => med_dataready_in_i,
+ MED_DATA_OUT => med_data_in_i,
+ MED_PACKET_NUM_OUT => med_packet_num_in_i,
+ MED_READ_IN => med_read_out_i,
+ MED_DATAREADY_IN => med_dataready_out_i,
+ MED_DATA_IN => med_data_out_i,
+ MED_PACKET_NUM_IN => med_packet_num_out_i,
+ MED_READ_OUT => med_read_in_i,
+ MED_ERROR_IN => med_error_out_i,
APL_DATA_IN => (others => '0'),
APL_PACKET_NUM_IN => (others => '0'),
APL_WRITE_IN => (others => '0'),
MPLEX_CTRL => mplex_ctrl_i,
MPLEX_STAT => open
);
- COUNTER_FOR_API_00: process (ref_pclk(0), ADO_TTL(0))
- begin
- if rising_edge(ref_pclk(0)) then
- if ADO_TTL(0) = '1' then
- word_counter_for_api_00 <= (others => '0');
- elsif data_valid_out_i(0) = '1' then
- word_counter_for_api_00 <= word_counter_for_api_00 + 1;
- end if;
- end if;
- end process COUNTER_FOR_API_00;
- med_packet_num_in_i(1 downto 0) <= word_counter_for_api_00;
- COUNTER_FOR_API_01: process (ref_pclk(0), ADO_TTL(0))
- begin
- if rising_edge(ref_pclk(0)) then
- if ADO_TTL(0) = '1' then
- word_counter_for_api_01 <= (others => '0');
- elsif data_valid_out_i(1) = '1' then
- word_counter_for_api_01 <= word_counter_for_api_01 + 1;
- end if;
- end if;
- end process COUNTER_FOR_API_01;
- med_packet_num_in_i(3 downto 2) <= word_counter_for_api_01;
-
+
TRB_HUB_INT : trb_hub_interface
port map (
CLK => ref_pclk(0),
jspc29 / trbnet.git / commitdiff