set_property PACKAGE_PIN V14 [get_ports SDA]
set_property IOSTANDARD LVTTL [get_ports SDA]
+set_property PACKAGE_PIN AU17 [get_ports TRG_OUT_0_P]
+set_property IOSTANDARD LVDS [get_ports TRG_OUT_0_P]
+
+set_property PACKAGE_PIN P34 [get_ports TRG_OUT_1_P]
+set_property IOSTANDARD LVDS [get_ports TRG_OUT_1_P]
+
+set_property PACKAGE_PIN G17 [get_ports TRG_OUT_2_P]
+set_property IOSTANDARD LVDS [get_ports TRG_OUT_2_P]
+
+set_property PACKAGE_PIN AT29 [get_ports TRG_OUT_3_P]
+set_property IOSTANDARD LVDS [get_ports TRG_OUT_3_P]
+
set_property LOC GTHE3_CHANNEL_X0Y8 [get_cells -hierarchical -filter {NAME =~ *THE_MEDIA_4_PCSB*gen_channel_container[2].*gen_gthe3_channel_inst[0].GTHE3_CHANNEL_PRIM_INST}]
set_property LOC GTHE3_CHANNEL_X0Y9 [get_cells -hierarchical -filter {NAME =~ *THE_MEDIA_4_PCSB*gen_channel_container[2].*gen_gthe3_channel_inst[1].GTHE3_CHANNEL_PRIM_INST}]
set_property LOC GTHE3_CHANNEL_X0Y10 [get_cells -hierarchical -filter {NAME =~ *THE_MEDIA_4_PCSB*gen_channel_container[2].*gen_gthe3_channel_inst[2].GTHE3_CHANNEL_PRIM_INST}]
MPOD_RESET_N : out std_logic_vector(3 downto 0);
SDA : inout std_logic;
- SCL : inout std_logic
+ SCL : inout std_logic;
+
+ TRG_OUT_0_P : out std_logic;
+ TRG_OUT_0_N : out std_logic;
+ TRG_OUT_1_P : out std_logic;
+ TRG_OUT_1_N : out std_logic;
+ TRG_OUT_2_P : out std_logic;
+ TRG_OUT_2_N : out std_logic;
+ TRG_OUT_3_P : out std_logic;
+ TRG_OUT_3_N : out std_logic
);
end entity hub_test;
attribute KEEP of hub_data_address_sender : signal is "true";
attribute KEEP of hub_data_seqnmbr : signal is "true";
attribute KEEP of hub_data_length : signal is "true";
+
+ signal usrclk : std_logic;
+
+ constant MS_PERIOD_COUNTS : integer := 10240; -- assuming clock with 10 ns period
+ signal ms_count : integer range 0 to MS_PERIOD_COUNTS - 1 := 0;
+ signal trg_out : std_logic := '0';
begin
MPOD_RESET_N <= "1111";
CTRL_DEBUG => open
);
+ usrclk <= med2int_i(4).clk_half;
+
+ -- Create a 100 ns test pulse for debugging of microslice timing
+ process (usrclk) is
+ begin
+ if rising_edge(usrclk) then
+ if ms_count = MS_PERIOD_COUNTS - 1 then
+ ms_count <= 0;
+ else
+ ms_count <= ms_count + 1;
+ end if;
+ if ms_count < 10 then
+ trg_out <= '1';
+ else
+ trg_out <= '0';
+ end if;
+ end if;
+ end process;
+
+
+ OBUFDS_TRG_OUT_0 : OBUFDS
+ port map (
+ O => TRG_OUT_0_P,
+ OB => TRG_OUT_0_N,
+ I => trg_out
+ );
+
+ OBUFDS_TRG_OUT_1 : OBUFDS
+ port map (
+ O => TRG_OUT_1_P,
+ OB => TRG_OUT_1_N,
+ I => trg_out
+ );
+
+ OBUFDS_TRG_OUT_2 : OBUFDS
+ port map (
+ O => TRG_OUT_2_P,
+ OB => TRG_OUT_2_N,
+ I => trg_out
+ );
+
+ OBUFDS_TRG_OUT_3 : OBUFDS
+ port map (
+ O => TRG_OUT_3_P,
+ OB => TRG_OUT_3_N,
+ I => trg_out
+ );
+
THE_MEDIA_4_PCSC : entity work.med_xcku_sfp_sync_4
generic map (