static IP included. Discovery protocol included in beta version. Some bug fixes....

diff --git a/gbe_trb/base/gbe_frame_receiver.vhd b/gbe_trb/base/gbe_frame_receiver.vhd
index 36fc3dd255a2f857110cdc20ce7570133b70de48..7b8b48a978012ef4e8b0ed86c31c4679bdacbdf9 100644 (file)
--- a/gbe_trb/base/gbe_frame_receiver.vhd
+++ b/gbe_trb/base/gbe_frame_receiver.vhd
@@ -11,7 +11,7 @@ entity gbe_frame_receiver is
   port(\r
     CLK                     : in  std_logic;  -- system clock\r
     RESET                   : in  std_logic;\r
-    LINK_OK_IN              : in  std_logic;\r
+    LINK_OK_IN              : in  std_logic; -- not used\r
     ALLOW_RX_IN             : in  std_logic;\r
     MY_MAC_IN               : in  std_logic_vector(47 downto 0);\r
     MY_IP_IN                : in  std_logic_vector(31 downto 0);\r
@@ -40,6 +40,8 @@ entity gbe_frame_receiver is
     OOB_REGISTER_1_OUT      : out std_logic_vector(31 downto 0);\r
     OOB_REGISTER_2_OUT      : out std_logic_vector(31 downto 0);\r
     OOB_REGISTER_3_OUT      : out std_logic_vector(31 downto 0);\r
+    DISABLE_DHCP_OUT        : out std_logic;\r
+    STATIC_IP_OUT           : out std_logic_vector(31 downto 0);\r
   --\r
     MONITOR_RX_BYTES_OUT    : out std_logic_vector(31 downto 0);\r
     MONITOR_RX_FRAMES_OUT   : out std_logic_vector(31 downto 0);\r
@@ -109,14 +111,16 @@ architecture gbe_frame_receiver_arch of gbe_frame_receiver is
   signal fr_q                                : std_logic_vector(8 downto 0);\r
   signal fr_info                             : std_logic_vector(7 downto 0);\r
 \r
-  signal oob_register_0_int                  : std_logic_vector(31 downto 0);\r
-  signal oob_register_1_int                  : std_logic_vector(31 downto 0);\r
-  signal oob_register_2_int                  : std_logic_vector(31 downto 0);\r
-  signal oob_register_3_int                  : std_logic_vector(31 downto 0);\r
+  signal oob_register_0_int                  : std_logic_vector(31 downto 0) := (others => '0');\r
+  signal oob_register_1_int                  : std_logic_vector(31 downto 0) := (others => '0');\r
+  signal oob_register_2_int                  : std_logic_vector(31 downto 0) := (others => '0');\r
+  signal oob_register_3_int                  : std_logic_vector(31 downto 0) := (others => '0');\r
   signal oob_write                           : std_logic;\r
   signal drop_frame_x                        : std_logic;\r
   signal drop_frame                          : std_logic;\r
-\r
+  signal oob_ctrl_reg_int                    : std_logic_vector(31 downto 0);\r
+  signal oob_ip_reg_int                      : std_logic_vector(31 downto 0);\r
+  \r
   signal fifo_one_q                          : std_logic_vector(71 downto 0);\r
   signal fifo_two_q                          : std_logic_vector(71 downto 0);\r
 \r
@@ -544,9 +548,9 @@ begin
     if( rising_edge(CLK) ) then\r
       if( (drop_frame = '1') and\r
           (stored_protocol = x"11") and\r
-          (stored_ethertype = x"0800") and\r
-          (stored_dst_port = x"d903") and\r
-          (stored_src_port = x"2b67") ) then\r
+          (stored_ethertype = x"0008") and -- swapped bytes\r
+          (stored_dst_port = x"adde") and -- swapped bytes\r
+          (stored_src_port = x"efbe") ) then -- swapped bytes\r
         oob_write <= '1';\r
       else\r
         oob_write <= '0';\r
@@ -558,11 +562,14 @@ begin
   begin\r
     if( rising_edge(CLK) ) then\r
       if( oob_write = '1' ) then\r
-        case stored_src_ip(1 downto 0) is\r
-          when b"00"  => oob_register_0_int <= stored_dst_ip;\r
-          when b"01"  => oob_register_1_int <= stored_dst_ip;\r
-          when b"10"  => oob_register_2_int <= stored_dst_ip;\r
-          when others => oob_register_3_int <= stored_dst_ip;\r
+        case stored_src_ip(2 downto 0) is\r
+          when b"000" => oob_register_0_int <= stored_dst_ip;\r
+          when b"001" => oob_register_1_int <= stored_dst_ip;\r
+          when b"010" => oob_register_2_int <= stored_dst_ip;\r
+          when b"011" => oob_register_3_int <= stored_dst_ip;\r
+          when b"110" => oob_ctrl_reg_int   <= stored_dst_ip;\r
+          when b"111" => oob_ip_reg_int     <= stored_dst_ip;\r
+          when others => null;\r
         end case;\r
       end if;\r
     end if;\r
@@ -573,7 +580,10 @@ begin
   OOB_REGISTER_2_OUT <= oob_register_2_int;\r
   OOB_REGISTER_3_OUT <= oob_register_3_int;\r
 \r
-  -- killer ping\r
+  DISABLE_DHCP_OUT   <= oob_ctrl_reg_int(0);\r
+  STATIC_IP_OUT      <= oob_ip_reg_int;\r
+  \r
+--  -- killer ping\r
 --  PROC_KILLER_PING: process( CLK )\r
 --  begin\r
 --    if( rising_edge(CLK) ) then\r

diff --git a/gbe_trb/base/gbe_logic_wrapper.vhd b/gbe_trb/base/gbe_logic_wrapper.vhd
index c2c6aad6a3022464fcb370e581941bb59b17be47..f2eae3aac64b6a2d973b58213d62537feae34729 100644 (file)
--- a/gbe_trb/base/gbe_logic_wrapper.vhd
+++ b/gbe_trb/base/gbe_logic_wrapper.vhd
@@ -143,7 +143,6 @@ architecture gbe_logic_wrapper_arch of gbe_logic_wrapper is
   \r
   signal link_ok                : std_logic;\r
   signal dhcp_done              : std_logic;\r
-       signal my_ip                  : std_logic_vector(31 downto 0);\r
   \r
   signal make_reset             : std_logic;\r
   signal frame_pause            : std_logic_vector(31 downto 0);\r
@@ -156,6 +155,15 @@ architecture gbe_logic_wrapper_arch of gbe_logic_wrapper is
   signal debug_fr               : std_logic_vector(31 downto 0);\r
   signal debug_rc               : std_logic_vector(31 downto 0);\r
 \r
+  signal oob_register_0_int     : std_logic_vector(31 downto 0);\r
+  signal oob_register_1_int     : std_logic_vector(31 downto 0);\r
+  signal oob_register_2_int     : std_logic_vector(31 downto 0);\r
+  signal oob_register_3_int     : std_logic_vector(31 downto 0);\r
+\r
+  signal my_static_ip           : std_logic_vector(31 downto 0);\r
+  signal my_ip                  : std_logic_vector(31 downto 0);\r
+  signal disable_dhcp           : std_logic;\r
+  \r
   begin\r
 \r
 ---------------------------------------------------------------------------------------------------\r
@@ -201,6 +209,8 @@ architecture gbe_logic_wrapper_arch of gbe_logic_wrapper is
       RESET                         => RESET,\r
       MC_LINK_OK_OUT                => link_ok,\r
       MC_DHCP_DONE_OUT              => dhcp_done,\r
+      MC_DISABLE_DHCP_IN            => disable_dhcp,\r
+      MC_STATIC_IP_IN               => my_static_ip,\r
       MY_IP_OUT                     => my_ip,\r
       MC_MY_MAC_IN                  => MY_MAC_IN,\r
       MY_TRBNET_ADDRESS_IN          => MY_TRBNET_ADDRESS_IN,\r
@@ -404,10 +414,12 @@ architecture gbe_logic_wrapper_arch of gbe_logic_wrapper is
       FR_SRC_IP_ADDRESS_OUT   => fr_src_ip,\r
       FR_SRC_UDP_PORT_OUT     => fr_src_udp,\r
       --\r
-      OOB_REGISTER_0_OUT      => OOB_REGISTER_0_OUT,\r
-      OOB_REGISTER_1_OUT      => OOB_REGISTER_1_OUT,\r
-      OOB_REGISTER_2_OUT      => OOB_REGISTER_2_OUT,\r
-      OOB_REGISTER_3_OUT      => OOB_REGISTER_3_OUT,\r
+      OOB_REGISTER_0_OUT      => oob_register_0_int,\r
+      OOB_REGISTER_1_OUT      => oob_register_1_int,\r
+      OOB_REGISTER_2_OUT      => oob_register_2_int,\r
+      OOB_REGISTER_3_OUT      => oob_register_3_int,\r
+      DISABLE_DHCP_OUT        => disable_dhcp,\r
+      STATIC_IP_OUT           => my_static_ip,\r
       --\r
       MONITOR_RX_BYTES_OUT    => MONITOR_RX_BYTES_OUT,\r
       MONITOR_RX_FRAMES_OUT   => MONITOR_RX_FRAMES_OUT,\r
@@ -416,4 +428,9 @@ architecture gbe_logic_wrapper_arch of gbe_logic_wrapper is
       DEBUG_OUT               => debug_fr\r
     );\r
 \r
+  OOB_REGISTER_0_OUT <= oob_register_0_int;\r
+  OOB_REGISTER_1_OUT <= oob_register_1_int;\r
+  OOB_REGISTER_2_OUT <= oob_register_2_int;\r
+  OOB_REGISTER_3_OUT <= oob_register_3_int;\r
+  \r
 end architecture gbe_logic_wrapper_arch;\r

diff --git a/gbe_trb/base/gbe_main_control.vhd b/gbe_trb/base/gbe_main_control.vhd
index 12043cbd92752f0c19fcc63ef39ae3f810f78f16..2c4bd74c7727a59db509af4cf42954306889aae6 100644 (file)
--- a/gbe_trb/base/gbe_main_control.vhd
+++ b/gbe_trb/base/gbe_main_control.vhd
@@ -22,8 +22,10 @@ entity gbe_main_control is
     CLK_125                       : in  std_logic;\r
     RESET                         : in  std_logic;\r
     --\r
-    MC_LINK_OK_OUT                : out std_logic; -- remark: set to '1' internally\r
+    MC_LINK_OK_OUT                : out std_logic;\r
     MC_DHCP_DONE_OUT              : out std_logic;\r
+    MC_DISABLE_DHCP_IN            : in  std_logic;\r
+    MC_STATIC_IP_IN               : in  std_logic_vector(31 downto 0);\r
     MY_IP_OUT                     : out std_logic_vector(31 downto 0);\r
     MC_MY_MAC_IN                  : in  std_logic_vector(47 downto 0);\r
     MY_TRBNET_ADDRESS_IN          : in  std_logic_vector(15 downto 0);\r
@@ -170,18 +172,18 @@ begin
     end if;\r
   end process PROC_LINK_STATE_FSM;\r
 \r
-  PROC_LINK_STATE_TRANSITIONS: process( LINK_STATE_CS, LINK_ACTIVE_IN, dhcp_done, incl_dhcp )\r
+  PROC_LINK_STATE_TRANSITIONS: process( LINK_STATE_CS, LINK_ACTIVE_IN, MC_DISABLE_DHCP_IN, dhcp_done, incl_dhcp )\r
   begin\r
     dhcp_start_x <= '0';\r
 \r
     case LINK_STATE_CS is\r
       when LINK_DOWN =>\r
         link_state <= x"0";\r
-        if   ( (LINK_ACTIVE_IN = '1') and (incl_dhcp = '1') ) then\r
+        if   ( (LINK_ACTIVE_IN = '1') and (incl_dhcp = '1') and (MC_DISABLE_DHCP_IN = '0') ) then\r
           -- PHY and MAC are operational, DHCP is used\r
           LINK_STATE_NS <= LINK_ACTIVE;\r
           dhcp_start_x <= '1';\r
-        elsif( (LINK_ACTIVE_IN = '0') and (incl_dhcp = '0') ) then\r
+        elsif( (LINK_ACTIVE_IN = '1') and ((incl_dhcp = '0') or (MC_DISABLE_DHCP_IN = '1')) ) then\r
           -- PHY and MAC are operational, DHCP is not used\r
           LINK_STATE_NS <= LINK_UP;\r
         else\r
@@ -254,8 +256,8 @@ begin
         if   ( LINK_STATE_CS = LINK_UP ) then\r
           -- DHPC done, or fixed IP, so we are fully accepting frames\r
           REDIRECT_NS <= CHECK_BUSY;\r
-        elsif( (LINK_STATE_CS = LINK_ACTIVE) and (RC_FRAME_PROTO_IN(1 downto 0) = "10") ) then\r
-          -- DHCP in progress, so only DHCP frames are accepted\r
+        elsif( (LINK_STATE_CS = LINK_ACTIVE) and ((RC_FRAME_PROTO_IN(1) = '1') or (RC_FRAME_PROTO_IN(6) = '1')) ) then\r
+          -- DHCP in progress, so only DHCP and Discovery frames are accepted\r
           REDIRECT_NS <= CHECK_BUSY;\r
         else\r
           -- link lost, drop frame\r
@@ -436,6 +438,8 @@ begin
       MC_BUSY_IN                    => mc_busy,\r
       MY_MAC_IN                     => MC_MY_MAC_IN,\r
       MY_IP_OUT                     => MY_IP_OUT,\r
+      MY_STATIC_IP_IN               => MC_STATIC_IP_IN,\r
+      DHCP_DISABLE_IN               => MC_DISABLE_DHCP_IN,\r
       DHCP_START_IN                 => dhcp_start,\r
       DHCP_DONE_OUT                 => dhcp_done,\r
       GSC_CLK_IN                    => GSC_CLK_IN,\r

diff --git a/gbe_trb/base/gbe_protocol_selector.vhd b/gbe_trb/base/gbe_protocol_selector.vhd
index 1172bf2c62e5f5646e7698a7d551c96fea5fd6b3..7534b36a7b6a2762d7e14d573fce2f390c1c7746 100644 (file)
--- a/gbe_trb/base/gbe_protocol_selector.vhd
+++ b/gbe_trb/base/gbe_protocol_selector.vhd
@@ -46,6 +46,8 @@ entity gbe_protocol_selector is
     -- misc signals for response constructors\r
     MY_MAC_IN                     : in  std_logic_vector(47 downto 0);\r
     MY_IP_OUT                     : out std_logic_vector(31 downto 0);\r
+    MY_STATIC_IP_IN               : in  std_logic_vector(31 downto 0);\r
+    DHCP_DISABLE_IN               : in  std_logic;\r
     DHCP_START_IN                 : in  std_logic;\r
     DHCP_DONE_OUT                 : out std_logic;\r
     GSC_CLK_IN                    : in  std_logic;\r
@@ -119,6 +121,7 @@ architecture gbe_protocol_selector_arch of gbe_protocol_selector is
   attribute syn_preserve of state, mult : signal is true;\r
 \r
   signal my_ip        : std_logic_vector(31 downto 0);\r
+  signal my_dhcp_ip   : std_logic_vector(31 downto 0);\r
   signal select_state : std_logic_vector(3 downto 0);\r
 \r
   signal debug_arp           : std_logic_vector(63 downto 0);\r
@@ -190,7 +193,6 @@ begin
         RESET                  => RESET,\r
         -- INTERFACE\r
         MY_MAC_IN              => MY_MAC_IN,\r
-        MY_IP_IN               => my_ip,\r
         PS_DATA_IN             => PS_DATA_IN,\r
         PS_WR_EN_IN            => PS_WR_EN_IN,\r
         PS_ACTIVATE_IN         => PS_PROTO_SELECT_IN(1),\r
@@ -214,16 +216,30 @@ begin
         TC_SRC_IP_OUT          => tc_src_ip(2 * 32 - 1 downto 1 * 32),\r
         TC_SRC_UDP_OUT         => tc_src_udp(2 * 16 - 1 downto 1 * 16),\r
         -- END OF INTERFACE\r
-        MY_IP_OUT              => my_ip,\r
+        MY_IP_OUT              => my_dhcp_ip,\r
+        DHCP_DISABLE_IN        => DHCP_DISABLE_IN,\r
         DHCP_START_IN          => DHCP_START_IN,\r
         DHCP_DONE_OUT          => DHCP_DONE_OUT,\r
         DEBUG_OUT              => debug_dhcp\r
       );\r
+      \r
+--    PROC_SELECT_IP: process( DHCP_DISABLE_IN, my_dhcp_ip, MY_STATIC_IP_IN )\r
+    PROC_SELECT_IP: process( CLK )\r
+    begin\r
+      if( rising_edge(CLK) ) then\r
+        case DHCP_DISABLE_IN is\r
+          when '0'    => my_ip <= my_dhcp_ip;\r
+          when others => my_ip <= MY_STATIC_IP_IN;\r
+        end case;\r
+      end if;\r
+    end process PROC_SELECT_IP;\r
+    \r
   end generate DHCP_GEN;\r
 \r
   NO_DHCP_GEN: if( INCLUDE_DHCP = '0' ) generate\r
     resp_ready(1) <= '0';\r
     busy(1)       <= '0';\r
+    my_ip         <= MY_STATIC_IP_IN;\r
   end generate NO_DHCP_GEN;\r
   ---------------------------------------------------------------------------------------\r
 \r

diff --git a/gbe_trb/protocols/gbe_response_constructor_DHCP.vhd b/gbe_trb/protocols/gbe_response_constructor_DHCP.vhd
index bd8df5f703b9101a68813ede48e5e5f596aee9ff..01606ac80e4c1741c6391743a789bab404335296 100644 (file)
--- a/gbe_trb/protocols/gbe_response_constructor_DHCP.vhd
+++ b/gbe_trb/protocols/gbe_response_constructor_DHCP.vhd
@@ -11,7 +11,6 @@ entity gbe_response_constructor_DHCP is
     RESET                  : in  std_logic;\r
   -- INTERFACE\r
     MY_MAC_IN              : in  std_logic_vector(47 downto 0);\r
-    MY_IP_IN               : in  std_logic_vector(31 downto 0);\r
     PS_DATA_IN             : in  std_logic_vector(8 downto 0);\r
     PS_WR_EN_IN            : in  std_logic;\r
     PS_ACTIVATE_IN         : in  std_logic;\r
@@ -37,6 +36,7 @@ entity gbe_response_constructor_DHCP is
     TC_SRC_UDP_OUT         : out std_logic_vector(15 downto 0);\r
   -- END OF INTERFACE\r
     MY_IP_OUT              : out std_logic_vector(31 downto 0);\r
+    DHCP_DISABLE_IN        : in  std_logic;\r
     DHCP_START_IN          : in  std_logic;\r
     DHCP_DONE_OUT          : out std_logic;\r
   -- debug\r
@@ -164,7 +164,7 @@ begin
     end if;\r
   end process PROC_MAIN_FSM;\r
 \r
-  PROC_MAIN_TRANSITIONS : process( MAIN_CS, DHCP_START_IN, CONSTRUCT_CS, wait_ctr, RECEIVE_CS, PS_DATA_IN )\r
+  PROC_MAIN_TRANSITIONS : process( MAIN_CS, DHCP_START_IN, DHCP_DISABLE_IN, CONSTRUCT_CS, wait_ctr, RECEIVE_CS, PS_DATA_IN )\r
   begin\r
     main_state <= x"0";\r
 \r
@@ -172,7 +172,7 @@ begin
 \r
       when BOOTING =>\r
         main_state <= x"1";\r
-        if( DHCP_START_IN = '1' ) then\r
+        if( (DHCP_START_IN = '1') and (DHCP_DISABLE_IN = '0') ) then\r
           MAIN_NS <= DELAY;\r
         else\r
           MAIN_NS <= BOOTING;\r
@@ -226,7 +226,7 @@ begin
 \r
       when ESTABLISHED =>\r
         main_state <= x"7";\r
-          if( DHCP_START_IN = '0' ) then\r
+          if( (DHCP_START_IN = '0') or (DHCP_DISABLE_IN = '1') ) then\r
             MAIN_NS <= BOOTING;\r
           else\r
             MAIN_NS <= ESTABLISHED;\r

diff --git a/gbe_trb/protocols/gbe_response_constructor_Discovery.vhd b/gbe_trb/protocols/gbe_response_constructor_Discovery.vhd
index 89064abc6a7ae5b203c35cdbad3402908f38681b..68872fa4985b87a3a41058608a85a01bed21e098 100644 (file)
--- a/gbe_trb/protocols/gbe_response_constructor_Discovery.vhd
+++ b/gbe_trb/protocols/gbe_response_constructor_Discovery.vhd
@@ -51,21 +51,15 @@ architecture gbe_response_constructor_Discovery_arch of gbe_response_constructor
   signal stats_current_state, stats_next_state : stats_states;\r
   attribute syn_encoding of stats_current_state : signal is "onehot";\r
 \r
-  signal saved_opcode             : std_logic_vector(15 downto 0); -- NOT USED\r
-  signal saved_sender_ip          : std_logic_vector(31 downto 0);\r
-  signal saved_target_ip          : std_logic_vector(31 downto 0);\r
-  signal tc_data                  : std_logic_vector(8 downto 0);\r
-  signal dissect_ctr              : unsigned(7 downto 0);\r
 \r
   signal state                    : std_logic_vector(3 downto 0);\r
 \r
---  signal test_ff                  : std_logic;\r
-  \r
   attribute syn_preserve : boolean;\r
   attribute syn_keep : boolean;\r
   attribute syn_keep of state : signal is true;\r
   attribute syn_preserve of state : signal is true;\r
 \r
+  signal dissect_ctr              : unsigned(7 downto 0);\r
   signal stored_magic             : std_logic_vector(31 downto 0);\r
   signal stored_opcode            : std_logic_vector(7 downto 0);\r
   signal stored_random            : std_logic_vector(7 downto 0);\r
@@ -75,6 +69,8 @@ architecture gbe_response_constructor_Discovery_arch of gbe_response_constructor
   \r
   signal ps_response_ready        : std_logic;\r
   signal ps_busy                  : std_logic;\r
+\r
+  signal tc_data                  : std_logic_vector(8 downto 0);\r
   signal tc_data_q                : std_logic_vector(8 downto 0);\r
   \r
 begin\r
@@ -91,18 +87,6 @@ begin
   DEBUG_OUT(17 downto 9)  <= tc_data_q;\r
   DEBUG_OUT(8 downto 0)   <= PS_DATA_IN;\r
 \r
---  -- simple toggle FF for testing\r
---  PROC_TEST_FF: process( CLK, RESET )\r
---  begin\r
---    if   ( RESET = '1' ) then\r
---      test_ff <= '0';\r
---    elsif( rising_edge(CLK) ) then\r
---      if( DISSECT_CS = DELAY ) then\r
---        test_ff <= not test_ff;\r
---      end if;\r
---    end if;\r
---  end process PROC_TEST_FF;\r
-\r
   -- statemachine\r
   PROC_DISSECT_FSM: process( CLK, RESET )\r
   begin\r
@@ -114,7 +98,7 @@ begin
   end process PROC_DISSECT_FSM;\r
 \r
   PROC_DISSECT_TRANSITIONS : process( DISSECT_CS, MY_IP_IN, PS_WR_EN_IN, PS_ACTIVATE_IN,\r
-                                      PS_DATA_IN, dissect_ctr, PS_SELECTED_IN, saved_target_ip )\r
+                                      PS_DATA_IN, dissect_ctr, PS_SELECTED_IN )\r
   begin\r
     case DISSECT_CS is\r
 \r

diff --git a/gbe_trb/protocols/gbe_response_constructor_Ping.vhd b/gbe_trb/protocols/gbe_response_constructor_Ping.vhd
index 01c63181e2392b1cd4d7e5daab52d9012508fba5..2165d00371aaf41ef0766220fdee4a8ad517897f 100644 (file)
--- a/gbe_trb/protocols/gbe_response_constructor_Ping.vhd
+++ b/gbe_trb/protocols/gbe_response_constructor_Ping.vhd
@@ -5,6 +5,8 @@ library ieee;
 library work;
   use work.gbe_protocols.all;
 
+-- BUG: answers always with PING REPLY. No choice on TYPE/CODE is made!
+  
 entity gbe_response_constructor_Ping is
   port(
     CLK                    : in  std_logic;  -- system clock
@@ -52,6 +54,8 @@ architecture gbe_response_constructor_Ping_arch of gbe_response_constructor_Ping
   signal stats_current_state, stats_next_state : stats_states;
   attribute syn_encoding of stats_current_state : signal is "onehot";
 
+  signal state              : std_logic_vector(3 downto 0);
+  
   signal sent_frames        : unsigned(15 downto 0);
 
   signal saved_data         : std_logic_vector(447 downto 0);
@@ -86,28 +90,28 @@ begin
     case dissect_current_state is
 
       when IDLE =>
-        if (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
+        if( (PS_WR_EN_IN = '1') and (PS_ACTIVATE_IN = '1') ) then
           dissect_next_state <= READ_FRAME;
         else
           dissect_next_state <= IDLE;
         end if;
 
       when READ_FRAME =>
-        if (PS_DATA_IN(8) = '1') then
+        if( PS_DATA_IN(8) = '1' ) then
           dissect_next_state <= WAIT_FOR_LOAD;
         else
           dissect_next_state <= READ_FRAME;
         end if;
 
       when WAIT_FOR_LOAD =>
-        if (PS_SELECTED_IN = '1') then
+        if( PS_SELECTED_IN = '1' ) then
           dissect_next_state <= LOAD_FRAME;
         else
           dissect_next_state <= WAIT_FOR_LOAD;
         end if;
 
       when LOAD_FRAME =>
-        if (data_ctr = data_length + 1) then
+        if( data_ctr = data_length + 1 ) then
           dissect_next_state <= CLEANUP;
         else
           dissect_next_state <= LOAD_FRAME;
@@ -126,9 +130,9 @@ begin
     elsif( rising_edge(CLK) ) then
       if   ( (dissect_current_state = IDLE) or (dissect_current_state = WAIT_FOR_LOAD) ) then
         data_ctr <= 2;
-      elsif( dissect_current_state = READ_FRAME and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then  -- in case of saving data from incoming frame
+      elsif( (dissect_current_state = READ_FRAME) and (PS_WR_EN_IN = '1') and (PS_ACTIVATE_IN = '1') ) then  -- in case of saving data from incoming frame
         data_ctr <= data_ctr + 1;
-      elsif( dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1' ) then  -- in case of constructing response
+      elsif( (dissect_current_state = LOAD_FRAME) and (PS_SELECTED_IN = '1') and (TC_RD_EN_IN = '1') ) then  -- in case of constructing response
         data_ctr <= data_ctr + 1;
       end if;
     end if;
@@ -187,7 +191,7 @@ begin
         checksum_rr(15 downto 0)   <= (others => '0');
         checksum_lll(15 downto 0)  <= (others => '0');
         checksum_rrr(15 downto 0)  <= (others => '0');
-      elsif( dissect_current_state = READ_FRAME and data_ctr > 4 ) then
+      elsif( (dissect_current_state = READ_FRAME) and (data_ctr > 4) ) then
         if (std_logic_vector(to_unsigned(data_ctr, 1)) = "0") then
           checksum_l <= checksum_l + unsigned(PS_DATA_IN(7 downto 0));
         else
@@ -234,7 +238,7 @@ begin
           end loop;
 
           -- mark the last byte
-          if (data_ctr = data_length + 1) then
+          if( data_ctr = data_length + 1 ) then
             tc_data(8) <= '1';
           end if;
         end if;
@@ -250,7 +254,7 @@ begin
   PROC_PS_RESPONSE_SYNC: process( CLK )
   begin
     if( rising_edge(CLK) ) then
-      if( dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or dissect_current_state = CLEANUP ) then
+      if( (dissect_current_state = WAIT_FOR_LOAD) or (dissect_current_state = LOAD_FRAME) or (dissect_current_state = CLEANUP) ) then
         PS_RESPONSE_READY_OUT <= '1';
       else
         PS_RESPONSE_READY_OUT <= '0';