cleanup to reduce timing problem

diff --git a/media_interfaces/sync/rx_control.vhd b/media_interfaces/sync/rx_control.vhd
index 82e73931b13030be8c05864da2d6137299f49421..3b3d417f4265d61e8bdf6b4828717b5f47207961 100644 (file)
--- a/media_interfaces/sync/rx_control.vhd
+++ b/media_interfaces/sync/rx_control.vhd
@@ -109,6 +109,7 @@ signal latched_pulse_good_100 : unsigned(1 downto 0) := "00";
 signal waiting_for_retr    : std_logic := '0';
 signal good_pos_counter    : std_logic_vector(7 downto 0) := (others => '0');
 signal retrans_timeout     : unsigned(8 downto 0) := (others => '0');
+signal reset_timeout       : std_logic := '0';
 signal num_pakets          : unsigned(3 downto 0) := (others => '0');
 --signal reg_num_pakets          : unsigned(3 downto 0) := (others => '0');
 signal num_read_words      : unsigned(2 downto 0) := (others => '0');
@@ -317,7 +318,8 @@ PROC_RX_FSM : process begin
   crc_reset            <= '0';
   pulse_good           <= '0';
   pulse_bad            <= '0';
-    
+  reset_timeout        <= '0';
+  
   case rx_state is
     when SLEEP =>
       rx_state_bits         <= x"1";
@@ -433,7 +435,7 @@ PROC_RX_FSM : process begin
           pulse_bad <= '1';
           if waiting_for_retr = '0' then
             req_retr_i       <= '1';
-            retrans_timeout  <= "000000000";
+            reset_timeout    <= '1';
             waiting_for_retr <= '1';
           end if;
         else
@@ -468,7 +470,7 @@ PROC_RX_FSM : process begin
       num_pakets            <= (others => '0');
       resub_mode            <= '1';
       next_sop              <= '1';
-      retrans_timeout       <= "000000000";
+      reset_timeout         <= '1';
       
     when GET_DLM =>
       rx_state_bits         <= x"5";
@@ -512,12 +514,8 @@ PROC_RX_FSM : process begin
       
   end case;
 
-  if waiting_for_retr = '1' and enable_chksum_200(5) = '0' then
-    retrans_timeout <= retrans_timeout+1;
-    if retrans_timeout = "111111111" then
-      req_retr_i <= '1';
-      retrans_timeout <= "000000000";
-    end if;  
+  if waiting_for_retr = '1' and enable_chksum_200(5) = '0' and retrans_timeout = "111111111" then
+    req_retr_i <= '1';
   end if;
 
   if RESET_IN_200 = '1' or RX_RESET_FINISHED_200 = '0' then
@@ -540,6 +538,19 @@ PROC_RX_FSM : process begin
   
 end process;
 
+PROC_TIMEOUT_COUNTER : process begin
+  wait until rising_edge(CLK_200);
+
+  if reset_timeout = '1' then
+    retrans_timeout <= "000000000";
+  elsif waiting_for_retr = '1' then
+    retrans_timeout <= retrans_timeout+1;
+  end if;
+  
+end process;
+
+  
+
 reg_rx_data_in <= RX_DATA_IN when rising_edge(CLK_200);
 reg_rx_k_in    <= RX_K_IN    when rising_edge(CLK_200);
 

diff --git a/media_interfaces/sync/tx_control.vhd b/media_interfaces/sync/tx_control.vhd
index 8d8dbdf4fc8d153bbb1c922dded311fbf04ac8cc..9f738b8f426fff83e39e655de9e8f5281888c67b 100644 (file)
--- a/media_interfaces/sync/tx_control.vhd
+++ b/media_interfaces/sync/tx_control.vhd
@@ -116,8 +116,8 @@ architecture arch of tx_control is
   signal send_chksum_counter : std_logic_vector(7 downto 0) := x"00";
 
   --signal num_pak          : unsigned(15 downto 0) := (others => '0');
-  signal resub_mode    : std_logic := '0';
-  signal reset_retrans : std_logic;
+  signal resub_mode        : std_logic := '0';
+  signal reset_retrans_200 : std_logic;
 
   signal GOT_FORCE_ERROR_reg : std_logic := '0';
   signal FORCE_CRC_ERROR_200 : std_logic := '0';
@@ -169,7 +169,7 @@ begin
   save_sop <= '1' when (TX_PACKET_NUMBER_IN = c_H0) else '0';
   save_eop <= '1' when (TX_PACKET_NUMBER_IN = c_F3) else '0';
 
-  reset_retrans <= RESET_RETRANSMIT_IN when rising_edge(CLK_100);
+  reset_retrans_200 <= RESET_RETRANSMIT_IN when rising_edge(CLK_200);
 ----------------------------------------------------------------------
 -- RAM
 ----------------------------------------------------------------------
@@ -204,7 +204,7 @@ begin
 --         ram_read_addr <= (others => '0');
 --       els
       if rising_edge(CLK_200) then
-        if tx_allow_qtx = '0' or send_link_reset_qtx = '1' or reset_retrans  = '1'
+        if tx_allow_qtx = '0' or send_link_reset_qtx = '1' or reset_retrans_200  = '1'
         then
           ram_read_addr <= (others => '0');
         elsif load_read_pointer_i = '1' then
@@ -222,7 +222,7 @@ begin
 --         ram_write_addr <= (others => '0');
 --       els
       if rising_edge(CLK_200) then
-        if tx_allow_qtx = '0' or send_link_reset_qtx = '1' or reset_retrans  = '1' then
+        if tx_allow_qtx = '0' or send_link_reset_qtx = '1' or reset_retrans_200  = '1' then
           ram_write_addr <= (others => '0');
         elsif ram_write = '1' then
           ram_write_addr <= ram_write_addr + to_unsigned(1,1);
@@ -400,7 +400,7 @@ begin
       if RESET_IN = '1' then
         ram_read <= '0';
       end if;
-      if reset_retrans = '1' then
+      if reset_retrans_200 = '1' then
         resub_mode <= '0';
       end if;
       if FORCE_PAK_ERROR_200 = '0' and FORCE_CRC_ERROR_200 = '0' then
@@ -465,11 +465,11 @@ begin
 --Store Request Retransmit position
   THE_STORE_REQUEST_PROC : process(CLK_200, RESET_IN)
     begin
-      if RESET_IN = '1' or reset_retrans = '1' then
+      if RESET_IN = '1' then
         make_request_i <= '0';
         request_position_i <= (others => '0');
       elsif rising_edge(CLK_200) then
-        if tx_allow_qtx = '0' then
+        if tx_allow_qtx = '0' or reset_retrans_200 = '1' then
           make_request_i     <= '0';
           request_position_i <= (others => '0');
         elsif request_retransmit_i = '1' then
@@ -487,15 +487,16 @@ begin
 --Store Restart position
   THE_STORE_RESTART_PROC : process(CLK_200, RESET_IN)
     begin
-      if RESET_IN = '1' or reset_retrans = '1' then
+      if RESET_IN = '1' then
         make_restart_i           <= '0';
         restart_position_i       <= (others => '0');
-        load_read_pointer_i <= '0';
+        load_read_pointer_i      <= '0';
       elsif rising_edge(CLK_200) then
         load_read_pointer_i <= '0';
-        if tx_allow_qtx = '0' then
+        if tx_allow_qtx = '0' or reset_retrans_200 = '1' then
           make_restart_i         <= '0';
           restart_position_i     <= (others => '0');
+          load_read_pointer_i    <= '0';
         elsif start_retransmit_i = '1' then
           make_restart_i         <= '1';
           restart_position_i     <= restart_position_q;