*** empty log message ***

diff --git a/tdc_test/compile_constraints.pl b/tdc_test/compile_constraints.pl
index 84f9114326e0494581cb50cb85a6917beba0985e..12ec56197d690d138bf39916c136c4c18c87b654 100644 (file)
--- a/tdc_test/compile_constraints.pl
+++ b/tdc_test/compile_constraints.pl
@@ -7,6 +7,6 @@ my $TOPNAME                      = "trb3_periph";  #Name of top-level entity
 my $BasePath                     = "../base/";     #path to "base" directory
 
 #create full lpf file
-system("cp $BasePath/".$TOPNAME."_ada.lpf workdir/$TOPNAME.lpf");
+system("cp $BasePath/trb3_periph_mainz.lpf workdir/$TOPNAME.lpf");
 system("cat ".$TOPNAME."_constraints.lpf >> workdir/$TOPNAME.lpf");
 

diff --git a/tdc_test/compile_periph_synonly_hades27.pl b/tdc_test/compile_periph_synonly_hades27.pl
deleted file mode 100755 (executable)
index fd46de4..0000000
--- a/tdc_test/compile_periph_synonly_hades27.pl
+++ /dev/null
@@ -1,155 +0,0 @@
-#!/usr/bin/perl
-use Data::Dumper;
-use warnings;
-use strict;
-
-
-
-
-###################################################################################
-#Settings for this project
-my $TOPNAME                      = "trb3_periph";  #Name of top-level entity
-my $BasePath                     = "../base/";     #path to "base" directory
-my $lattice_path                 = '/opt/lattice/diamond/1.3';
-my $synplify_path                = '/opt/synplicity/fpga_e201103';
-my $lm_license_file_for_synplify = "27000\@lxcad01.gsi.de";
-my $lm_license_file_for_par      = "1710\@cronos.e12.physik.tu-muenchen.de";
-###################################################################################
-
-
-
-
-
-
-
-
-use FileHandle;
-
-$ENV{'SYNPLIFY'}=$synplify_path;
-$ENV{'SYN_DISABLE_RAINBOW_DONGLE'}=1;
-$ENV{'LM_LICENSE_FILE'}=$lm_license_file_for_synplify;
-
-
-
-
-my $FAMILYNAME="LatticeECP3";
-my $DEVICENAME="LFE3-150EA";
-my $PACKAGE="FPBGA672";
-my $SPEEDGRADE="8";
-
-
-#create full lpf file
-system("cp ".$TOPNAME."_ada_mainz.lpf workdir/$TOPNAME.lpf");
-system("cat ".$TOPNAME."_constraints.lpf >> workdir/$TOPNAME.lpf");
-
-
-#set -e
-#set -o errexit
-
-#generate timestamp
-my $t=time;
-my $fh = new FileHandle(">version.vhd");
-die "could not open file" if (! defined $fh);
-print $fh <<EOF;
-
---## attention, automatically generated. Don't change by hand.
-library ieee;
-USE IEEE.std_logic_1164.ALL;
-USE IEEE.std_logic_ARITH.ALL;
-USE IEEE.std_logic_UNSIGNED.ALL;
-use ieee.numeric_std.all;
-
-package version is
-
-    constant VERSION_NUMBER_TIME  : integer   := $t;
-
-end package version;
-EOF
-$fh->close;
-
-system("env| grep LM_");
-my $r = "";
-
-my $c="$synplify_path/bin/synplify_premier_dp -batch $TOPNAME.prj";
-$r=execute($c, "do_not_exit" );
-
-
-chdir "workdir";
-$fh = new FileHandle("<$TOPNAME".".srr");
-my @a = <$fh>;
-$fh -> close;
-
-
-
-foreach (@a)
-{
-    if(/\@E:/)
-    {
-       print "\n";
-       $c="cat $TOPNAME.srr | grep \"\@E\"";
-       system($c);
-        print "\n\n";
-       exit 129;
-    }
-}
-
-
-#$ENV{'LM_LICENSE_FILE'}=$lm_license_file_for_par;
-
-#$c=qq| $lattice_path/ispfpga/bin/lin/edif2ngd  -l $FAMILYNAME -d $DEVICENAME "$TOPNAME.edf" "$TOPNAME.ngo" |;
-#execute($c);
-
-#$c=qq|$lattice_path/ispfpga/bin/lin/edfupdate   -t "$TOPNAME.tcy" -w "$TOPNAME.ngo" -m "$TOPNAME.ngo" "$TOPNAME.ngx"|;
-#execute($c);
-
-#$c=qq|$lattice_path/ispfpga/bin/lin/ngdbuild  -a $FAMILYNAME -d $DEVICENAME -p "$lattice_path/ispfpga/ep5c00/data" -dt "$TOPNAME.ngo" "$TOPNAME.ngd"|;
-#execute($c);
-
-#my $tpmap = $TOPNAME . "_map" ;
-
-#$c=qq|$lattice_path/ispfpga/bin/lin/map  -retime -split_node -a $FAMILYNAME -p $DEVICENAME -t $PACKAGE -s $SPEEDGRADE "$TOPNAME.ngd" -o "$tpmap.ncd"  -mp "$TOPNAME.mrp" "$TOPNAME.lpf"|;
-#execute($c);
-
-
-#system("rm $TOPNAME.ncd");
-
-#$c=qq|$lattice_path/ispfpga/bin/lin/multipar -pr "$TOPNAME.prf" -o "mpar_$TOPNAME.rpt" -log "mpar_$TOPNAME.log" -p "../$TOPNAME.p2t"  "$tpmap.ncd" "$TOPNAME.ncd"|;
-#execute($c);
-
-## IOR IO Timing Report
-#$c=qq|$lattice_path/ispfpga/bin/lin/iotiming -s "$TOPNAME.ncd" "$TOPNAME.prf"|;
-#execute($c);
-
-## TWR Timing Report
-#$c=qq|$lattice_path/ispfpga/bin/lin/trce -c -v 15 -o "$TOPNAME.twr.setup" "$TOPNAME.ncd" "$TOPNAME.prf"|;
-#execute($c);
-
-#$c=qq|$lattice_path/ispfpga/bin/lin/trce -hld -c -v 5 -o "$TOPNAME.twr.hold"  "$TOPNAME.ncd" "$TOPNAME.prf"|;
-#execute($c);
-
-#$c=qq|$lattice_path/ispfpga/bin/lin/ltxt2ptxt $TOPNAME.ncd|;
-#execute($c);
-
-#$c=qq|$lattice_path/ispfpga/bin/lin/bitgen  -w "$TOPNAME.ncd"  "$TOPNAME.prf"|;
-#execute($c);
-
-chdir "..";
-
-exit;
-
-sub execute {
-    my ($c, $op) = @_;
-    #print "option: $op \n";
-    $op = "" if(!$op);
-    print "\n\ncommand to execute: $c \n";
-    $r=system($c);
-    if($r) {
-  print "$!";
-  if($op ne "do_not_exit") {
-      exit;
-  }
-    }
-
-    return $r;
-
-}

diff --git a/tdc_test/trb3_periph.prj b/tdc_test/trb3_periph.prj
index b455c1fefeb94f4c9e22b1a35edbf9c49e93bae5..0bccfa4ba46a706850032879b32e88ece330b8ca 100644 (file)
--- a/tdc_test/trb3_periph.prj
+++ b/tdc_test/trb3_periph.prj
@@ -101,6 +101,7 @@ add_file -vhdl -lib work "../../trbnet/special/handler_trigger_and_data.vhd"
 add_file -vhdl -lib work "../../trbnet/special/trb_net_reset_handler.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full_handler.vhd"
 add_file -vhdl -lib work "../../trbnet/special/fpga_reboot.vhd"
+add_file -vhdl -lib work "../../trbnet/special/spi_ltc2600.vhd"
 
 add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp3_fifo_18x1k.vhd"
 add_file -vhdl -lib work "../../trbnet/lattice/ecp3/trb_net16_fifo_arch.vhd"
@@ -138,24 +139,33 @@ add_file -vhdl -lib work "../../trbnet/media_interfaces/trb_net16_med_ecp3_sfp.v
 add_file -vhdl -lib "work" "../base/cores/pll_in200_out100.vhd"
 
 
-add_file -vhdl -lib "work" "source/Adder_304.vhd"
-add_file -vhdl -lib "work" "source/bit_sync.vhd"
-add_file -vhdl -lib "work" "source/Channel.vhd"
-add_file -vhdl -lib "work" "source/ddr_off.vhd"
-add_file -vhdl -lib "work" "source/Encoder_304_Bit.vhd"
-add_file -vhdl -lib "work" "source/FIFO_32x512_OutReg.vhd"
-add_file -vhdl -lib "work" "source/MB_SPI.vhd"
-add_file -vhdl -lib "work" "source/pll_100_in_5_out.vhd"
-add_file -vhdl -lib "work" "source/pll_100_in_40_out.vhd"
-add_file -vhdl -lib "work" "source/Reference_channel.vhd"
-
-#add_file -vhdl -lib "work" "source/ROM_Encoder.vhd"
-#add_file -vhdl -lib "work" "source/ROM_encoder_2.vhd"
-#add_file -vhdl -lib "work" "source/ROM_encoder_3.vhd"
-add_file -vhdl -lib "work" "source/ROM_encoder_4.vhd"
-
-add_file -vhdl -lib "work" "source/ROM_FIFO.vhd"
-add_file -vhdl -lib "work" "source/TDC.vhd"
-add_file -vhdl -lib "work" "source/trb3_periph.vhd"
-add_file -vhdl -lib "work" "source/up_counter.vhd"
-
+#add_file -vhdl -lib "work" "source/trb3_periph.vhd"
+
+#add_file -vhdl -lib "work" "source/Adder_304.vhd"
+#add_file -vhdl -lib "work" "source/bit_sync.vhd"
+#add_file -vhdl -lib "work" "source/Channel.vhd"
+#add_file -vhdl -lib "work" "source/ddr_off.vhd"
+#add_file -vhdl -lib "work" "source/Encoder_304_Bit.vhd"
+#add_file -vhdl -lib "work" "source/FIFO_32x512_OutReg.vhd"
+#add_file -vhdl -lib "work" "source/MB_SPI.vhd"
+#add_file -vhdl -lib "work" "source/pll_100_in_5_out.vhd"
+#add_file -vhdl -lib "work" "source/pll_100_in_40_out.vhd"
+#add_file -vhdl -lib "work" "source/Reference_channel.vhd"
+#add_file -vhdl -lib "work" "source/ROM_encoder_4.vhd"
+#add_file -vhdl -lib "work" "source/ROM_FIFO.vhd"
+#add_file -vhdl -lib "work" "source/TDC.vhd"
+#add_file -vhdl -lib "work" "source/up_counter.vhd"
+
+
+add_file -vhdl -lib "work" "trb3_periph.vhd"
+
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v0.4/Adder_304.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v0.4/bit_sync.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v0.4/Channel.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v0.4/Encoder_304_Bit.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v0.4/FIFO_32x32_OutReg.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v0.4/Reference_channel.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v0.4/ROM_encoder_3.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v0.4/ROM_FIFO.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v0.4/TDC.vhd"
+add_file -vhdl -lib "work" "../tdc_releases/tdc_v0.4/up_counter.vhd"