]> jspc29.x-matter.uni-frankfurt.de Git - TOMcat.git/commitdiff
clean up
authorMichael Boehmer <mboehmer@ph.tum.de>
Tue, 16 Aug 2022 09:04:54 +0000 (11:04 +0200)
committerMichael Boehmer <mboehmer@ph.tum.de>
Tue, 16 Aug 2022 09:04:54 +0000 (11:04 +0200)
gbe/tomcat_gbe.prj
gbe/tomcat_gbe_d0ch0_d1ch1.vhd
gbe/tomcat_gbe_d1ch1_d0ch0.vhd

index 00a917dabae5aa78934a2c45169996d25b00d21e..ab31e3d8e619515d21942d4c83ceea8548084562 100644 (file)
@@ -59,7 +59,6 @@ add_file -vhdl -lib work "config.vhd"
 add_file -vhdl -lib work "../../trb3/base/trb3_components.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net_std.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net_components.vhd"
-add_file -vhdl -lib work "tdc_release/tdc_version.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net_gbe_protocols.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net_gbe_components.vhd"
 #add_file -vhdl -lib work "../../trbnet/trb_net16_hub_func.vhd"
@@ -75,7 +74,6 @@ add_file -vhdl -lib work "../../trbnet/lattice/ecp5/RAM/spi_dpram_32_to_8/spi_dp
 add_file -vhdl -lib work "../../trbnet/lattice/ecp5/FIFO/lattice_ecp5_fifo_18x1k/lattice_ecp5_fifo_18x1k.vhd"
 add_file -vhdl -lib work "../../trbnet/lattice/ecp5/FIFO/lattice_ecp5_fifo_16bit_dualport/lattice_ecp5_fifo_16bit_dualport.vhd"
 add_file -vhdl -lib work "../../trbnet/lattice/ecp5/trb_net_fifo_16bit_bram_dualport.vhd"
-#add_file -vhdl -lib work "../../trbnet/lattice/ecp3/lattice_ecp2m_fifo.vhd" 
 add_file -vhdl -lib work "../../trbnet/lattice/ecp5/FIFO/fifo_36x256_oreg/fifo_36x256_oreg.vhd"
 add_file -vhdl -lib work "../../trbnet/lattice/ecp5/FIFO/fifo_36x512_oreg/fifo_36x512_oreg.vhd"
 add_file -vhdl -lib work "../../trbnet/lattice/ecp5/FIFO/fifo_36x1k_oreg/fifo_36x1k_oreg.vhd"
@@ -152,8 +150,6 @@ add_file -vhdl -lib work "../../trbnet/trb_net16_api_base.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_iobuf.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_io_multiplexer.vhd"
 add_file -vhdl -lib work "../../trbnet/trb_net16_trigger.vhd"
-#add_file -vhdl -lib work "../../trbnet/trb_net16_ipudata.vhd"
-#add_file -vhdl -lib work "../../trbnet/trb_net16_endpoint_hades_full.vhd"
 add_file -vhdl -lib work "../../trbnet/basics/signal_sync.vhd"
 add_file -vhdl -lib work "../../trbnet/basics/ram_dp_rw.vhd"
 add_file -vhdl -lib work "../../trbnet/basics/pulse_stretch.vhd"
@@ -191,15 +187,11 @@ add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_protocol_selec
 add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_frame_trans.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_frame_constr.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_transmit_control2.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_ipu_interface.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/base/trb_net16_gbe_event_constr.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_ARP.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_Ping.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_DHCP.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_SCTRL.vhd"
-#add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_KillPing.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe_trb/protocols/trb_net16_gbe_response_constructor_Forward.vhd"
-#add_file -verilog -lib work "../../trbnet/gbe_trb_ecp5/media/ecp5-5g/serdes_gbe_softlogic.v"
 
 add_file -vhdl -lib work "../../trbnet/gbe_trb/base/inserter.vhd"
 add_file -vhdl -lib work "../../trbnet/gbe_trb/base/remover.vhd"
index fd725829d1c63eab6616d1d77542085e735dbd3c..823e6166ab8d97bdc4ed43bdb1f7370bd5f58c2e 100644 (file)
@@ -328,6 +328,7 @@ end process THE_DLM_TAG_CTR_PROC;
     DLM_DATA_IN           => x"00",
     DLM_FOUND_OUT         => open,
     DLM_DATA_OUT          => open,
+    DLM_CLK_OUT           => open,
     -- Debug
     STATUS_OUT            => status(7 downto 0),
     DEBUG_OUT             => open
@@ -376,6 +377,7 @@ end process THE_DLM_TAG_CTR_PROC;
     DLM_DATA_IN           => dlm_tx_data_int,
     DLM_FOUND_OUT         => dlm_found_int,
     DLM_DATA_OUT          => dlm_rx_data_int,
+    DLM_CLK_OUT           => open,
     -- Debug
     STATUS_OUT            => open,
     DEBUG_OUT             => debug(63 downto 0) --open
index 0bd14c1e452316d19fce03f1dc2d2a06710763c5..360dd7c6784830da0f243e0cabcf8e43807e32ed 100644 (file)
@@ -244,44 +244,44 @@ begin
 ---------------------------------------------------------------------------
 -- LED blink generator
 ---------------------------------------------------------------------------
-THE_BLINK_COUNTER_PROC: process( clk_sys )
-begin
-  if( rising_edge(clk_sys) ) then
-    if( tick_ms_int = '1' ) then
-      blink_counter <= blink_counter + 1;
+  THE_BLINK_COUNTER_PROC: process( clk_sys )
+  begin
+    if( rising_edge(clk_sys) ) then
+      if( tick_ms_int = '1' ) then
+        blink_counter <= blink_counter + 1;
+      end if;
     end if;
-  end if;
-end process THE_BLINK_COUNTER_PROC;
+  end process THE_BLINK_COUNTER_PROC;
 
 ---------------------------------------------------------------------------
 -- DLM timing generator
 ---------------------------------------------------------------------------
-THE_DLM_SEND_PROC: process( clk_sys )
-begin
-  if( rising_edge(clk_sys) ) then
-    inc_dlm_tag <= rst_dlm_ctr;
-    rst_dlm_ctr <= rst_dlm_ctr_x;
-    if( (reset_i = '1') or (rst_dlm_ctr = '1') or (aux_reg(31) = '0') ) then
-      dlm_ctr <= (others => '0');
-    elsif( aux_reg(31) = '1' ) then
-      dlm_ctr <= dlm_ctr + 1;
+  THE_DLM_SEND_PROC: process( clk_sys )
+  begin
+    if( rising_edge(clk_sys) ) then
+      inc_dlm_tag <= rst_dlm_ctr;
+      rst_dlm_ctr <= rst_dlm_ctr_x;
+      if( (reset_i = '1') or (rst_dlm_ctr = '1') or (aux_reg(31) = '0') ) then
+        dlm_ctr <= (others => '0');
+      elsif( aux_reg(31) = '1' ) then
+        dlm_ctr <= dlm_ctr + 1;
+      end if;
     end if;
-  end if;
-end process THE_DLM_SEND_PROC;
+  end process THE_DLM_SEND_PROC;
 
-rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) and (aux_reg(31) = '1')) else '0';
+  rst_dlm_ctr_x <= '1' when ((std_logic_vector(dlm_ctr) = aux_reg(23 downto 0)) and (aux_reg(31) = '1')) else '0';
 
 -- DLM "tag" for blinking LEDs :)
-THE_DLM_TAG_CTR_PROC: process( clk_sys )
-begin
-  if( rising_edge(clk_sys) ) then
-    if( (reset_i = '1') or (aux_reg(31) = '0') ) then
-      dlm_tag_ctr <= (others => '0');
-    elsif( inc_dlm_tag = '1' ) then
-      dlm_tag_ctr <= dlm_tag_ctr + 1;
+  THE_DLM_TAG_CTR_PROC: process( clk_sys )
+  begin
+    if( rising_edge(clk_sys) ) then
+      if( (reset_i = '1') or (aux_reg(31) = '0') ) then
+        dlm_tag_ctr <= (others => '0');
+      elsif( inc_dlm_tag = '1' ) then
+        dlm_tag_ctr <= dlm_tag_ctr + 1;
+      end if;
     end if;
-  end if;
-end process THE_DLM_TAG_CTR_PROC;
+  end process THE_DLM_TAG_CTR_PROC;
 
 ---------------------------------------------------------------------------
 -- GbE interface (SFP)
@@ -328,6 +328,7 @@ end process THE_DLM_TAG_CTR_PROC;
     DLM_DATA_IN           => dlm_tx_data_int,
     DLM_FOUND_OUT         => dlm_found_int,
     DLM_DATA_OUT          => dlm_rx_data_int,
+    DLM_CLK_OUT           => open,
     -- Debug
     STATUS_OUT            => status(7 downto 0),
     DEBUG_OUT             => debug(63 downto 0) --open
@@ -379,6 +380,7 @@ end process THE_DLM_TAG_CTR_PROC;
     DLM_DATA_IN           => x"00",
     DLM_FOUND_OUT         => open,
     DLM_DATA_OUT          => open,
+    DLM_CLK_OUT           => open,
     -- Debug
     STATUS_OUT            => open,
     DEBUG_OUT             => open
@@ -619,7 +621,7 @@ end process THE_DLM_TAG_CTR_PROC;
       FLASH_OUT          => flash_mosi_i,
       PROGRAMN           => PROGRAMN,
       REBOOT_IN          => reboot_int,
-      -- I2C
+      -- I2CDLM_CLK_OUT
       SDA_INOUT          => SFP_MOD_2, --open, --I2C_SDA,
       SCL_INOUT          => SFP_MOD_1, --open, --SI2C_SCL,      
       -- Additional register