only one mode of latching to incoming data

diff --git a/optical_link/flexi_PCS_channel_synch.vhd b/optical_link/flexi_PCS_channel_synch.vhd
index 8b4496432a2c29253c21a0ad6cc9ace97808a36f..5f473cae1febaf246be2767d7bd2f9952028392b 100644 (file)
--- a/optical_link/flexi_PCS_channel_synch.vhd
+++ b/optical_link/flexi_PCS_channel_synch.vhd
@@ -14,7 +14,7 @@ entity flexi_PCS_channel_synch is
   
   port (
     SYSTEM_CLK       : in  std_logic;
-    TX_CLK              : in  std_logic;
+    TX_CLK           : in  std_logic;
     RX_CLK           : in  std_logic;
     RESET            : in  std_logic;
     RXD              : in  std_logic_vector(15 downto 0);
@@ -289,7 +289,7 @@ begin
       elsif SYNCH_CURRENT = NORMAL_OPERATION_2 then
         fifo_data_in <= '0' & (not RX_K(0)) & RXD;
       elsif SYNCH_CURRENT = NORMAL_OPERATION_1 then
-        fifo_data_in <= '0' & (not RX_K(1)) & RXD(7 downto 0) & RXD(15 downto 8);
+        fifo_data_in <= '0' & (not RX_K(1)) & rxd_synch_i(7 downto 0) & RXD(15 downto 8);
       else
         fifo_data_in <= (others => '0');
       end if;
@@ -319,9 +319,10 @@ begin
         rx_rst_i       <= '0';
         resync_counter_up <= '0';
         resync_counter_clr <= '1';
-        if rxd_synch_i = x"bc50" then
-          SYNCH_NEXT <= WAIT_1;--NORMAL_OPERATION_1;--WAIT_1;
-        elsif rxd_synch_i = x"50bc" then
+--          if rxd_synch_i = x"bc50" then
+--           SYNCH_NEXT <= WAIT_1;--NORMAL_OPERATION_1;--WAIT_1;
+        --els
+        if rxd_synch_i = x"50bc" or rxd_synch_i = x"c5bc" then
           SYNCH_NEXT <= WAIT_2;--NORMAL_OPERATION_2;  --WAIT_2;
         else
           SYNCH_NEXT <= RESYNC1;
@@ -358,9 +359,10 @@ begin
          rx_rst_i       <= '0';
          resync_counter_up <= '0';
          resync_counter_clr <= '1';
-         if rxd_synch_i = x"bc50" and rx_k_synch_i(1) = '1' then
-           SYNCH_NEXT <= WAIT_1;--NORMAL_OPERATION_1;
-         elsif rxd_synch_i = x"50bc" and rx_k_synch_i(0) = '1' then
+--          if rxd_synch_i = x"bc50" and rx_k_synch_i(1) = '1' then
+--            SYNCH_NEXT <= WAIT_1;--NORMAL_OPERATION_1;
+         --els
+         if (rxd_synch_i = x"50bc" or rxd_synch_i = x"c5bc") and rx_k_synch_i(0) = '1' then
            SYNCH_NEXT <= WAIT_2;--NORMAL_OPERATION_2;
          else
            SYNCH_NEXT <= IDLE;
@@ -372,7 +374,7 @@ begin
         fsm_debug_register(2 downto 0) <= "011";
         resync_counter_up <= '1';
         resync_counter_clr <= '0';
-        if resync_counter(27) = '1' and rxd_synch_i = x"bc50" and rx_k_synch_i(1) = '1' then
+        if resync_counter(27) = '1' and (rxd_synch_i = x"bc50" or rxd_synch_i = x"bcc5") and rx_k_synch_i(1) = '1' then
           SYNCH_NEXT <= NORMAL_OPERATION_1;
         elsif resync_counter(26) = '1' and (rxd_synch_i /= x"bc50" or rx_k_synch_i(1) = '0')  then
           SYNCH_NEXT <= RESYNC1; 
@@ -386,9 +388,9 @@ begin
         fsm_debug_register(2 downto 0) <= "011";
         resync_counter_up <= '1';
         resync_counter_clr <= '0';
-        if resync_counter(27) = '1' and rxd_synch_i = x"50bc" and rx_k_synch_i(0) = '1' then
+        if resync_counter(27) = '1' and (rxd_synch_i = x"50bc" or rxd_synch_i = x"c5bc") and rx_k_synch_i(0) = '1' then
           SYNCH_NEXT <= NORMAL_OPERATION_2;
-        elsif resync_counter(26) = '1'and (rxd_synch_i /= x"50bc" or rx_k_synch_i(0) = '0') then
+        elsif resync_counter(26) = '1'and (rxd_synch_i(7 downto 0) /= x"bc" or rx_k_synch_i(0) = '0') then
           SYNCH_NEXT <= RESYNC1;
         else
           SYNCH_NEXT <= WAIT_2;