adcread.pl?DAQOPSERVER=localhost:88&FPGA=0xd882&chip=0&channel=CurrentDigital
\end{Verbatim}
+\subsubsection{Get.pl and put.pl}
+\label{sec:getputpl}
+Get.pl and put.pl are command line tools to read (get) from and write (put) to slow-control
+registers, while making use of the benefits of \hyperref[sec:xml-db]{xml-db}.
+Both scripts are found in "daqtools/xml-db/".
+Registers and sub-register data fields can be accessed by their unique names that
+abstract the register's address and the size and position of a data field inside
+a register.
+The output of get.pl is a self explanatory plain text table.
+
+\begin{Verbatim}[label=get.pl usage]
+get.pl <entity name> <FPGA address> <register/field name>
+\end{Verbatim}
+
+\begin{Verbatim}[label=put.pl usage]
+put.pl <entity name> <FPGA address> <register/field name> <value>
+\end{Verbatim}
+
\subsection{Overview of the daqscripts (draft!)}
\end{itemize}
\end{description}
-\subsection{Register definitions}
-
-\subsubsection{Converter board controller registers}
-
-\input{xml-dbtables/CbCtrlReg}
-
-\newpage
\subsubsection{Converter board microcontroller registers}
\input{xml-dbtables/CbUcReg}
\newpage
+\subsection{Slow control register definitions}
+\input{xml-dbtables/CbCtrlReg}
+\newpage
\subsubsection{Converter board SPI data stream registers}
\input{xml-dbtables/CbSpiStream}
--- /dev/null
+\section{The converter board slow control interfaces}
+
+\begin{figure}[H]
+\centering
+\includegraphics[width=.9\textwidth]{uC2FPGAcommunication.pdf}
+\caption{Schematic representation of the communication concept between the CbController FPGA
+entity and the converter board microcontroller}
+\label{fig:uC2FPGAcommunication}
+\end{figure}
+As discussed before, the converter board provides power and reference voltages for the
+sensors, as well as highly integrated monitoring features and logic signal conversion.
+All of these functions are administrated by the on-board microcontroller.
+
+This section aims to explain the communication procedures between
+the converter board microcontroller and its counterpart, the
+CbController entity in the TRB3 peripheral FPGA.
+These two devices have to work together as one functional unit in
+order to make the functionality of the converter board accessible
+via slow control.
+
+\subsection{The slow-control registers}
+The user cannot communicate with the microcontroller directly,
+since the only thing he can access are the slow control registers of the
+CbController entity.
+These slow control registers are divided into three
+different groups, which we call CbCtrReg, CbSpiStream and CbUcReg
+(see figure \ref{fig:uC2FPGAcommunication}).
+\begin{description}
+\item[CbUcReg group]
+These registers configure the microcontroller on the converter board, and thus
+all its on-board devices.
+
+The microcontroller possesses an exact copy of the CbUcReg registers
+which is updated from the FPGA every time a value is changed via slow control.
+The microcontroller sets the on-board power and signal switches according
+to the state of the corresponding bits in the registers.
+The necessary intercommunication between the CbController entity and the microcontroller is
+done through a bidirectional
+UART\footnote{Universal Asynchronous Receiver Transmitter} interface operating
+at \SI{115200}{baud}.
+
+Detailed documentation of the CbUcReg registers are found in table \ref{tab:CbUcReg}.
+\item[CbCtrlReg group]
+These are the converter board controller registers.
+These registers configure the behaviour of the CbController entity itself.
+Most notable features that are configured/monitored here:
+\begin{itemize}
+\item
+The UART baudrate can be changed
+\item
+The status of the overcurrent comparators of the converter board power supplies
+can be monitored.
+\item
+The converter board microcontroller can be forced into reset.
+\end{itemize}
+Detailed register definitions are found in table \ref{tab:CbCtrlReg}.
+\item[CbSpiStream group]
+The registers in this group are read-only for the slow-control user.
+They are constantly (over)written with the latest ADC and status information
+that the SPI slave interface receives from the converter board microcontroller.
+During normal operation the microcontroller reads out
+all converter board ADC channels every \SI{2}{\milli\second}.
+The ADC values are buffered in the microcontroller's RAM until they are transmitted to the FPGA
+by the microcontroller's SPI master controller. The transmission of the data is coordinated by the
+microcontroller's
+DMA\footnote{Direct Memory Access, a microprocessor technology that allows other devices
+beside the CPU to access the RAM} controller, while its main CPU is able to
+devote itself to the acquisition of new ADC data.
+
+All registers in this group are \SI{32}{bit} wide. The lower 16 bits contain the actual ADC or status
+value from the converter board, while the upper 16 bits are a timestamp created by the
+FPGA the moment the data packet is received. The timestamp is a momentary snapshot of a 16 bit
+counter that is incremented every \SI{16}{\micro\second} (overflow allowed).
+
+Detailed register definitions of the CbSpiStream group are found in table \ref{tab:CbSpiStream}.
+\end{description}
+\subsection{The intercommunication protocols}
+
+\subsubsection{The UART protocol}
+The data transmission format which is used to copy register content back and forth between the
+FPGA and the microcontroller is relatively straightforward.
+The UART is set to the standard 8-N-1\footnote{8 data bits, no parity bit, one stop bit} encoding
+(see figure \ref{fig:8n1Uart}).
+
+One data packet consists of three bytes and can transport the contents of one CbUcReg register.
+The first byte contains the register address while the
+other two bytes contain the upper and lower 8 bits of the register
+(see table \ref{tab:CbUcRegPacket}).
+The address byte is identical with the lower eight bits of the slow-control address of the
+corresponding CbUcReg register, as listed in table \ref{tab:CbUcReg}.
+
+\begin{table}
+\centering
+\begin{tabular}{ l c c c c c c c c }
+% & \multicolumn{8}{c}{Bits} \\
+ bits & \footnotesize 0 & \footnotesize 1 & \footnotesize 2 & \footnotesize 3
+ & \footnotesize 4 & \footnotesize 5 & \footnotesize 6 & \footnotesize 7 \\
+ \hline
+ byte 0 & \multicolumn{8}{c}{\cellcolor{light-red}register address} \\
+ byte 1 & \multicolumn{8}{c}{\cellcolor{light-green}register data (bits 8--15)} \\
+ byte 2 & \multicolumn{8}{c}{\cellcolor{light-green}register data (bits 0--7)} \\
+ \hline
+\end{tabular}
+\caption{Structure of the data packets that are exchanged between the converter board
+and the FPGA. These packets are used to synchronize the CbUcReg registers with their
+mirror counterparts in the microcontroller.}
+\label{tab:CbUcRegPacket}
+\end{table}
+
+\begin{figure}[H]
+\centering
+\includegraphics[width=.9\textwidth]{timingdiag/8n1Uart.pdf}
+\caption{Timing diagram of a byte sent over a UART transmitter (configured 8-N-1).
+The transmission begins with a start bit (LO), followed by eight data bits and is
+terminated by a stop bit (HI). The idle state of the line is HI.}
+\label{fig:8n1Uart}
+%\ref{fig:8n1Uart}
+\end{figure}
+
+
+\subsubsection{The SPI protocol}
+
+The data packets that are sent by the microcontroller through the SPI interface consist of
+two \SI{16}{bit} words (see table \ref{tab:CbSpiStreamPacket}).
+The first word contains the target address of a register in the CbSpiStream RAM of the FPGA.
+The second word contains the ADC value or status data that is to be stored at the above address.
+
+These internally used addresses correspond to the lower eight bits
+(last two hex digits) of the respective slow-control
+addresses as listed in table \ref{tab:CbSpiStream}.
+
+The SPI interface uses a word width of \SI{16}{bit} and is operated in the CPOL=0, CPHA=0 mode
+(see figure \ref{fig:16bSpi}). This means that SCK (serial clock) is low when idle and
+SDO (serial data out) is valid at each rising edge of SCK.
+
+
+\begin{figure}[H]
+\centering
+\includegraphics[width=.8\textwidth]{timingdiag/16bSpi.pdf}
+\caption{Timing diagram of the transmission of a 16 bit word over an SPI interface.
+The interface is configured CPOL=0 (SCK is LO when idle), CPHA=0 (SDO valid at rising edge of SCK).}
+\label{fig:16bSpi}
+%\ref{fig:16bSpi}
+\end{figure}
+
+\begin{table}
+\centering
+\begin{tabular}{ l l r l r}
+% & \multicolumn{8}{c}{Bits} \\
+ bits & \footnotesize 15 & \footnotesize... 8 & \footnotesize 7 ... & \footnotesize 0 \\
+ \hline
+ word 0 & \multicolumn{2}{p{4cm}}{\cellcolor{light-gray} empty (zeros)} & \multicolumn{2}{p{4cm}}{\cellcolor{light-red}register address} \\
+ word 1 & \multicolumn{4}{c}{\cellcolor{light-green}register data} \\
+ \hline
+\end{tabular}
+\caption{Structure of the data packets that are sent by the converter board microcontroller
+to transmit the ADC data to the FPGA}
+\label{tab:CbSpiStreamPacket}
+\end{table}
+
+\subsection{Register management with xml-db}
+\label{sec:xml-db}
+
+The TRB collaboration uses xml-db\footnote{developed by Andreas Neiser}, a software system to manage the
+slow-control registers of VHDL entities.
+Xml-db is included in the "daqtools" git repository.
+The concept behind xml-db is to define all register properties, such as
+name, address, size, description, etc.,
+in form of hierachically structured XML files, the so called database files.
+By running the "xml-db.pl" Perl script, all database files are parsed and checked for
+syntax and format errors. If the check succeeds, the script will generate a binary file
+in a cache directory for each database file.
+These binary files are created using the Storable Perl module, which is a powerful
+serialization/deserialization tool.
+The binary contains the same information as the original XML file while it can be
+efficiently "digested" by other DAQ and configuration Perl scripts using the Storable module
+in the other direction.
+
+Using the xml-db cache binaries as a dictionary, software tools allow the user to access
+slow-control registers by their unique names instead of their addresses, while providing
+additional register information on the fly, such as a descriptive text.
+
+The system greatly helps the user to retain an overview over larger groups of settings,
+while making it unnecessary to remember and decipher hexadecimal address numbers.
+
+Due to its benefits, xml-db is also used to administrate the slow-control registers of the
+CbController entity.
+The three above mentioned register groups CbUcReg, CbCtrlReg and CbSpiStream are defined
+in "daqtools/xml-db/database/CbController.xml".
+The names, addresses and descriptions of the registers and sub-register data fields as listed
+in tables \ref{tab:CbUcReg}, \ref{tab:CbCtrlReg} and \ref{tab:CbSpiStream} are identical to the
+definitions in the xml-db database file.
+
+For manipulating register contents in slow-control registers whilst exploiting the merits of
+xml-db, the user can use get.pl and put.pl\footnote{written by Jan Michel}
+(see section \ref{sec:getputpl}).
\ No newline at end of file
The momentary voltage of the sensor's analog power supply line (measured via a sense line).
\item[VoltageGnd]
The voltage drop on the ground line between sensor and converter board (measured via a sense line).
-\item[SensorTemperature]
+\item[SensorTemp]
The voltage drop on a forward biased diode on the silicon bulk of the MIMOSA26 chip. The voltage shows
a negative temperature dependence (the lower the voltage drop, the warmer the chip).
\item[VDiscRef2A-VDiscRef2D]
\usepackage{longtable}
% \usepackage[table]{xcolor}
\definecolor{light-gray}{gray}{0.90}
+
+\definecolor{light-red}{HTML}{FF9999}
+\definecolor{light-green}{HTML}{CCFFCC}
+\definecolor{light-blue}{HTML}{99CCFF}
+
+
+
% \usepackage[singlelinecheck=off]{caption}
% my macros
\include{daqsetup}
+\include{cbcommunication}
\include{config_structure}
\include{jtag}
\include{gui}
\subsection{Graphical JTAG Editor}
\label{sec:jtageditor}
To further facilitate JTAG register manipulation an editor with graphical user interface has been
-implemented. When "mvdsensorcontrol/tools/jtageditor.pl" is invoked from a browser, the user will be
-presented with a three panel layout (see figure \ref{fig:jtageditor_ssht}). In the top panel
+implemented. When "jtageditor.pl" is invoked from a browser, the user will be
+presented with a three panel layout (see figure \ref{fig:jtageditor_ssht}).
+In the top panel
the user can select an existing configuration file or create a new one, based on a distinct
specification file.
+
The bottom left panel provides a hierarchical view of the sensor's registers and data fields
as defined in the specification XML file. The register tabs can be unfolded to view the underlying
data fields. The values in the left panel can not be edited,
All changes in the bottom right panel are immediately applied to the configuration file
(there is no "save" button).
-When the mouse pointer is held still over a register or data field in either of the columns a help
-message is displayed in a box next to the pointer.
+When the mouse pointer is held still over a register or data field in either of the columns, a help
+message is displayed in a floating box next to the pointer.
The message shows the register or field description from the specification file (taken from the
MIMOSA26 datasheet) and the possible value range.
-A configuration file can also inherit settings from another (existing and valid) configuration file.
+Furthermore, a configuration file can inherit settings from another (existing and valid) configuration file.
Therefore an ancestor file can be selected in a dropdown menu at the top of the bottom right panel.
All settings from the ancestor file are imported as new defaults, which are then partially overridden
by the configuration's own settings. This feature can be used for example to operate a multitude
and the specification files are stored in "../specs/"
(relative to the location of jtageditor.pl).
+In a final step, it is to mention that all the above functions to create and edit JTAG configuration
+files are not merely accesible via the GUI.
+The script that runs in the back-end of the editor can instantly be used as stand-alone software
+from the command line or via HTTP request. This enables the user to automate special data acquisition
+tasks, that require the alteration of sensor settings in each iteration.
+See section \ref{sec:xmlOperation.pl} in the appendix for details.
+
\begin{figure}[H]
\centering
\includegraphics[width=.85\textwidth]{jtageditor.png}
attribute.
For each register and field there is a short description included along the above specifications.
All specifications and descriptions were adapted from the MIMOSA26 user manual v1.5 without
-alteration\footnote{apart from correcting a field size mismatch}.
+alteration\footnote{apart from correcting a field size mismatch and naming a register DAC\_BIAS
+which is referred to as DAC\_BIAS as well as BIAS\_DAC throughout the manual}.
\item[settings]
The settings XML file contains the actual settings that are defined by the user.
In this XML hierarchy, too, there are registers with data fields as child nodes. Here registers and
Data fields and registers that are not defined in the settings file are assumed to get the default
values assigned to them,
therefore the settings file can be very streamlined.
+
+Furthermore, a settings xml file can inherit settings from another settings file.
+Therefore an ancestor file can be denoted in the "inheritSettingsFrom" attribute of the root node.
+All settings from the ancestor file are imported as new defaults, which are then partially overridden
+by the settings files's own settings. This feature can be used to operate a multitude
+of sensors with the same parameters from a common ancestor file, while each sensor's own configuration
+file contains merely individual tuning parameters.
\end{description}
\begin{figure}[H]
Neither does he have to care how to align the values relative to the corresponding registers. With the
configuration file, the user has a clear "key->value" type interface to the sensor's JTAG settings.
+While, in principle, the settings files can be edited by hand, it is recommended to use the
+graphical JTAG editor (see section \ref{sec:jtageditor}), which greatly simplifies the task.
+\begin{Verbatim}[label=mvdconfig/config/ExampleJtagConf.xml]
+<MAPS
+ type="MIMOSA26"
+ specDbFile="MIMOSA26_JTAG_SPEC.xml"
+ inheritSettingsFrom="M26default.xml" >
+
+ <register name="DAC_BIAS">
+ <field name="IVDREF1B" value="210"/>
+ <field name="IVDREF1C" value="230"/>
+ <field name="IVDREF1D" value="180"/>
+ <field name="IVDREF1A" value="240"/>
+ </register>
+</MAPS>
+\end{Verbatim}
Converter board
\item
Front-end board ??
+\item
+CbController converter board controllerare aoei
\end{itemize}
\subsection{ToDo}
\begin{itemize}
\item
+in the jtag.tex file:
+clear up confusion with "configuration" file and settings file.
+\item
+CbController FiFo
+\item
+MinMaxOffset
+\item
+update screenshot of testgui
+\item
redesign selectors of adcmon, so they can be operated in terms of
system/setup
\item
--- /dev/null
+
+{ signal: [
+
+ //{ name: "SCK", wave: '0.1010101010|.10101010.',"period":0.5 ,"phase":0.15},
+ //{ name:'SCK', wave:'l...HlHlHlHlHl|.HlHlHlHl.','period':0.5},
+ { name:'SCK', wave:'0....10101010|.10101010..','period':0.5,"phase":0.65},
+ { name:'SDO', wave: 'x...=.=.=.=.=|=.=.=.=.x..',"data":'MSB 14 13 12 3 2 1 LSB','period':0.5,"phase":0.65},
+ { name:'CS', wave: '1..0.........|.........1.',"period":0.5,"phase":0.65}
+
+],
+ head:{
+ text:'SPI transmission of 16 bit word, CPOL=0, CPHA=0',
+
+ },
+
+ }
\ No newline at end of file
--- /dev/null
+
+{ signal: [
+
+ //{ name: "SCK", wave: '0.1010101010|.10101010.',"period":0.5 ,"phase":0.15},
+ //{ name:'SCK', wave:'l...HlHlHlHlHl|.HlHlHlHl.','period':0.5},
+
+ { name:'Tx', wave: '10========1..',"data":'LSB 1 2 3 4 5 6 MSB ',},
+
+],
+ head:{
+ text:'8-N-1 UART transmission',
+ tock:-1,
+ },
+
+ }
\ No newline at end of file
--- /dev/null
+http://wavedrom.googlecode.com/svn/trunk/editor.html
-A caption for me
+Register definitions for the converter board controller configuration registers
+(register group CbCtrlReg).
+These registers configure the behaviour of the CbController entity itself.
+Many of the above registers are for debug reasons only.
\ No newline at end of file
%\definecolor{light-gray}{gray}{0.90}
\begin{longtable}
-{ l l c p{8cm} }
+{ p{4cm} l c p{8cm} }
\toprule
\textbf{Register} & \textbf{Addr} & \textbf{Bits} & \textbf{Description} \\
\midrule
\midrule
\endhead\multicolumn{4}{r}{\textit{Continued on next page}} \\
\endfoot
- \endlastfoot \textbf{GpioPort} & 0xc030 & 0--15 & Output bit pattern of the TRB3 peripheral SPARE lines \\
+ \endlastfoot \textbf{GpioPort}\hfill(rw) & c030 & 0--15 & Output bit pattern of the TRB3 peripheral SPARE lines \\
\rowcolor{light-gray}
- \textbf{GpioPin} & 0xc031 & 0--15 & Current state of the SPARE lines \\
- \textbf{GpioDdr} & 0xc032 & 0--15 & Bitmask defining data direction (LO=input, HI=output) of the SPARE lines \\
+ \textbf{GpioPin}\hfill(r) & c031 & 0--15 & Current state of the SPARE lines \\
+ \textbf{GpioDdr}\hfill(rw) & c032 & 0--15 & Bitmask defining data direction (LO=input, HI=output) of the SPARE lines \\
\rowcolor{light-gray}
- \textbf{UartBaudrateDial} & 0xc040 & 0--3 & Select UART baudrate: 0->300, 1->600, 2->1200, 3->2400, 4->4800, 5->9600, 6->19200, 7->38400, 8->57600, 9->115200 \\
- \textbf{UartDataIn} & 0xc041 & 0--7 & Write a byte here to send it via UART, returns fill status of input FIFO \\
+ \textbf{UartBaud}\hfill(rw) & c040 & 0--3 & Select UART baudrate: 0->300, 1->600, 2->1200, 3->2400, 4->4800, 5->9600, 6->19200, 7->38400, 8->57600, 9->115200 \\
+ \textbf{UartDataIn}\hfill(rw) & c041 & 0--7 & Write a byte here to send it via UART, returns fill status of input FIFO \\
\rowcolor{light-gray}
- \textbf{UartDataOut} & 0xc042 & & Pops a byte from the UART receive buffer \\
+ \textbf{UartDataOut}\hfill(r) & c042 & & Pops a byte from the UART receive buffer \\
\rowcolor{light-gray}
\quad UartDataOutWord & & 0--7 & Received byte \\
\rowcolor{light-gray}
\quad UartRxBufEmpty & & 8 & HI if UART receive buffer empty \\
- \textbf{UartManOverride} & 0xc043 & 0 & Override the default UART functionality for debug reasons. If set HI, UartDataIn and UartDataOut operate the UART directly. \\
+ \textbf{UartManOvr}\hfill(rw) & c043 & 0 & Override the default UART functionality for debug reasons. If set HI, UartDataIn and UartDataOut operate the UART directly. \\
\rowcolor{light-gray}
- \textbf{UartDebug} & 0xc04f & 0--31 & Debug register for the UART \\
- \textbf{SpiDataOut} & 0xc050 & 0--15 & Last received SPI word from CB uC \\
+ \textbf{UartDebug}\hfill(r) & c04f & 0--31 & Debug register for the UART \\
+ \textbf{SpiDataOut}\hfill(r) & c050 & 0--15 & Last received SPI word from CB uC \\
\rowcolor{light-gray}
- \textbf{SpiDataIn} & 0xc051 & 0--15 & This word is returned by the FPGA's SPI slave each transmission \\
- \textbf{SpiCounter} & 0xc052 & 0--31 & Counts received SPI data words. 1 SPI word = 16 bit. \\
+ \textbf{SpiDataIn}\hfill(rw) & c051 & 0--15 & This word is returned by the FPGA's SPI slave each transmission \\
+ \textbf{SpiCounter}\hfill(r) & c052 & 0--31 & Counts received SPI data words. 1 SPI word = 16 bit. \\
\rowcolor{light-gray}
- \textbf{SpiFifoSelect} & 0xc053 & 0--7 & Select an SPI data channel to monitor in the FIFO \\
- \textbf{SpiFifoRead} & 0xc054 & & Pops a word from the SPI monitor FIFO \\
+ \textbf{SpiFifoSelect}\hfill(rw) & c053 & 0--7 & Select an SPI data channel to monitor in the FIFO \\
+ \textbf{SpiFifoRead}\hfill(r) & c054 & & Pops a word from the SPI monitor FIFO \\
\quad SpiFifoD & & 0--15 & SPI data word \\
\quad SpiFifoTS & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{UcReset} & 0xc060 & 0 & Reset CB uC when LO \\
- \textbf{Overcurrent} & 0xc070 & & Status of the four overcurrent detection inputs of the FPGA that are directly connected to the current drain comparators of the CB power supplies \\
+ \textbf{UcReset}\hfill(rw) & c060 & 0 & Reset CB uC when LO \\
+ \textbf{Overcurrent}\hfill(r) & c070 & & Status of the four overcurrent detection inputs of the FPGA that are directly connected to the current drain comparators of the CB power supplies \\
\quad OvCD0 & & 0 & HI if overcurrent on digital voltage of sensor 0 \\
\quad OvCA0 & & 4 & HI if overcurrent on analog voltage of sensor 0 \\
\quad OvCD1 & & 8 & HI if overcurrent on digital voltage of sensor 1 \\
\quad OvCA1 & & 12 & HI if overcurrent on analog voltage of sensor 1 \\
\bottomrule
-\caption{A caption for me}\label{tab:CbCtrlReg}\end{longtable}
+\caption{Register definitions for the converter board controller configuration registers
+(register group CbCtrlReg).
+These registers configure the behaviour of the CbController entity itself.
+Many of the above registers are for debug reasons only.}\label{tab:CbCtrlReg}\end{longtable}
-A caption for me
+The register definitions of the FPGA memory that receives the ADC values and status information that
+are continuously streamed from the converter board (register group CbSpiStream).
+All registers are 32 bit wide.
+The received values are stored in the lower 16 bit of the register, while the receiver writes
+a timestamp to the upper 16 bit when the data packet is received.
%\definecolor{light-gray}{gray}{0.90}
\begin{longtable}
-{ l l c p{8cm} }
+{ p{4cm} l c p{8cm} }
\toprule
\textbf{Register} & \textbf{Addr} & \textbf{Bits} & \textbf{Description} \\
\midrule
\midrule
\endhead\multicolumn{4}{r}{\textit{Continued on next page}} \\
\endfoot
- \endlastfoot \textbf{CurrentDigital.0} & 0xc100 & & Current on the digital power supply \\
+ \endlastfoot \textbf{CurrentDigital.0}\hfill(r) & c100 & & Current on the digital power supply \\
\quad CurrentDigitalD.0 & & 0--15 & Current [mA] = AdcVal x 0.0038147 \\
- \quad CurrentDigitalTS.0 & & 16--31 & Current on the digital power supply \\
+ \quad CurrentDigitalTS.0 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{CurrentAnalog.0} & 0xc101 & & Current on the analog power supply \\
+ \textbf{CurrentAnalog.0}\hfill(r) & c101 & & Current on the analog power supply \\
\rowcolor{light-gray}
\quad CurrentAnalogD.0 & & 0--15 & Current [mA] = AdcVal x 0.0038147 \\
\rowcolor{light-gray}
\quad CurrentAnalogTS.0 & & 16--31 & Reception timestamp \\
- \textbf{VoltageDigital.0} & 0xc102 & & Voltage of the digital power supply, sensed at the FEB \\
+ \textbf{VoltageDigital.0}\hfill(r) & c102 & & Voltage of the digital power supply, sensed at the FEB \\
\quad VoltageDigitalD.0 & & 0--15 & Voltage [mV] = AdcVal x 0.116752 \\
\quad VoltageDigitalTS.0 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{VoltageAnalog.0} & 0xc103 & & Voltage of the analog power supply, sensed at the FEB \\
+ \textbf{VoltageAnalog.0}\hfill(r) & c103 & & Voltage of the analog power supply, sensed at the FEB \\
\rowcolor{light-gray}
\quad VoltageAnalogD.0 & & 0--15 & Voltage [mV] = AdcVal x 0.116752 \\
\rowcolor{light-gray}
\quad VoltageAnalogTS.0 & & 16--31 & Reception timestamp \\
- \textbf{VoltageGnd.0} & 0xc104 & & Voltage on the ground sense line from the FEB \\
+ \textbf{VoltageGnd.0}\hfill(r) & c104 & & Voltage on the ground sense line from the FEB \\
\quad VoltageGndD.0 & & 0--15 & Voltage [mV] = AdcVal x 0.038147 \\
\quad VoltageGndTS.0 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{SensorTemperature.0} & 0xc105 & & Voltage measured at the M26 temperature diode, relative to GND sense \\
+ \textbf{SensorTemp.0}\hfill(r) & c105 & & Voltage measured at the M26 temperature diode, relative to GND sense \\
\rowcolor{light-gray}
- \quad SensorTemperatureD.0 & & 0--15 & Voltage [mV] = AdcVal x 0.038147 \\
+ \quad SensorTempD.0 & & 0--15 & Voltage [mV] = AdcVal x 0.038147 \\
\rowcolor{light-gray}
- \quad SensorTemperatureTS.0 & & 16--31 & Reception timestamp \\
- \textbf{ZeroSingle.0} & 0xc106 & & Zero calibration of amplifier, single ended \\
+ \quad SensorTempTS.0 & & 16--31 & Reception timestamp \\
+ \textbf{ZeroSingle.0}\hfill(r) & c106 & & Zero calibration of amplifier, single ended \\
\quad ZeroSingleD.0 & & 0--15 & Voltage [mV] = AdcVal x 0.038147 \\
\quad ZeroSingleTS.0 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{ZeroDifferential.0} & 0xc107 & & Zero calibration of amplifier, differential \\
+ \textbf{ZeroDifferential.0}\hfill(r) & c107 & & Zero calibration of amplifier, differential \\
\rowcolor{light-gray}
\quad ZeroDifferentialD.0 & & 0--15 & Voltage [mV] = (AdcVal x 0.0012186)-39.932 \\
\rowcolor{light-gray}
\quad ZeroDifferentialTS.0 & & 16--31 & Reception timestamp \\
- \textbf{VDiscRef2A.0} & 0xc108 & & Discr. baseline A \\
+ \textbf{VDiscRef2A.0}\hfill(r) & c108 & & Discr. baseline A \\
\quad VDiscRef2AD.0 & & 0--15 & Voltage [mV] = AdcVal x 0.116752 \\
\quad VDiscRef2ATS.0 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{VDiscRef2B.0} & 0xc109 & & Discr. baseline B \\
+ \textbf{VDiscRef2B.0}\hfill(r) & c109 & & Discr. baseline B \\
\rowcolor{light-gray}
\quad VDiscRef2BD.0 & & 0--15 & Voltage [mV] = AdcVal x 0.116752 \\
\rowcolor{light-gray}
\quad VDiscRef2BTS.0 & & 16--31 & Reception timestamp \\
- \textbf{VDiscRef2C.0} & 0xc10a & & Discr. baseline C \\
+ \textbf{VDiscRef2C.0}\hfill(r) & c10a & & Discr. baseline C \\
\quad VDiscRef2CD.0 & & 0--15 & Voltage [mV] = AdcVal x 0.116752 \\
\quad VDiscRef2CTS.0 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{VDiscRef2D.0} & 0xc10b & & Discr. baseline D \\
+ \textbf{VDiscRef2D.0}\hfill(r) & c10b & & Discr. baseline D \\
\rowcolor{light-gray}
\quad VDiscRef2DD.0 & & 0--15 & Voltage [mV] = AdcVal x 0.116752 \\
\rowcolor{light-gray}
\quad VDiscRef2DTS.0 & & 16--31 & Reception timestamp \\
- \textbf{VDiscRefA.0} & 0xc10c & & Discr. threshold voltage A (w/o baseline) \\
+ \textbf{VDiscRefA.0}\hfill(r) & c10c & & Discr. threshold voltage A (w/o baseline) \\
\quad VDiscRefAD.0 & & 0--15 & Voltage [mV] = (AdcVal x 0.0012186)-39.932 \\
\quad VDiscRefATS.0 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{VDiscRefB.0} & 0xc10d & & Discr. threshold voltage B (w/o baseline) \\
+ \textbf{VDiscRefB.0}\hfill(r) & c10d & & Discr. threshold voltage B (w/o baseline) \\
\rowcolor{light-gray}
\quad VDiscRefBD.0 & & 0--15 & Voltage [mV] = (AdcVal x 0.0012186)-39.932 \\
\rowcolor{light-gray}
\quad VDiscRefBTS.0 & & 16--31 & Reception timestamp \\
- \textbf{VDiscRefC.0} & 0xc10e & & Discr. threshold voltage C (w/o baseline) \\
+ \textbf{VDiscRefC.0}\hfill(r) & c10e & & Discr. threshold voltage C (w/o baseline) \\
\quad VDiscRefCD.0 & & 0--15 & Voltage [mV] = (AdcVal x 0.0012186)-39.932 \\
\quad VDiscRefCTS.0 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{VDiscRefD.0} & 0xc10f & & Discr. threshold voltage D (w/o baseline) \\
+ \textbf{VDiscRefD.0}\hfill(r) & c10f & & Discr. threshold voltage D (w/o baseline) \\
\rowcolor{light-gray}
\quad VDiscRefDD.0 & & 0--15 & Voltage [mV] = (AdcVal x 0.0012186)-39.932 \\
\rowcolor{light-gray}
\quad VDiscRefDTS.0 & & 16--31 & Reception timestamp \\
- \textbf{CurrentDigital.1} & 0xc110 & & Current on the digital power supply \\
+ \textbf{CurrentDigital.1}\hfill(r) & c110 & & Current on the digital power supply \\
\quad CurrentDigitalD.1 & & 0--15 & Current [mA] = AdcVal x 0.0038147 \\
- \quad CurrentDigitalTS.1 & & 16--31 & Current on the digital power supply \\
+ \quad CurrentDigitalTS.1 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{CurrentAnalog.1} & 0xc111 & & Current on the analog power supply \\
+ \textbf{CurrentAnalog.1}\hfill(r) & c111 & & Current on the analog power supply \\
\rowcolor{light-gray}
\quad CurrentAnalogD.1 & & 0--15 & Current [mA] = AdcVal x 0.0038147 \\
\rowcolor{light-gray}
\quad CurrentAnalogTS.1 & & 16--31 & Reception timestamp \\
- \textbf{VoltageDigital.1} & 0xc112 & & Voltage of the digital power supply, sensed at the FEB \\
+ \textbf{VoltageDigital.1}\hfill(r) & c112 & & Voltage of the digital power supply, sensed at the FEB \\
\quad VoltageDigitalD.1 & & 0--15 & Voltage [mV] = AdcVal x 0.116752 \\
\quad VoltageDigitalTS.1 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{VoltageAnalog.1} & 0xc113 & & Voltage of the analog power supply, sensed at the FEB \\
+ \textbf{VoltageAnalog.1}\hfill(r) & c113 & & Voltage of the analog power supply, sensed at the FEB \\
\rowcolor{light-gray}
\quad VoltageAnalogD.1 & & 0--15 & Voltage [mV] = AdcVal x 0.116752 \\
\rowcolor{light-gray}
\quad VoltageAnalogTS.1 & & 16--31 & Reception timestamp \\
- \textbf{VoltageGnd.1} & 0xc114 & & Voltage on the ground sense line from the FEB \\
+ \textbf{VoltageGnd.1}\hfill(r) & c114 & & Voltage on the ground sense line from the FEB \\
\quad VoltageGndD.1 & & 0--15 & Voltage [mV] = AdcVal x 0.038147 \\
\quad VoltageGndTS.1 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{SensorTemperature.1} & 0xc115 & & Voltage measured at the M26 temperature diode, relative to GND sense \\
+ \textbf{SensorTemp.1}\hfill(r) & c115 & & Voltage measured at the M26 temperature diode, relative to GND sense \\
\rowcolor{light-gray}
- \quad SensorTemperatureD.1 & & 0--15 & Voltage [mV] = AdcVal x 0.038147 \\
+ \quad SensorTempD.1 & & 0--15 & Voltage [mV] = AdcVal x 0.038147 \\
\rowcolor{light-gray}
- \quad SensorTemperatureTS.1 & & 16--31 & Reception timestamp \\
- \textbf{ZeroSingle.1} & 0xc116 & & Zero calibration of amplifier, single ended \\
+ \quad SensorTempTS.1 & & 16--31 & Reception timestamp \\
+ \textbf{ZeroSingle.1}\hfill(r) & c116 & & Zero calibration of amplifier, single ended \\
\quad ZeroSingleD.1 & & 0--15 & Voltage [mV] = AdcVal x 0.038147 \\
\quad ZeroSingleTS.1 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{ZeroDifferential.1} & 0xc117 & & Zero calibration of amplifier, differential \\
+ \textbf{ZeroDifferential.1}\hfill(r) & c117 & & Zero calibration of amplifier, differential \\
\rowcolor{light-gray}
\quad ZeroDifferentialD.1 & & 0--15 & Voltage [mV] = (AdcVal x 0.0012186)-39.932 \\
\rowcolor{light-gray}
\quad ZeroDifferentialTS.1 & & 16--31 & Reception timestamp \\
- \textbf{VDiscRef2A.1} & 0xc118 & & Discr. baseline A \\
+ \textbf{VDiscRef2A.1}\hfill(r) & c118 & & Discr. baseline A \\
\quad VDiscRef2AD.1 & & 0--15 & Voltage [mV] = AdcVal x 0.116752 \\
\quad VDiscRef2ATS.1 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{VDiscRef2B.1} & 0xc119 & & Discr. baseline B \\
+ \textbf{VDiscRef2B.1}\hfill(r) & c119 & & Discr. baseline B \\
\rowcolor{light-gray}
\quad VDiscRef2BD.1 & & 0--15 & Voltage [mV] = AdcVal x 0.116752 \\
\rowcolor{light-gray}
\quad VDiscRef2BTS.1 & & 16--31 & Reception timestamp \\
- \textbf{VDiscRef2C.1} & 0xc11a & & Discr. baseline C \\
+ \textbf{VDiscRef2C.1}\hfill(r) & c11a & & Discr. baseline C \\
\quad VDiscRef2CD.1 & & 0--15 & Voltage [mV] = AdcVal x 0.116752 \\
\quad VDiscRef2CTS.1 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{VDiscRef2D.1} & 0xc11b & & Discr. baseline D \\
+ \textbf{VDiscRef2D.1}\hfill(r) & c11b & & Discr. baseline D \\
\rowcolor{light-gray}
\quad VDiscRef2DD.1 & & 0--15 & Voltage [mV] = AdcVal x 0.116752 \\
\rowcolor{light-gray}
\quad VDiscRef2DTS.1 & & 16--31 & Reception timestamp \\
- \textbf{VDiscRefA.1} & 0xc11c & & Discr. threshold voltage A (w/o baseline) \\
+ \textbf{VDiscRefA.1}\hfill(r) & c11c & & Discr. threshold voltage A (w/o baseline) \\
\quad VDiscRefAD.1 & & 0--15 & Voltage [mV] = (AdcVal x 0.0012186)-39.932 \\
\quad VDiscRefATS.1 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{VDiscRefB.1} & 0xc11d & & Discr. threshold voltage B (w/o baseline) \\
+ \textbf{VDiscRefB.1}\hfill(r) & c11d & & Discr. threshold voltage B (w/o baseline) \\
\rowcolor{light-gray}
\quad VDiscRefBD.1 & & 0--15 & Voltage [mV] = (AdcVal x 0.0012186)-39.932 \\
\rowcolor{light-gray}
\quad VDiscRefBTS.1 & & 16--31 & Reception timestamp \\
- \textbf{VDiscRefC.1} & 0xc11e & & Discr. threshold voltage C (w/o baseline) \\
+ \textbf{VDiscRefC.1}\hfill(r) & c11e & & Discr. threshold voltage C (w/o baseline) \\
\quad VDiscRefCD.1 & & 0--15 & Voltage [mV] = (AdcVal x 0.0012186)-39.932 \\
\quad VDiscRefCTS.1 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{VDiscRefD.1} & 0xc11f & & Discr. threshold voltage D (w/o baseline) \\
+ \textbf{VDiscRefD.1}\hfill(r) & c11f & & Discr. threshold voltage D (w/o baseline) \\
\rowcolor{light-gray}
\quad VDiscRefDD.1 & & 0--15 & Voltage [mV] = (AdcVal x 0.0012186)-39.932 \\
\rowcolor{light-gray}
\quad VDiscRefDTS.1 & & 16--31 & Reception timestamp \\
- \textbf{SensorControlStatus.0} & 0xc120 & & Status of CB switches and Overcurrent indicators (read only) \\
+ \textbf{CbStatus.0}\hfill(r) & c120 & & Status of CB switches and Overcurrent indicators (read only) \\
\quad JtagEn\_.0 & & 0 & JTAG enabled for current sensor \\
\quad SensorEn\_.0 & & 1 & Reset, Start and Clock signals enabled for current sensor \\
\quad DisD\_.0 & & 2 & Discharge digital sensor power \\
\quad EnaA\_.0 & & 5 & Analog sensor power enabled \\
\quad OvCD\_.0 & & 6 & Current limit exceeded for digital sensor power \\
\quad OvCA\_.0 & & 7 & Current limit exceeded for analog sensor power \\
+ \quad CbStatusTS.0 & & 16--31 & Reception timestamp \\
\rowcolor{light-gray}
- \textbf{SensorControlStatus.1} & 0xc121 & & Status of CB switches and Overcurrent indicators (read only) \\
+ \textbf{CbStatus.1}\hfill(r) & c121 & & Status of CB switches and Overcurrent indicators (read only) \\
\rowcolor{light-gray}
\quad JtagEn\_.1 & & 0 & JTAG enabled for current sensor \\
\rowcolor{light-gray}
\quad OvCD\_.1 & & 6 & Current limit exceeded for digital sensor power \\
\rowcolor{light-gray}
\quad OvCA\_.1 & & 7 & Current limit exceeded for analog sensor power \\
+\rowcolor{light-gray}
+ \quad CbStatusTS.1 & & 16--31 & Reception timestamp \\
\bottomrule
-\caption{A caption for me}\label{tab:CbSpiStream}\end{longtable}
+\caption{The register definitions of the FPGA memory that receives the ADC values and status information that
+are continuously streamed from the converter board (register group CbSpiStream).
+All registers are 32 bit wide.
+The received values are stored in the lower 16 bit of the register, while the receiver writes
+a timestamp to the upper 16 bit when the data packet is received.}\label{tab:CbSpiStream}\end{longtable}
-A caption for me
+Register definitions of the registers that configure the converter board microcontroller
+(register group CbUcReg). The converter board microcontroller holds an exact copy of the
+CbUcReg registers in the FPGA, which is updated whenever a value is changed via slow control.
+The register contents in the microcontroller can be loaded back to the FPGA when bit "ReadBackAll"
+in the "ReadBack" register is set.
\ No newline at end of file
%\definecolor{light-gray}{gray}{0.90}
\begin{longtable}
-{ l l c p{8cm} }
+{ p{4cm} l c p{8cm} }
\toprule
\textbf{Register} & \textbf{Addr} & \textbf{Bits} & \textbf{Description} \\
\midrule
\midrule
\endhead\multicolumn{4}{r}{\textit{Continued on next page}} \\
\endfoot
- \endlastfoot \textbf{ReadBack} & 0xc000 & & Read back register values from the microcontroller \\
+ \endlastfoot \textbf{ReadBack}\hfill(rw) & c000 & & Read back register values from the microcontroller \\
\quad ReadBackAddr & & 0--7 & Address of the register that has to be sent to the FPGA \\
\quad ReadBackAll & & 8 & Set to 1 when you want to read back all registers from the microcontroller \\
\rowcolor{light-gray}
- \textbf{Switches.0} & 0xc001 & & Set Converter Board switches for current sensor \\
+ \textbf{Switches.0}\hfill(rw) & c001 & & Set Converter Board switches for current sensor \\
\rowcolor{light-gray}
\quad JtagEn.0 & & 0 & Enable JTAG for current sensor \\
\rowcolor{light-gray}
\quad DisA.0 & & 4 & Discharge analog sensor power filter caps \\
\rowcolor{light-gray}
\quad EnaA.0 & & 5 & Enable analog sensor power \\
- \textbf{DacCurLimA.0} & 0xc002 & 0--15 & Current limit for analog sensor power. Max current [mA] = AdcVal x 0.005035 \\
+ \textbf{DacCurLimA.0}\hfill(rw) & c002 & 0--15 & Current limit for analog sensor power. Max current [mA] = AdcVal x 0.005035 \\
\rowcolor{light-gray}
- \textbf{DacCurLimD.0} & 0xc003 & 0--15 & Current limit for digital sensor power. Max current [mA] = AdcVal x 0.005035 \\
- \textbf{DacVClp.0} & 0xc004 & 0--15 & Clamping voltage for current sensor (if DAC physically connected to sensor via jumper). Vclp [mV] = AdcVal x 0.05035 \\
+ \textbf{DacCurLimD.0}\hfill(rw) & c003 & 0--15 & Current limit for digital sensor power. Max current [mA] = AdcVal x 0.005035 \\
+ \textbf{DacVClp.0}\hfill(rw) & c004 & 0--15 & Clamping voltage for current sensor (if DAC physically connected to sensor via jumper). Vclp [mV] = AdcVal x 0.05035 \\
\rowcolor{light-gray}
- \textbf{OvCurStatus.0} & 0xc005 & & Indicates overcurrent situation. Register has to be read from uC for update. Do not use to trigger latchup protection! \\
+ \textbf{OvCurStatus.0}\hfill(r) & c005 & & Indicates overcurrent situation. Register has to be read from uC for update. Do not use to trigger latchup protection! \\
\rowcolor{light-gray}
\quad OvCD.0 & & 0 & HI if digital current limit exceeded. \\
\rowcolor{light-gray}
\quad OvCA.0 & & 1 & HI if analog current limit exceeded. \\
- \textbf{Switches.1} & 0xc006 & & Set Converter Board switches for current sensor \\
+ \textbf{Switches.1}\hfill(rw) & c006 & & Set Converter Board switches for current sensor \\
\quad JtagEn.1 & & 0 & Enable JTAG for current sensor \\
\quad SensorEn.1 & & 1 & Enable Reset, Start and Clock signals for current sensor \\
\quad DisD.1 & & 2 & Discharge digital sensor power filter caps \\
\quad DisA.1 & & 4 & Discharge analog sensor power filter caps \\
\quad EnaA.1 & & 5 & Enable analog sensor power \\
\rowcolor{light-gray}
- \textbf{DacCurLimA.1} & 0xc007 & 0--15 & Current limit for analog sensor power. Max current [mA] = AdcVal x 0.005035 \\
- \textbf{DacCurLimD.1} & 0xc008 & 0--15 & Current limit for digital sensor power. Max current [mA] = AdcVal x 0.005035 \\
+ \textbf{DacCurLimA.1}\hfill(rw) & c007 & 0--15 & Current limit for analog sensor power. Max current [mA] = AdcVal x 0.005035 \\
+ \textbf{DacCurLimD.1}\hfill(rw) & c008 & 0--15 & Current limit for digital sensor power. Max current [mA] = AdcVal x 0.005035 \\
\rowcolor{light-gray}
- \textbf{DacVClp.1} & 0xc009 & 0--15 & Clamping voltage for current sensor (if DAC physically connected to sensor via jumper). Vclp [mV] = AdcVal x 0.05035 \\
- \textbf{OvCurStatus.1} & 0xc00a & & Indicates overcurrent situation. Register has to be read from uC for update. Do not use to trigger latchup protection! \\
+ \textbf{DacVClp.1}\hfill(rw) & c009 & 0--15 & Clamping voltage for current sensor (if DAC physically connected to sensor via jumper). Vclp [mV] = AdcVal x 0.05035 \\
+ \textbf{OvCurStatus.1}\hfill(r) & c00a & & Indicates overcurrent situation. Register has to be read from uC for update. Do not use to trigger latchup protection! \\
\quad OvCD.1 & & 0 & HI if digital current limit exceeded. \\
\quad OvCA.1 & & 1 & HI if analog current limit exceeded. \\
\rowcolor{light-gray}
- \textbf{ADC\_conf} & 0xc00b & & \\
+ \textbf{ADC\_conf}\hfill(rw) & c00b & & \\
\rowcolor{light-gray}
\quad CycleRef & & 0 & If HI, periodically read out all ADC channels and send the data \\
- \textbf{CompileDate} & 0xc00f & & The day the CB uC firmware was compiled \\
+ \textbf{CompileDate}\hfill(r) & c00f & & The day the CB uC firmware was compiled \\
\quad CDay & & 0--4 & Day (1-31) \\
\quad CMonth & & 5--8 & Month (1-12) \\
\quad CYear & & 9--15 & Year (0-99) \\
\rowcolor{light-gray}
- \textbf{CompileTime} & 0xc010 & & The time the CB uC firmware was compiled \\
+ \textbf{CompileTime}\hfill(r) & c010 & & The time the CB uC firmware was compiled \\
\rowcolor{light-gray}
\quad CMin & & 0--5 & Minutes (0-59) \\
\rowcolor{light-gray}
\quad CHours & & 6--10 & Hours (0-23) \\
- \textbf{MiscConf} & 0xc011 & & Miscellaneous configuration options \\
+ \textbf{MiscConf}\hfill(rw) & c011 & & Miscellaneous configuration options \\
\quad Led1 & & 0 & LED1 on if HI \\
\quad Led2 & & 1 & LED2 on if HI \\
\quad Led3 & & 2 & LED3 on if HI \\
\quad OvRideLed3 & & 6 & If HI, enable external control over LED 3 \\
\quad OvRideLed4 & & 7 & If HI, enable external control over LED 4 \\
\rowcolor{light-gray}
- \textbf{ReadBackCounter} & 0xc013 & 0--15 & shows count of uC register read back operations \\
+ \textbf{ReadBackCounter}\hfill(r) & c013 & 0--15 & shows count of uC register read back operations \\
\bottomrule
-\caption{A caption for me}\label{tab:CbUcReg}\end{longtable}
+\caption{Register definitions of the registers that configure the converter board microcontroller
+(register group CbUcReg). The converter board microcontroller holds an exact copy of the
+CbUcReg registers in the FPGA, which is updated whenever a value is changed via slow control.
+The register contents in the microcontroller can be loaded back to the FPGA when bit "ReadBackAll"
+in the "ReadBack" register is set.}\label{tab:CbUcReg}\end{longtable}
+++ /dev/null
-#!/usr/bin/perl -w
-
-
-package this;
-
-use strict;
-use warnings;
-use POSIX;
-use Data::Dumper;
-use FileHandle;
-use Getopt::Long;
-use File::Basename;
-use File::Copy;
-# use Cwd;
-
-my $opt;
-
-$opt->{style} = "altgray";
-
-Getopt::Long::Configure(qw(gnu_getopt));
-GetOptions(
- 'help|h' => \$opt->{help},
- 'caption|c=s' => \$opt->{caption},
- 'label|l=s' => \$opt->{label},
- 'group|g=s' => \$opt->{group},
- 'entity|e=s' => \$opt->{entity},
- 'output|o=s' => \$opt->{output},
- 'pdf' => \$opt->{pdf},
- 'style=s' => \$opt->{style},
- 'standalone' => \$opt->{standalone}
- );
-
-printHelpMessage() if $opt->{help};
-printHelpMessage() unless $opt->{entity} && $opt->{group};
-
-
-my $self = this->new();
-
-$self->{opt} = $opt; # assimilate options
-
-$self->setEntity($opt->{entity});
-# $self->{entityFile} = "/home/micha/mnt/55local1/htdocs/daqtools/xml-db/cache/CbController.entity";
-$self->{group} = $opt->{group};
-$self->{table}->{label} = $opt->{label}||"tab:".$opt->{group};
-$self->{table}->{caption} = $opt->{caption}||"Registers in group ".$opt->{group};
-$self->produceTable();
-
-
-$self->writeTexFile($opt->{output}, $opt->{standalone} );
-
-if ($opt->{pdf}){
- if ($opt->{output}){
- $self->pdflatex($opt->{output});
- } else {
- die "\n\ncannot make pdf!\nno output file specified, use the -o <file.tex> argument!\n";
- }
-}
-
-
-
-########### simple subs ########
-
-sub printHelpMessage{
-print <<EOF;
-xml-db2tex.pl -e <entityName> -g <group> [-o <output.tex>] [OPTIONS]
-
-Generates a latex table of an xml-db group.
-The tex file must be compiled at least two times for the table alignment
-to work out correctly.
-
-Options:
- -h, --help brief help/usage message
- -e, --entity enter entity name or /path/to/entityName.entity
- -g, --group the xml-db group to be transformed into a table
- -o, --output write tex output to this file, if left out,
- will write tex code to STDOUT
-
- -c, --caption caption of the table
- -l, --label latex label of the table
-
- --style hline : separate registers by
- horizontal lines
- altgray : separate registers with
- alternating gray and white boxes
- (default)
-
- --standalone generate standalone compilable latex file
- --pdf compile directly to pdf (compiles twice)
-
-
-EOF
-exit;
-}
-
-
-########### object methods ########
-
-sub new {
- my $class = shift;
- my %options = @_;
-
- my $self = {};
-
- $self->{table} = textabular->new(); # create new latex table object
-
- # default formatting of the table
- $self->{table}->{dataKeys} = [ 'name', 'addr', 'bits', 'description' ];
- $self->{table}->{header} = [ 'Register', 'Addr', 'Bits', 'Description' ];
-# $self->{table}->{format} = '@{} l l l p{8cm} @{}';
- $self->{table}->{format} = ' l l c p{8cm} ';
-
- $self = {
- %$self,
- %options
- };
- bless($self, $class);
- return $self;
-}
-
-sub setEntity {
- my $self=shift;
- my $entity=shift;
-
- if(-e $entity) { # treat as /path/to/File
- $self->{entityFile} = $entity;
- } elsif (-e dirname($0)."/cache/".$entity.".entity"){
- $self->{entityFile} = dirname($0)."/cache/".$entity.".entity";
- } else {
- die "Entity $entity not found (not even in xml-db/cache)\n";
- }
-}
-
-sub produceTable {
- my $self= shift;
- my $xmldb = xmlDbMethods->new( entityFile => $self->{entityFile} );
- my $list = $xmldb->unfoldTree($self->{group});
- my $data = [];
- for my $name (@$list) { # processing the list
- my $node = $xmldb->{entity}->{$name};
- my $type = $node->{type};
- my $repeat = $node->{repeat} || 1;
- my $stepsize = $node->{stepsize}||0;
- my $bits = " ";
- if ($type ne 'register'){
- my $start = $node->{start};
- my $stop = $node->{start}+$node->{bits}-1;
- if ($start == $stop){
- $bits = $start;
- } else {
- $bits = "$start--$stop";
- }
- }
- #indent register fields
- if ($type eq 'field'){
- $name= '\quad '.$name;
- }
- for (my $i=0;$i<$repeat;$i++){
- my $name_ = $name;
- if ($repeat > 1) {
- $name_ = $name.".$i";
- }
- my $addr_ = $node->{address}+$i*$stepsize;
- my $hexaddr = sprintf("0x%04x",$addr_ );
-
- if ($type eq 'register' || $type eq 'registerfield'){
- #write register names bold
- $name_ = '\textbf{'.$name_.'}';
- }
- if ($type eq 'field'){
- $hexaddr = ''; # don't print addr it's already in the register
- }
-
- push(@{$data},{
- %$node,
- name => $name_,
- addr => $hexaddr,
- bits => $bits,
- addr_uint => $addr_
- });
- }
- }
-
- @$data = sort {
- # sort numerically by first number in the bits string
- my $aa=-1;
- my $bb=-1;
- if($a->{bits} =~ m/^(\d+)/){
- $aa=$1;
- }
- if($b->{bits} =~ m/^(\d+)/){
- $bb=$1;
- }
- return $aa <=> $bb;
- } @$data; # bit fields in ascending order
-
- @$data = sort { $a->{addr_uint} cmp $b->{addr_uint} } @$data; # addresses in ascending order
-
-
- # some more formatting
-
- my $last_addr;
- my $addr_counter=0;
- for my $item (@$data){
-
- # make hline at each new register
- my $cur_addr = $item->{addr_uint};
- if($last_addr){
- if($last_addr != $cur_addr){
- if($self->{opt}->{style} eq "hline"){
- $self->{table}->addData(plain_code => '\hline');
- }
- $addr_counter++;
- }
- }
-
-
-# if($item->{type} eq 'register' || $item->{type} eq 'registerfield'){
-# $self->{table}->addData(plain_code => '\rowcolor{lightgray}');
-# }
- if($self->{opt}->{style} eq "altgray"){
- if($addr_counter % 2){
- $self->{table}->addData(plain_code => '\rowcolor{light-gray}');
- }
- }
- $self->{table}->addData(%$item); # fill it with the sorted data
- $last_addr = $cur_addr;
- }
-
-}
-
-sub writeTexFile {
- my $self = shift;
- my $output = shift;
- my $standalone = shift;
-
-
- # unless specified by --output/-o, the print OUTPUT commands go to STDOUT
- if ($output) {
- open(OUTPUT, '>', $output) or die "could not open $output for writing!";
- } else {
- *OUTPUT = *STDOUT;
- }
-
- if ($standalone){
- print OUTPUT q%
- \documentclass[a4paper,11pt]{article}
- \usepackage[T1]{fontenc}
- \usepackage{lmodern}
- \usepackage{booktabs}
- \usepackage{longtable}
- \usepackage{geometry}
- \geometry{verbose,tmargin=3cm,bmargin=3cm,lmargin=3cm,rmargin=3cm}
- \usepackage[table]{xcolor}
-
- \definecolor{light-gray}{gray}{0.90}
- \begin{document}
- %;
- }
- print OUTPUT $self->{table}->generateString();
-
- print OUTPUT '\end{document}'."\n" if $standalone;
-# OUTPUT->close();
- close(OUTPUT);
-}
-
-sub pdflatex{
- my $self = shift;
- my $output = shift||$self->{group};
- my $here = qx("pwd");
- $here =~ s/\n//g;
- my $directory = "/dev/shm/xml-db2tex".rand();
- unless(-e $directory or mkdir $directory) {
- die "Unable to create $directory\n";
- }
- my $texfile = $self->{group}.".tex";
- my $pdffile = $self->{group}.".pdf";
-
- $output =~ s/\.(tex|pdf)//;
- $output.= ".pdf";
-
- chdir $directory;
- $self->writeTexFile($texfile, "standalone");
- system("pdflatex $texfile");
- system("pdflatex $texfile");
- copy("$directory/$pdffile","$here/$output");
- chdir $here;
- system("rm -rf $directory");
-
-}
-
-
-
-package xmlDbMethods;
-
-use Storable qw(lock_store lock_retrieve);
-use Data::Dumper;
-
-sub new {
- my $class = shift;
- my %options = @_;
- my $self = {
- entityFile => '/dev/null',
- %options
- };
- bless($self, $class);
- $self->{entity} = lock_retrieve($self->{entityFile});
- die "cannot open xml-db entity file ".$self->{entityFile}."\n" unless defined $self->{entity};
- return $self;
-}
-
-
-
-sub dumpItem { # for debug
- my $self = shift;
- my $item = shift;
- unless (defined($item)){
- print Dumper $self->{entity};
- } else {
- print Dumper $self->{entity}->{$item};
- }
-}
-
-
-sub unfoldTree {
- my $self = shift;
- my $name = shift;
- my $depth = shift||0;
- my $list = shift || [];
-
- my $node = $self->{entity}->{$name};
- unless($node->{type} eq 'group'){
- push(@{$list},$name);
- }
-
- if ($node->{type} eq 'group' || $node->{type} eq 'register' ){
- for my $child (@{$node->{'children'}}){
-# print $child."\n";
- $self->unfoldTree($child,$depth+1,$list);
- }
- }
-
- return $list;
-}
-
-1;
-
-package textabular;
-
-
-sub new {
- my $class = shift;
- my %options = @_;
- my $self = {
- dataKeys => [],
- header => [],
- data => [],
- caption => '',
- label => '',
- %options
- };
- bless($self, $class);
- return $self;
-}
-
-sub addData {
- my $self = shift;
- my %data = @_;
- push(@{$self->{data}}, \%data);
- return $self;
-}
-
-sub generateString {
- my $self = shift;
- my $str = '% remember to include the following latex packages:
-%\usepackage{booktabs}
-%\usepackage{longtable}
-%\usepackage[table]{xcolor}
-%\definecolor{light-gray}{gray}{0.90}
- '."\n";
-
- my $header;
-
- if ( @{$self->{header}} ){ # if no header list ...
- $header= " ".join(" & ",map { '\textbf{'.$_.'}' } @{$self->{header}}).' \\\\'."\n";
- } else { # print the keys instead
- $header= " ".join(" & ",map { '\textbf{'.$_.'}' } @{$self->{dataKeys}}).' \\\\'."\n";
- }
-
-
- $str .= '\begin{longtable}'."\n";
- $str .="{".($self->{format}||"")."}\n";
-
-
- # define first header
- $str.='\toprule'."\n";
- $str.= $header;
- $str.='\midrule'."\n";
- $str.='\midrule'."\n";
- $str.='\endfirsthead';
-
- # define (continued) header
- $str.='\multicolumn{'.@{$self->{dataKeys}}.'}{c}';
- $str.='{\tablename\ \thetable\ -- \textit{Continued from previous page}} \\\\';
- $str.='\toprule'."\n";
- $str.= $header;
- $str.='\midrule'."\n";
- $str.='\midrule'."\n";
- $str.='\endhead';
-
- $str.='\multicolumn{'.scalar(@{$self->{dataKeys}}).'}{r}{\textit{Continued on next page}} \\\\
- \endfoot
- \endlastfoot';
-
- for my $data (@{$self->{data}}){
-
- if ( $data->{plain_code} ) { #if there are strings in the data, just print them
- $str.=$data->{plain_code}."\n";
- } else {
-
- my @line;
- for my $dataKey (@{$self->{dataKeys}}){
- push(@line,$data->{$dataKey});
- }
- my $line = " ".join(" & ", @line) . ' \\\\'."\n";
- $line =~ s/_/\\_/g; # remove all stupid underscores
- $str.=$line;
-
- }
- }
- $str.='\bottomrule'."\n";
-# $str.='\hline'."\n";
-
- $str.='\caption{'.$self->{caption}.'}' if $self->{caption}."\n";
- $str.='\label{'.$self->{label}.'}' if $self->{label}."\n";
-
- $str.='\end{longtable}'."\n";
-
-# $str.='\end{table}'."\n";
- return $str;
-}
\ No newline at end of file
--- /dev/null
+../../../daqtools/xml-db/xml-db2tex.pl
\ No newline at end of file
jspc29 / mvd_docu.git / commitdiff