write correct 4k pulse to cts registers

diff --git a/scripts/start.sh b/scripts/start.sh
index 563ebc96f1919c376d262a7b9da13d76bde1a0d9..9a18702192f370b2856184232162665c9b64b865 100755 (executable)
--- a/scripts/start.sh
+++ b/scripts/start.sh
@@ -33,11 +33,16 @@ if [[ "$DAQOPSERVER" == "jspc29:150" ]]; then
     trbcmd w       0xc000 0xa146 0x000186a0   #1kHz pulser
     trbcmd loadbit 0xc000 0xa14f 0x000000f0 0x00000080  #trigger type 8
     trbcmd setbit  0xc000 0xa101 0x2  #trigger on
-elif [[ "$DAQOPSERVER" == "jspc29:31" ]]; then
+elif [[ "$DAQOPSERVER" == "jspc29:109" ]]; then
     #Probestation setup
-    trbcmd w       0xc100 0xa13b 0x000186a0   #1kHz pulser
+    trbcmd w       0xc100 0xa12b 0x000061a7   #1kHz pulser
     trbcmd loadbit 0xc100 0xa144 0x000000f0 0x00000080  #trigger type 8
     trbcmd setbit  0xc100 0xa101 0x2  #trigger on
+elif [[ "$DAQOPSERVER" == "jspc29:7" ]]; then
+    #Standalone setup
+    trbcmd w       0xc200 0xa13b 0x000186a0   #1kHz pulser
+    trbcmd loadbit 0xc200 0xa144 0x000000f0 0x00000080  #trigger type 8
+    trbcmd setbit  0xc200 0xa101 0x2  #trigger on
 else
     echo "problem.."
 fi

diff --git a/scripts/start_ci0.sh b/scripts/start_ci0.sh
index e3b2ae0581f728700556f81e9cf614350dedb92d..fb6f533b3b9c6d1cf0bf31d65b4c6c161604851a 100755 (executable)
--- a/scripts/start_ci0.sh
+++ b/scripts/start_ci0.sh
@@ -7,7 +7,7 @@ cd ../git/daqtools/xml-db
 cd -
 
 echo Load basic settings
-mimosis -c 0 -f 0xfe82 -a load -w ./conf/CONF_allregisters_norsclk.pl; sleep .1
+mimosis -c 0 -f 0xfe82 -a load -w ./conf/CONF_allregisters.pl; sleep .1
 mimosis -c 0 -f 0xfe82 -a load -w ./conf/CONF_testmode_enable.pl; sleep .1
 
 echo Bit and word align

diff --git a/trbnet/addresses.sh b/trbnet/addresses.sh
index c379d8b3bc112689cc25bfdfb69f2a7a1f8e2a73..134049269d86bbf38c3ca404bfa04d8fe0e843a6 100755 (executable)
--- a/trbnet/addresses.sh
+++ b/trbnet/addresses.sh
@@ -13,7 +13,8 @@
     trbcmd s  0x0000e34f001f2941 0x01 0xc200
 #elif [[ "$DAQOPSERVER" == "jspc29:31" ]]; then
     #Probestation setup
-    trbcmd s  0x6c00000a62958028  0x01 0xc100
+    trbcmd s 0x0000702c00202941 0x01 0xc100
+    # trbcmd s  0x6c00000a62958028  0x01 0xc100
     trbcmd s  0x0000509f00202941  0x01 0xa100
 #fi
 

diff --git a/trbnet/register_configgbe.db b/trbnet/register_configgbe.db
index 9ed4f72b282a7b5b5326c32a290cab9c6bae0434..76f613fd34327d5aba0d979a382bfbdafc5eebfb 100644 (file)
--- a/trbnet/register_configgbe.db
+++ b/trbnet/register_configgbe.db
@@ -22,7 +22,7 @@
 
   
 
-#Set bits for standalone GbE
+#Set bits for endpoint with GbE
 #                    SubEvtDec     QueDec     FrameSize   RX enable    SubEvtSize   Evt/Queue    QueueClose  MaxQueueSize
 # Hub    #  Type  #     C0     #     C1     #     C2    #     C3     #     C4     #     C5     #     C6     #     C7     #
 ##########################################################################################################################

diff --git a/trbnet/start.sh b/trbnet/start.sh
index c453763179deff67382561b120346c7d341d61e8..7eceffda417d76d1c868eb1e6960ca06ef9c7146 100755 (executable)
--- a/trbnet/start.sh
+++ b/trbnet/start.sh
@@ -29,6 +29,8 @@ trbcmd setbit 0xfe82 0xa100 0x100   #Word alignment off
 trbcmd w 0xfe82 0xde00 30 #I2C speed
 trbcmd w 0xfe82 0xde05 0x100  #Mimosis reset
 
+trbcmd w 0xfe82 0x22 0x20000000
+
 echo "done"
 
 trbcmd i 0xffff