use work.trb_net_components.all;
use work.trb_net16_hub_func.all;
+use ieee.math_real.all;
+
use work.trb_net_gbe_components.all;
use work.trb_net_gbe_protocols.all;
signal constructed_events : std_logic_vector(15 downto 0) := x"0000";
signal increment_flag : std_logic;
signal local_trigger : std_logic;
- signal evt_ctr : std_logic_vector(31 downto 0);
+ signal evt_ctr : std_logic_vector(31 downto 0);
+ signal rand_size : std_logic_vector(11 downto 0);
begin
-
FEE_STATUS_BITS_OUT <= x"11223344";
-
+
send_word_pause <= 1;
fixed_size_gen : if FIXED_SIZE_MODE = 1 generate
end generate fixed_size_gen;
random_size_gen : if FIXED_SIZE_MODE = 0 and INCREMENTAL_MODE = 0 generate
- size_rand_inst : random_size
- port map(Clk => clk,
- Enb => size_rand_en,
- Rst => rst,
- Dout => s
- );
+ impl_gen : if DO_SIMULATION = 0 generate
+ size_rand_inst : random_size
+ port map(Clk => clk,
+ Enb => size_rand_en,
+ Rst => rst,
+ Dout => s
+ );
+
+ process(clk)
+ begin
+ if rising_edge(clk) then
+ if (current_state = TIMEOUT and ctr = timeout_stop) then
+ size_rand_en <= '1';
+ else
+ size_rand_en <= '0';
+ end if;
+ end if;
+ end process;
- test_data_len <= (x"00" & "00" & s(4 downto 0)) + x"0001";
+ process(clk)
+ begin
+ if rising_edge(clk) then
+ if (current_state = IDLE) then
+ test_data_len <= (x"00" & "00" & s(4 downto 0)) + x"0001";
+ else
+ test_data_len <= test_data_len;
+ end if;
+ end if;
+ end process;
+ end generate impl_gen;
+
+ sim_gen : if DO_SIMULATION = 1 generate
+ process(clk)
+ variable seed1, seed2 : positive;
+ variable rand : real;
+ variable int_rand : integer;
+ variable stim : std_logic_vector(11 downto 0);
+ begin
+ if rising_edge(CLK) then
+ uniform(seed1, seed2, rand);
+ int_rand := integer(trunc(rand * 4096.0));
+ stim := std_logic_vector(to_unsigned(int_rand, stim'length));
+
+ rand_size <= stim;
+ end if;
+ end process;
- process(clk)
- begin
- if rising_edge(clk) then
- if (current_state = TIMEOUT and ctr = timeout_stop) then
- size_rand_en <= '1';
- else
- size_rand_en <= '0';
+ process(clk)
+ begin
+ if rising_edge(clk) then
+ if (current_state = IDLE) then
+ test_data_len <= "000000" & rand_size(9 downto 0) + x"1";
+ else
+ test_data_len <= test_data_len;
+ end if;
end if;
- end if;
- end process;
+ end process;
+ end generate sim_gen;
end generate random_size_gen;
if (to_integer(unsigned(data_ctr)) = (2 * (to_integer(unsigned(test_data_len)) - 1)) and FEE_READ_IN = '1') then
next_state <= WAIT_A_SEC_7;
else
- next_state <= SEND_ONE_WORD; --LOOP_OVER_DATA;
+ next_state <= SEND_ONE_WORD; --LOOP_OVER_DATA;
end if;
when SEND_ONE_WORD =>
elsif (current_state = CTS_START and ctr = 1) then
cts_start_readout <= '1';
elsif (current_state = CLOSE) then
- cts_start_readout <= '0';
+ cts_start_readout <= '1';
else
cts_start_readout <= cts_start_readout;
end if;
fee_dready <= '1';
elsif (current_state = WAIT_FOR_READ_6) then
fee_dready <= '1';
--- elsif (current_state = LOOP_OVER_DATA) then
--- fee_dready <= '1';
+ -- elsif (current_state = LOOP_OVER_DATA) then
+ -- fee_dready <= '1';
elsif (current_state = SEND_ONE_WORD) then -- and ctr = send_word_pause) then
fee_dready <= '1';
else
end entity gbe_ipu_multiplexer;
architecture RTL of gbe_ipu_multiplexer is
- signal client_ptr : integer range 0 to NUMBER_OF_GBE_LINKS - 1 := 0;
- signal cts_readout, cts_readout_q : std_logic;
+ signal client_ptr : integer range 0 to NUMBER_OF_GBE_LINKS - 1 := 0;
+ signal cts_readout, cts_readout_q, cts_readout_qq, cts_readout_qqq, cts_readout_qqqq, cts_readout_qqqqq, cts_readout_qqqqqq : std_logic;
+ signal switch_ptr, switch_ptr_q, switch_ptr_qq, switch_ptr_qqq : std_logic_vector(1 downto 0) := "00";
begin
process(CLK_SYS_IN)
else
client_ptr <= 3;
end if;
+
+ switch_ptr <= "00";
else
- cts_readout <= MLT_CTS_READOUT_FINISHED_IN(client_ptr); -- CTS_START_READOUT_IN; -- very hot damn fix
+
+-- client_ptr <= 3;
+
+
+ cts_readout <= CTS_START_READOUT_IN; --MLT_CTS_READOUT_FINISHED_IN(client_ptr); --CTS_START_READOUT_IN;
cts_readout_q <= cts_readout;
+ cts_readout_qq <= not cts_readout and cts_readout_q;
+ cts_readout_qqq <= cts_readout_qq;
+ cts_readout_qqqq <= cts_readout_qqq;
+ cts_readout_qqqqq <= cts_readout_qqqq;
+ cts_readout_qqqqqq <= cts_readout_qqqqq;
+
+-- if (switch_ptr = "11") then
+-- switch_ptr <= "00";
+-- else
+-- if (cts_readout = '0' and cts_readout_q = '1') then
+-- switch_ptr(0) <= '1';
+-- else
+-- switch_ptr(0) <= switch_ptr(0);
+-- end if;
+--
+-- switch_ptr(1) <= MLT_CTS_READOUT_FINISHED_IN(client_ptr);
+-- end if;
+-- switch_ptr_q <= switch_ptr;
+-- switch_ptr_qq <= switch_ptr_q;
+-- switch_ptr_qqq <= switch_ptr_qq;
if (cts_readout = '0' and cts_readout_q = '1') then
+ --if (switch_ptr_qqq = "11") then
+ --if (cts_readout_qqqqqq = '1') then
client_ptr <= client_ptr;
case client_ptr is
when 0 =>
MLT_FEE_STATUS_BITS_OUT(32 * (client_ptr + 1) - 1 downto 32 * client_ptr) <= (others => '0');
MLT_FEE_BUSY_OUT(client_ptr) <= '0';
else
+-- MLT_CTS_NUMBER_OUT <= (others => '0');
+-- MLT_CTS_CODE_OUT <= (others => '0');
+-- MLT_CTS_INFORMATION_OUT <= (others => '0');
+-- MLT_CTS_READOUT_TYPE_OUT <= (others => '0');
+-- MLT_CTS_START_READOUT_OUT <= (others => '0');
+-- MLT_CTS_READ_OUT <= (others => '0');
+-- MLT_FEE_DATA_OUT <= (others => '0');
+-- MLT_FEE_DATAREADY_OUT <= (others => '0');
+-- MLT_FEE_STATUS_BITS_OUT <= (others => '0');
+-- MLT_FEE_BUSY_OUT <= (others => '0');
+
MLT_CTS_NUMBER_OUT(16 * (client_ptr + 1) - 1 downto 16 * client_ptr) <= CTS_NUMBER_IN;
MLT_CTS_CODE_OUT(8 * (client_ptr + 1) - 1 downto 8 * client_ptr) <= CTS_CODE_IN;
MLT_CTS_INFORMATION_OUT(8 * (client_ptr + 1) - 1 downto 8 * client_ptr) <= CTS_INFORMATION_IN;
INCLUDE_DEBUG : integer range 0 to 1;
USE_INTERNAL_TRBNET_DUMMY : integer range 0 to 1;
RX_PATH_ENABLE : integer range 0 to 1;
-
INCLUDE_READOUT : std_logic := '0';
INCLUDE_SLOWCTRL : std_logic := '0';
INCLUDE_DHCP : std_logic := '0';
INCLUDE_ARP : std_logic := '0';
INCLUDE_PING : std_logic := '0';
-
FRAME_BUFFER_SIZE : integer range 1 to 4 := 1;
READOUT_BUFFER_SIZE : integer range 1 to 4 := 1;
SLOWCTRL_BUFFER_SIZE : integer range 1 to 4 := 1;
-
FIXED_SIZE_MODE : integer range 0 to 1 := 1;
INCREMENTAL_MODE : integer range 0 to 1 := 0;
FIXED_SIZE : integer range 0 to 65535 := 10;
CLK_RX_125_IN : in std_logic;
RESET : in std_logic;
GSR_N : in std_logic;
-
--- MY_MAC_OUT : out std_logic_vector(47 downto 0);
MY_MAC_IN : in std_logic_vector(47 downto 0);
DHCP_DONE_OUT : out std_logic;
MAC_READY_CONF_IN : in std_logic;
MAC_RECONF_OUT : out std_logic;
MAC_AN_READY_IN : in std_logic;
-
MAC_FIFOAVAIL_OUT : out std_logic;
MAC_FIFOEOF_OUT : out std_logic;
MAC_FIFOEMPTY_OUT : out std_logic;
MAC_RX_FIFOFULL_OUT : out std_logic;
-
MAC_TX_DATA_OUT : out std_logic_vector(7 downto 0);
MAC_TX_READ_IN : in std_logic;
MAC_TX_DISCRFRM_IN : in std_logic;
MAC_TX_STAT_EN_IN : in std_logic;
MAC_TX_STATS_IN : in std_logic_vector(30 downto 0);
MAC_TX_DONE_IN : in std_logic;
-
MAC_RX_FIFO_ERR_IN : in std_logic;
MAC_RX_STATS_IN : in std_logic_vector(31 downto 0);
MAC_RX_DATA_IN : in std_logic_vector(7 downto 0);
FEE_STATUS_BITS_IN : in std_logic_vector(31 downto 0);
FEE_BUSY_IN : in std_logic;
-- SlowControl
--- MC_UNIQUE_ID_IN : in std_logic_vector(63 downto 0);
GSC_CLK_IN : in std_logic;
GSC_INIT_DATAREADY_OUT : out std_logic;
GSC_INIT_DATA_OUT : out std_logic_vector(15 downto 0);
CFG_MAX_SINGLE_SUB_IN : in std_logic_vector(15 downto 0);
CFG_ADDITIONAL_HDR_IN : in std_logic;
CFG_MAX_REPLY_SIZE_IN : in std_logic_vector(31 downto 0);
-
+ CFG_AUTO_THROTTLE_IN : in std_logic;
+ CFG_THROTTLE_PAUSE_IN : in std_logic_vector(15 downto 0);
MONITOR_RX_BYTES_OUT : out std_logic_vector(31 downto 0);
MONITOR_RX_FRAMES_OUT : out std_logic_vector(31 downto 0);
MONITOR_TX_BYTES_OUT : out std_logic_vector(31 downto 0);
MONITOR_TX_PACKETS_OUT : out std_logic_vector(31 downto 0);
MONITOR_DROPPED_OUT : out std_logic_vector(31 downto 0);
MONITOR_GEN_DBG_OUT : out std_logic_vector(2 * c_MAX_PROTOCOLS * 32 - 1 downto 0);
-
MAKE_RESET_OUT : out std_logic
);
end entity gbe_logic_wrapper;
signal dbg_ft : std_logic_vector(63 downto 0);
signal dbg_q : std_logic_vector(15 downto 0);
signal make_reset : std_logic;
- signal my_mac : std_logic_vector(47 downto 0);
begin
reset_sync : process(GSR_N, CLK_SYS_IN)
fc_tos <= x"10";
fc_ttl <= x"ff";
--- MY_MAC_OUT <= my_mac;
DHCP_DONE_OUT <= dhcp_done;
main_gen : if USE_INTERNAL_TRBNET_DUMMY = 0 generate
MC_RESET_LINK_IN => global_reset,
MC_IDLE_TOO_LONG_OUT => open,
MC_DHCP_DONE_OUT => dhcp_done,
--- MC_MY_MAC_OUT => my_mac,
MC_MY_MAC_IN => MY_MAC_IN,
-- signals to/from receive controller
PCS_AN_COMPLETE_IN => MAC_AN_READY_IN,
-- signals to/from hub
--- MC_UNIQUE_ID_IN => MC_UNIQUE_ID_IN,
GSC_CLK_IN => GSC_CLK_IN,
GSC_INIT_DATAREADY_OUT => GSC_INIT_DATAREADY_OUT,
GSC_INIT_DATA_OUT => GSC_INIT_DATA_OUT,
CFG_MAX_SINGLE_SUB_IN => CFG_MAX_SINGLE_SUB_IN,
CFG_ADDITIONAL_HDR_IN => CFG_ADDITIONAL_HDR_IN,
CFG_MAX_REPLY_SIZE_IN => CFG_MAX_REPLY_SIZE_IN,
+ CFG_AUTO_THROTTLE_IN => CFG_AUTO_THROTTLE_IN,
+ CFG_THROTTLE_PAUSE_IN => CFG_THROTTLE_PAUSE_IN,
TSM_HADDR_OUT => open, --mac_haddr,
TSM_HDATA_OUT => open, --mac_hdataout,
TSM_HCS_N_OUT => open, --mac_hcs,
MC_RESET_LINK_IN => global_reset,
MC_IDLE_TOO_LONG_OUT => open,
MC_DHCP_DONE_OUT => dhcp_done,
--- MC_MY_MAC_OUT => my_mac,
MC_MY_MAC_IN => MY_MAC_IN,
-- signals to/from receive controller
PCS_AN_COMPLETE_IN => MAC_AN_READY_IN,
-- signals to/from hub
--- MC_UNIQUE_ID_IN => MC_UNIQUE_ID_IN,
GSC_CLK_IN => GSC_CLK_IN,
GSC_INIT_DATAREADY_OUT => GSC_INIT_DATAREADY_OUT,
GSC_INIT_DATA_OUT => GSC_INIT_DATA_OUT,
CFG_ADDITIONAL_HDR_IN => '0',
CFG_MAX_REPLY_SIZE_IN => x"0000_fa00",
+ CFG_AUTO_THROTTLE_IN => CFG_AUTO_THROTTLE_IN,
+ CFG_THROTTLE_PAUSE_IN => CFG_THROTTLE_PAUSE_IN,
-- signal to/from Host interface of TriSpeed MAC
TSM_HADDR_OUT => open, --mac_haddr,
generic(
DO_SIMULATION : integer range 0 to 1 := 0;
INCLUDE_DEBUG : integer range 0 to 1 := 0;
-
USE_INTERNAL_TRBNET_DUMMY : integer range 0 to 1 := 0;
USE_EXTERNAL_TRBNET_DUMMY : integer range 0 to 1 := 0;
RX_PATH_ENABLE : integer range 0 to 1 := 1;
-
FIXED_SIZE_MODE : integer range 0 to 1 := 1;
INCREMENTAL_MODE : integer range 0 to 1 := 0;
FIXED_SIZE : integer range 0 to 65535 := 10;
UP_DOWN_MODE : integer range 0 to 1 := 0;
UP_DOWN_LIMIT : integer range 0 to 16777215 := 0;
FIXED_DELAY : integer range 0 to 16777215 := 16777215;
-
NUMBER_OF_GBE_LINKS : integer range 1 to 4 := 4;
LINKS_ACTIVE : std_logic_vector(3 downto 0) := "1111";
LINK_HAS_PING : std_logic_vector(3 downto 0) := "1111";
LINK_HAS_ARP : std_logic_vector(3 downto 0) := "1111";
LINK_HAS_DHCP : std_logic_vector(3 downto 0) := "1111";
- LINK_HAS_READOUT : std_logic_vector(3 downto 0) := "1111"; -- only one can be active
- LINK_HAS_SLOWCTRL : std_logic_vector(3 downto 0) := "1111";
-
- NUMBER_OF_OUTPUT_LINKS : integer range 0 to 4 := 0
+ LINK_HAS_READOUT : std_logic_vector(3 downto 0) := "1111";
+ LINK_HAS_SLOWCTRL : std_logic_vector(3 downto 0) := "1111"
);
port(
CLK_SYS_IN : in std_logic;
CLK_125_IN : in std_logic;
RESET : in std_logic;
GSR_N : in std_logic;
-
SD_PRSNT_N_IN : in std_logic_vector(NUMBER_OF_GBE_LINKS - 1 downto 0);
SD_LOS_IN : in std_logic_vector(NUMBER_OF_GBE_LINKS - 1 downto 0); -- SFP Loss Of Signal ('0' = OK, '1' = no signal)
SD_TXDIS_OUT : out std_logic_vector(NUMBER_OF_GBE_LINKS - 1 downto 0); -- SFP disable
GSC_REPLY_PACKET_NUM_IN : in std_logic_vector(2 downto 0);
GSC_REPLY_READ_OUT : out std_logic;
GSC_BUSY_IN : in std_logic;
- -- IP configuration
- BUS_IP_RX : in CTRLBUS_RX;
- BUS_IP_TX : out CTRLBUS_TX;
- -- Registers config
- BUS_REG_RX : in CTRLBUS_RX;
- BUS_REG_TX : out CTRLBUS_TX;
-
+ -- IP configuration
+ BUS_IP_RX : in CTRLBUS_RX;
+ BUS_IP_TX : out CTRLBUS_TX;
+ -- Registers config
+ BUS_REG_RX : in CTRLBUS_RX;
+ BUS_REG_TX : out CTRLBUS_TX;
MAKE_RESET_OUT : out std_logic;
-
DEBUG_OUT : out std_logic_vector(127 downto 0)
);
end entity gbe_wrapper;
signal dbg_hist, dbg_hist2 : hist_array;
signal mac_0, mac_1, mac_2, mac_3 : std_logic_vector(47 downto 0);
- signal cfg_max_reply : std_logic_vector(31 downto 0);
+ signal cfg_max_reply : std_logic_vector(31 downto 0);
signal mlt_cts_number : std_logic_vector(16 * NUMBER_OF_GBE_LINKS - 1 downto 0);
signal mlt_cts_code : std_logic_vector(8 * NUMBER_OF_GBE_LINKS - 1 downto 0);
signal monitor_rx_frames, monitor_rx_bytes, monitor_tx_frames, monitor_tx_bytes, monitor_tx_packets, monitor_dropped : std_logic_vector(4 * 32 - 1 downto 0);
signal sum_rx_frames, sum_rx_bytes, sum_tx_frames, sum_tx_bytes, sum_tx_packets, sum_dropped : std_logic_vector(31 downto 0);
- signal busip0, busip1, busip2, busip3 : CTRLBUS_TX;
-
- signal dummy_event : std_logic_vector(15 downto 0);
- signal dummy_mode : std_logic;
+ signal busip0, busip1, busip2, busip3 : CTRLBUS_TX;
+ signal SD_RXD_P_IN, SD_RXD_N_IN, SD_TXD_P_OUT, SD_TXD_N_OUT : std_logic_vector(NUMBER_OF_GBE_LINKS - 1 downto 0);
+ --attribute nopad : string;
+ --attribute nopad of SD_RXD_P_IN, SD_RXD_N_IN, SD_TXD_P_OUT, SD_TXD_N_OUT : signal is "true";
+
+ signal dummy_event : std_logic_vector(15 downto 0);
+ signal dummy_mode : std_logic;
signal make_reset0, make_reset1, make_reset2, make_reset3 : std_logic := '0';
- signal monitor_gen_dbg : std_logic_vector(c_MAX_PROTOCOLS * 64 - 1 downto 0);
+ signal monitor_gen_dbg : std_logic_vector(c_MAX_PROTOCOLS * 64 - 1 downto 0);
+
+ signal cfg_autothrottle : std_logic;
+ signal cfg_throttle_pause : std_logic_vector(15 downto 0);
- signal SD_RXD_P_IN,SD_RXD_N_IN,SD_TXD_P_OUT,SD_TXD_N_OUT : std_logic_vector(NUMBER_OF_GBE_LINKS - 1 downto 0);
- attribute nopad : string;
- attribute nopad of SD_RXD_P_IN,SD_RXD_N_IN,SD_TXD_P_OUT,SD_TXD_N_OUT : signal is "true";
-
begin
-
mac_impl_gen : if DO_SIMULATION = 0 generate
- mac_0 <= MC_UNIQUE_ID_IN(15 downto 8) & MC_UNIQUE_ID_IN(23 downto 16) & MC_UNIQUE_ID_IN(31 downto 24) & x"0" & MC_UNIQUE_ID_IN(35 downto 32) & x"7ada";
- mac_1 <= MC_UNIQUE_ID_IN(15 downto 8) & MC_UNIQUE_ID_IN(23 downto 16) & MC_UNIQUE_ID_IN(31 downto 24) & x"1" & MC_UNIQUE_ID_IN(35 downto 32) & x"7ada";
- mac_2 <= MC_UNIQUE_ID_IN(15 downto 8) & MC_UNIQUE_ID_IN(23 downto 16) & MC_UNIQUE_ID_IN(31 downto 24) & x"2" & MC_UNIQUE_ID_IN(35 downto 32) & x"7ada";
- mac_3 <= MC_UNIQUE_ID_IN(15 downto 8) & MC_UNIQUE_ID_IN(23 downto 16) & MC_UNIQUE_ID_IN(31 downto 24) & x"3" & MC_UNIQUE_ID_IN(35 downto 32) & x"7ada";
+ mac_0 <= MC_UNIQUE_ID_IN(15 downto 8) & MC_UNIQUE_ID_IN(23 downto 16) & MC_UNIQUE_ID_IN(31 downto 24) & x"0" & MC_UNIQUE_ID_IN(35 downto 32) & x"7ada";
+ mac_1 <= MC_UNIQUE_ID_IN(15 downto 8) & MC_UNIQUE_ID_IN(23 downto 16) & MC_UNIQUE_ID_IN(31 downto 24) & x"1" & MC_UNIQUE_ID_IN(35 downto 32) & x"7ada";
+ mac_2 <= MC_UNIQUE_ID_IN(15 downto 8) & MC_UNIQUE_ID_IN(23 downto 16) & MC_UNIQUE_ID_IN(31 downto 24) & x"2" & MC_UNIQUE_ID_IN(35 downto 32) & x"7ada";
+ mac_3 <= MC_UNIQUE_ID_IN(15 downto 8) & MC_UNIQUE_ID_IN(23 downto 16) & MC_UNIQUE_ID_IN(31 downto 24) & x"3" & MC_UNIQUE_ID_IN(35 downto 32) & x"7ada";
end generate mac_impl_gen;
-
+
mac_sim_gen : if DO_SIMULATION = 1 generate
mac_0 <= x"ffffffffffff";
mac_1 <= x"ffffffffffff";
end generate mac_sim_gen;
all_links_ready <= '1' when dhcp_done = x"f" else '0';
-
+
MAKE_RESET_OUT <= '1' when make_reset3 = '1' or make_reset2 = '1' or make_reset1 = '1' or make_reset0 = '1' else '0';
physical_impl_gen : if DO_SIMULATION = 0 generate
CLK_RX_125_IN => clk_125_rx_from_pcs(3),
RESET => RESET,
GSR_N => GSR_N,
--- MY_MAC_OUT => open,
MY_MAC_IN => mac_3,
DHCP_DONE_OUT => dhcp_done(3),
MAC_READY_CONF_IN => mac_ready_conf(3),
FEE_READ_OUT => mlt_fee_read(3),
FEE_STATUS_BITS_IN => mlt_fee_status(4 * 32 - 1 downto 3 * 32),
FEE_BUSY_IN => mlt_fee_busy(3),
--- MC_UNIQUE_ID_IN => MC_UNIQUE_ID_IN,
GSC_CLK_IN => mlt_gsc_clk(3),
GSC_INIT_DATAREADY_OUT => mlt_gsc_init_dataready(3),
GSC_INIT_DATA_OUT => mlt_gsc_init_data(4 * 16 - 1 downto 3 * 16),
CFG_MAX_SINGLE_SUB_IN => cfg_max_single_sub,
CFG_ADDITIONAL_HDR_IN => cfg_additional_hdr,
CFG_MAX_REPLY_SIZE_IN => cfg_max_reply,
+ CFG_AUTO_THROTTLE_IN => cfg_autothrottle,
+ CFG_THROTTLE_PAUSE_IN => cfg_throttle_pause,
MONITOR_RX_FRAMES_OUT => monitor_rx_frames(4 * 32 - 1 downto 3 * 32),
MONITOR_RX_BYTES_OUT => monitor_rx_bytes(4 * 32 - 1 downto 3 * 32),
MONITOR_TX_FRAMES_OUT => monitor_tx_frames(4 * 32 - 1 downto 3 * 32),
MONITOR_TX_BYTES_OUT => monitor_tx_bytes(4 * 32 - 1 downto 3 * 32),
MONITOR_TX_PACKETS_OUT => monitor_tx_packets(4 * 32 - 1 downto 3 * 32),
MONITOR_DROPPED_OUT => monitor_dropped(4 * 32 - 1 downto 3 * 32),
- MONITOR_GEN_DBG_OUT => monitor_gen_dbg,
+ MONITOR_GEN_DBG_OUT => monitor_gen_dbg,
MAKE_RESET_OUT => make_reset3
);
end generate GEN_LINK_3;
-
+
NO_LINK3_GEN : if (LINKS_ACTIVE(3) = '0') generate
- make_reset3 <= '0';
+ make_reset3 <= '0';
busip3.data <= (others => '0');
busip3.ack <= '0';
busip3.nack <= '0';
- end generate NO_LINK3_GEN;
+ end generate NO_LINK3_GEN;
-- sfp7
GEN_LINK_2 : if (LINKS_ACTIVE(2) = '1') generate
CLK_RX_125_IN => clk_125_rx_from_pcs(2),
RESET => RESET,
GSR_N => GSR_N,
--- MY_MAC_OUT => open,
MY_MAC_IN => mac_2,
DHCP_DONE_OUT => dhcp_done(2),
MAC_READY_CONF_IN => mac_ready_conf(2),
FEE_READ_OUT => mlt_fee_read(2),
FEE_STATUS_BITS_IN => mlt_fee_status(3 * 32 - 1 downto 2 * 32),
FEE_BUSY_IN => mlt_fee_busy(2),
--- MC_UNIQUE_ID_IN => MC_UNIQUE_ID_IN,
GSC_CLK_IN => mlt_gsc_clk(2),
GSC_INIT_DATAREADY_OUT => mlt_gsc_init_dataready(2),
GSC_INIT_DATA_OUT => mlt_gsc_init_data(3 * 16 - 1 downto 2 * 16),
GSC_REPLY_PACKET_NUM_IN => mlt_gsc_reply_packet(3 * 3 - 1 downto 2 * 3),
GSC_REPLY_READ_OUT => mlt_gsc_reply_read(2),
GSC_BUSY_IN => mlt_gsc_busy(2),
- SLV_ADDR_IN => BUS_IP_RX.addr(7 downto 0),
- SLV_READ_IN => BUS_IP_RX.read,
- SLV_WRITE_IN => BUS_IP_RX.write,
- SLV_BUSY_OUT => busip2.nack,
- SLV_ACK_OUT => busip2.ack,
- SLV_DATA_IN => BUS_IP_RX.data,
- SLV_DATA_OUT => busip2.data,
+ SLV_ADDR_IN => BUS_IP_RX.addr(7 downto 0),
+ SLV_READ_IN => BUS_IP_RX.read,
+ SLV_WRITE_IN => BUS_IP_RX.write,
+ SLV_BUSY_OUT => busip2.nack,
+ SLV_ACK_OUT => busip2.ack,
+ SLV_DATA_IN => BUS_IP_RX.data,
+ SLV_DATA_OUT => busip2.data,
CFG_GBE_ENABLE_IN => cfg_gbe_enable,
CFG_IPU_ENABLE_IN => cfg_ipu_enable,
CFG_MULT_ENABLE_IN => cfg_mult_enable,
CFG_MAX_SINGLE_SUB_IN => cfg_max_single_sub,
CFG_ADDITIONAL_HDR_IN => cfg_additional_hdr,
CFG_MAX_REPLY_SIZE_IN => cfg_max_reply,
+ CFG_AUTO_THROTTLE_IN => cfg_autothrottle,
+ CFG_THROTTLE_PAUSE_IN => cfg_throttle_pause,
MONITOR_RX_FRAMES_OUT => monitor_rx_frames(3 * 32 - 1 downto 2 * 32),
MONITOR_RX_BYTES_OUT => monitor_rx_bytes(3 * 32 - 1 downto 2 * 32),
MONITOR_TX_FRAMES_OUT => monitor_tx_frames(3 * 32 - 1 downto 2 * 32),
MONITOR_TX_BYTES_OUT => monitor_tx_bytes(3 * 32 - 1 downto 2 * 32),
MONITOR_TX_PACKETS_OUT => monitor_tx_packets(3 * 32 - 1 downto 2 * 32),
MONITOR_DROPPED_OUT => monitor_dropped(3 * 32 - 1 downto 2 * 32),
- MONITOR_GEN_DBG_OUT => open,
+ MONITOR_GEN_DBG_OUT => open,
MAKE_RESET_OUT => make_reset2
);
end generate GEN_LINK_2;
-
+
NO_LINK2_GEN : if (LINKS_ACTIVE(2) = '0') generate
- make_reset2 <= '0';
- busip2.data <= (others => '0');
- busip2.ack <= '0';
- busip2.nack <= '0';
- end generate NO_LINK2_GEN;
+ make_reset2 <= '0';
+ busip2.data <= (others => '0');
+ busip2.ack <= '0';
+ busip2.nack <= '0';
+ end generate NO_LINK2_GEN;
-- sfp6
GEN_LINK_1 : if (LINKS_ACTIVE(1) = '1') generate
CLK_RX_125_IN => clk_125_rx_from_pcs(1),
RESET => RESET,
GSR_N => GSR_N,
--- MY_MAC_OUT => open,
MY_MAC_IN => mac_1,
DHCP_DONE_OUT => dhcp_done(1),
MAC_READY_CONF_IN => mac_ready_conf(1),
FEE_READ_OUT => mlt_fee_read(1),
FEE_STATUS_BITS_IN => mlt_fee_status(2 * 32 - 1 downto 1 * 32),
FEE_BUSY_IN => mlt_fee_busy(1),
--- MC_UNIQUE_ID_IN => MC_UNIQUE_ID_IN,
GSC_CLK_IN => mlt_gsc_clk(1),
GSC_INIT_DATAREADY_OUT => mlt_gsc_init_dataready(1),
GSC_INIT_DATA_OUT => mlt_gsc_init_data(2 * 16 - 1 downto 1 * 16),
GSC_REPLY_PACKET_NUM_IN => mlt_gsc_reply_packet(2 * 3 - 1 downto 1 * 3),
GSC_REPLY_READ_OUT => mlt_gsc_reply_read(1),
GSC_BUSY_IN => mlt_gsc_busy(1),
- SLV_ADDR_IN => BUS_IP_RX.addr(7 downto 0),
- SLV_READ_IN => BUS_IP_RX.read,
- SLV_WRITE_IN => BUS_IP_RX.write,
- SLV_BUSY_OUT => busip1.nack,
- SLV_ACK_OUT => busip1.ack,
- SLV_DATA_IN => BUS_IP_RX.data,
- SLV_DATA_OUT => busip1.data,
+ SLV_ADDR_IN => BUS_IP_RX.addr(7 downto 0),
+ SLV_READ_IN => BUS_IP_RX.read,
+ SLV_WRITE_IN => BUS_IP_RX.write,
+ SLV_BUSY_OUT => busip1.nack,
+ SLV_ACK_OUT => busip1.ack,
+ SLV_DATA_IN => BUS_IP_RX.data,
+ SLV_DATA_OUT => busip1.data,
CFG_GBE_ENABLE_IN => cfg_gbe_enable,
CFG_IPU_ENABLE_IN => cfg_ipu_enable,
CFG_MULT_ENABLE_IN => cfg_mult_enable,
CFG_MAX_SINGLE_SUB_IN => cfg_max_single_sub,
CFG_ADDITIONAL_HDR_IN => cfg_additional_hdr,
CFG_MAX_REPLY_SIZE_IN => cfg_max_reply,
+ CFG_AUTO_THROTTLE_IN => cfg_autothrottle,
+ CFG_THROTTLE_PAUSE_IN => cfg_throttle_pause,
MONITOR_RX_FRAMES_OUT => monitor_rx_frames(2 * 32 - 1 downto 1 * 32),
MONITOR_RX_BYTES_OUT => monitor_rx_bytes(2 * 32 - 1 downto 1 * 32),
MONITOR_TX_FRAMES_OUT => monitor_tx_frames(2 * 32 - 1 downto 1 * 32),
MONITOR_TX_BYTES_OUT => monitor_tx_bytes(2 * 32 - 1 downto 1 * 32),
MONITOR_TX_PACKETS_OUT => monitor_tx_packets(2 * 32 - 1 downto 1 * 32),
MONITOR_DROPPED_OUT => monitor_dropped(2 * 32 - 1 downto 1 * 32),
- MONITOR_GEN_DBG_OUT => open,
+ MONITOR_GEN_DBG_OUT => open,
MAKE_RESET_OUT => make_reset1
);
end generate GEN_LINK_1;
-
+
NO_LINK1_GEN : if (LINKS_ACTIVE(1) = '0') generate
- make_reset1 <= '0';
- busip1.data <= (others => '0');
- busip1.ack <= '0';
- busip1.nack <= '0';
- end generate NO_LINK1_GEN;
+ make_reset1 <= '0';
+ busip1.data <= (others => '0');
+ busip1.ack <= '0';
+ busip1.nack <= '0';
+ end generate NO_LINK1_GEN;
-- sfp5
GEN_LINK_0 : if (LINKS_ACTIVE(0) = '1') generate
CLK_RX_125_IN => clk_125_rx_from_pcs(0),
RESET => RESET,
GSR_N => GSR_N,
--- MY_MAC_OUT => open,
MY_MAC_IN => mac_0,
DHCP_DONE_OUT => dhcp_done(0),
MAC_READY_CONF_IN => mac_ready_conf(0),
FEE_READ_OUT => mlt_fee_read(0),
FEE_STATUS_BITS_IN => mlt_fee_status(1 * 32 - 1 downto 0 * 32),
FEE_BUSY_IN => mlt_fee_busy(0),
--- MC_UNIQUE_ID_IN => MC_UNIQUE_ID_IN,
GSC_CLK_IN => mlt_gsc_clk(0),
GSC_INIT_DATAREADY_OUT => mlt_gsc_init_dataready(0),
GSC_INIT_DATA_OUT => mlt_gsc_init_data(1 * 16 - 1 downto 0 * 16),
GSC_INIT_READ_IN => mlt_gsc_init_read(0),
GSC_REPLY_DATAREADY_IN => mlt_gsc_reply_dataready(0),
GSC_REPLY_DATA_IN => mlt_gsc_reply_data(1 * 16 - 1 downto 0 * 16),
- GSC_REPLY_PACKET_NUM_IN => mlt_gsc_reply_packet(1 * 3 - 1 downto 0* 3),
+ GSC_REPLY_PACKET_NUM_IN => mlt_gsc_reply_packet(1 * 3 - 1 downto 0 * 3),
GSC_REPLY_READ_OUT => mlt_gsc_reply_read(0),
GSC_BUSY_IN => mlt_gsc_busy(0),
- SLV_ADDR_IN => BUS_IP_RX.addr(7 downto 0),
- SLV_READ_IN => BUS_IP_RX.read,
- SLV_WRITE_IN => BUS_IP_RX.write,
- SLV_BUSY_OUT => busip0.nack,
- SLV_ACK_OUT => busip0.ack,
- SLV_DATA_IN => BUS_IP_RX.data,
- SLV_DATA_OUT => busip0.data,
+ SLV_ADDR_IN => BUS_IP_RX.addr(7 downto 0),
+ SLV_READ_IN => BUS_IP_RX.read,
+ SLV_WRITE_IN => BUS_IP_RX.write,
+ SLV_BUSY_OUT => busip0.nack,
+ SLV_ACK_OUT => busip0.ack,
+ SLV_DATA_IN => BUS_IP_RX.data,
+ SLV_DATA_OUT => busip0.data,
CFG_GBE_ENABLE_IN => cfg_gbe_enable,
CFG_IPU_ENABLE_IN => cfg_ipu_enable,
CFG_MULT_ENABLE_IN => cfg_mult_enable,
CFG_MAX_SINGLE_SUB_IN => cfg_max_single_sub,
CFG_ADDITIONAL_HDR_IN => cfg_additional_hdr,
CFG_MAX_REPLY_SIZE_IN => cfg_max_reply,
+ CFG_AUTO_THROTTLE_IN => cfg_autothrottle,
+ CFG_THROTTLE_PAUSE_IN => cfg_throttle_pause,
MONITOR_RX_FRAMES_OUT => monitor_rx_frames(1 * 32 - 1 downto 0 * 32),
MONITOR_RX_BYTES_OUT => monitor_rx_bytes(1 * 32 - 1 downto 0 * 32),
MONITOR_TX_FRAMES_OUT => monitor_tx_frames(1 * 32 - 1 downto 0 * 32),
MONITOR_TX_BYTES_OUT => monitor_tx_bytes(1 * 32 - 1 downto 0 * 32),
MONITOR_TX_PACKETS_OUT => monitor_tx_packets(1 * 32 - 1 downto 0 * 32),
MONITOR_DROPPED_OUT => monitor_dropped(1 * 32 - 1 downto 0 * 32),
- MONITOR_GEN_DBG_OUT => open,
+ MONITOR_GEN_DBG_OUT => open,
MAKE_RESET_OUT => make_reset0
);
end generate GEN_LINK_0;
-
+
NO_LINK0_GEN : if (LINKS_ACTIVE(0) = '0') generate
- make_reset0 <= '0';
- busip0.data <= (others => '0');
- busip0.ack <= '0';
- busip0.nack <= '0';
- end generate NO_LINK0_GEN;
+ make_reset0 <= '0';
+ busip0.data <= (others => '0');
+ busip0.ack <= '0';
+ busip0.nack <= '0';
+ end generate NO_LINK0_GEN;
BUS_IP_TX.ack <= busip0.ack or busip1.ack or busip2.ack or busip3.ack when rising_edge(CLK_SYS_IN);
- BUS_IP_TX.nack <= busip0.nack or busip1.nack or busip2.nack or busip3.nack when rising_edge(CLK_SYS_IN);
+ BUS_IP_TX.nack <= busip0.nack or busip1.nack or busip2.nack or busip3.nack when rising_edge(CLK_SYS_IN);
BUS_IP_TX.data <= busip0.data or busip1.data or busip2.data or busip3.data when rising_edge(CLK_SYS_IN);
-
-
+
real_ipu_gen : if USE_EXTERNAL_TRBNET_DUMMY = 0 generate
ipu_mult : entity work.gbe_ipu_multiplexer
generic map(
clk => CLK_SYS_IN,
rst => RESET,
GBE_READY_IN => all_links_ready,
-
CFG_EVENT_SIZE_IN => dummy_event,
CFG_TRIGGERED_MODE_IN => '0',
TRIGGER_IN => TRIGGER_IN,
MAX_SINGLE_SUB_SIZE_IN => (others => '0'),
READOUT_CTR_IN => (others => '0'),
READOUT_CTR_VALID_IN => '0',
+ CFG_AUTO_THROTTLE_IN => '0',
+ CFG_THROTTLE_PAUSE_IN => (others => '0'),
-- PacketConstructor interface
PC_WR_EN_OUT => open,
PC_DATA_OUT => open,
GBE_MAX_QUEUE_OUT => cfg_max_queue,
GBE_MAX_SUBS_IN_QUEUE_OUT => cfg_max_subs_in_queue,
GBE_MAX_SINGLE_SUB_OUT => cfg_max_single_sub,
+ GBE_AUTOTHROTTLE_OUT => cfg_autothrottle,
+ GBE_THROTTLE_PAUSE_OUT => cfg_throttle_pause,
MONITOR_RX_BYTES_IN => sum_rx_bytes,
MONITOR_RX_FRAMES_IN => sum_rx_frames,
MONITOR_TX_BYTES_IN => sum_tx_bytes,
SCTRL_HIST_IN => dbg_hist2
);
end generate;
-
+
setup_sim_gen : if (DO_SIMULATION = 1) generate
- cfg_subevent_id <= x"12345678";
- cfg_subevent_dec <= x"00010002";
- cfg_queue_dec <= x"00030004";
- cfg_max_frame <= x"0578";
- cfg_gbe_enable <= '1';
- cfg_ipu_enable <= '1';
- cfg_mult_enable <= '0';
- cfg_readout_ctr <= x"000000";
+ cfg_subevent_id <= x"12345678";
+ cfg_subevent_dec <= x"00010002";
+ cfg_queue_dec <= x"00030004";
+ cfg_max_frame <= x"0578";
+ cfg_gbe_enable <= '1';
+ cfg_ipu_enable <= '1';
+ cfg_mult_enable <= '0';
+ cfg_readout_ctr <= x"000000";
cfg_readout_ctr_valid <= '0';
- cfg_allow_rx <= '1';
- cfg_additional_hdr <= '0';
- cfg_insert_ttype <= '0';
- cfg_soft_rst <= '0';
- cfg_max_reply <= x"0000fff0";
- cfg_max_sub <= x"fff0";
- cfg_max_queue <= x"fff0";
+ cfg_allow_rx <= '1';
+ cfg_additional_hdr <= '0';
+ cfg_insert_ttype <= '0';
+ cfg_soft_rst <= '0';
+ cfg_max_reply <= x"0000fff0";
+ cfg_max_sub <= x"fff0";
+ cfg_max_queue <= x"fff0";
cfg_max_subs_in_queue <= x"0001";
- cfg_max_single_sub <= x"fff0";
+ cfg_max_single_sub <= x"fff0";
end generate;
- SCTRL_MAP_GEN : for i in 0 to NUMBER_OF_GBE_LINKS - 1 generate
- ACTIVE_MAP_GEN : if (LINK_HAS_SLOWCTRL(i) = '1') generate
- mlt_gsc_clk(i) <= GSC_CLK_IN;
- GSC_INIT_DATAREADY_OUT <= mlt_gsc_init_dataready(i);
- GSC_INIT_DATA_OUT <= mlt_gsc_init_data((i + 1) * 16 - 1 downto i* 16);
- GSC_INIT_PACKET_NUM_OUT <= mlt_gsc_init_packet((i + 1) * 3 - 1 downto i * 3);
- mlt_gsc_init_read(i) <= GSC_INIT_READ_IN;
- mlt_gsc_reply_dataready(i) <= GSC_REPLY_DATAREADY_IN;
- mlt_gsc_reply_data((i + 1) * 16 - 1 downto i * 16) <= GSC_REPLY_DATA_IN;
- mlt_gsc_reply_packet((i + 1) * 3 - 1 downto i * 3) <= GSC_REPLY_PACKET_NUM_IN;
- GSC_REPLY_READ_OUT <= mlt_gsc_reply_read(i);
- mlt_gsc_busy(i) <= GSC_BUSY_IN;
- end generate ACTIVE_MAP_GEN;
-
- INACTIVE_MAP_GEN : if (LINK_HAS_SLOWCTRL(i) = '0') generate
- mlt_gsc_clk(i) <= '0';
- --GSC_INIT_DATAREADY_OUT <= '0';
- --GSC_INIT_DATA_OUT <= (others => '0');
- --GSC_INIT_PACKET_NUM_OUT <= (others => '0');
- mlt_gsc_init_read(i) <= '0';
- mlt_gsc_reply_dataready(i) <= '0';
- mlt_gsc_reply_data((i + 1) * 16 - 1 downto i * 16) <= (others => '0');
- mlt_gsc_reply_packet((i + 1) * 3 - 1 downto i * 3) <= (others => '0');
- --GSC_REPLY_READ_OUT <= '0';
- mlt_gsc_busy(i) <= '0';
- end generate INACTIVE_MAP_GEN;
+ NOSCTRL_MAP_GEN : if (LINK_HAS_SLOWCTRL = "0000") generate
+ GSC_INIT_DATAREADY_OUT <= '0';
+ GSC_INIT_DATA_OUT <= (others => '0');
+ GSC_INIT_PACKET_NUM_OUT <= (others => '0');
+ GSC_REPLY_READ_OUT <= '1';
+ mlt_gsc_clk <= (others => '0');
+ mlt_gsc_init_read <= (others => '0');
+ mlt_gsc_reply_dataready <= (others => '0');
+ mlt_gsc_reply_data <= (others => '0');
+ mlt_gsc_reply_packet <= (others => '0');
+ mlt_gsc_busy <= (others => '0');
+ end generate NOSCTRL_MAP_GEN;
+
+ SCTRL_MAP_GEN : if (LINK_HAS_SLOWCTRL /= "0000") generate
+ SCTRL_LOOP_GEN : for i in 0 to NUMBER_OF_GBE_LINKS - 1 generate
+ ACTIVE_MAP_GEN : if (LINK_HAS_SLOWCTRL(i) = '1') generate
+ mlt_gsc_clk(i) <= GSC_CLK_IN;
+ GSC_INIT_DATAREADY_OUT <= mlt_gsc_init_dataready(i);
+ GSC_INIT_DATA_OUT <= mlt_gsc_init_data((i + 1) * 16 - 1 downto i * 16);
+ GSC_INIT_PACKET_NUM_OUT <= mlt_gsc_init_packet((i + 1) * 3 - 1 downto i * 3);
+ mlt_gsc_init_read(i) <= GSC_INIT_READ_IN;
+ mlt_gsc_reply_dataready(i) <= GSC_REPLY_DATAREADY_IN;
+ mlt_gsc_reply_data((i + 1) * 16 - 1 downto i * 16) <= GSC_REPLY_DATA_IN;
+ mlt_gsc_reply_packet((i + 1) * 3 - 1 downto i * 3) <= GSC_REPLY_PACKET_NUM_IN;
+ GSC_REPLY_READ_OUT <= mlt_gsc_reply_read(i);
+ mlt_gsc_busy(i) <= GSC_BUSY_IN;
+ end generate ACTIVE_MAP_GEN;
+
+ INACTIVE_MAP_GEN : if (LINK_HAS_SLOWCTRL(i) = '0') generate
+ mlt_gsc_clk(i) <= '0';
+ mlt_gsc_init_read(i) <= '0';
+ mlt_gsc_reply_dataready(i) <= '0';
+ mlt_gsc_reply_data((i + 1) * 16 - 1 downto i * 16) <= (others => '0');
+ mlt_gsc_reply_packet((i + 1) * 3 - 1 downto i * 3) <= (others => '0');
+ mlt_gsc_busy(i) <= '0';
+ end generate INACTIVE_MAP_GEN;
+ end generate SCTRL_LOOP_GEN;
end generate SCTRL_MAP_GEN;
sum_rx_bytes <= monitor_rx_bytes(4 * 32 - 1 downto 3 * 32) + monitor_rx_bytes(3 * 32 - 1 downto 2 * 32) + monitor_rx_bytes(2 * 32 - 1 downto 1 * 32) + monitor_rx_bytes(1 * 32 - 1 downto 0 * 32);
sum_dropped <= monitor_dropped(4 * 32 - 1 downto 3 * 32) + monitor_dropped(3 * 32 - 1 downto 2 * 32) + monitor_dropped(2 * 32 - 1 downto 1 * 32) + monitor_dropped(1 * 32 - 1 downto 0 * 32);
include_debug_gen : if (INCLUDE_DEBUG = 1) generate
--- DEBUG_OUT(0) <= mac_an_ready(3);
--- DEBUG_OUT(1) <= clk_125_rx_from_pcs(3);
--- DEBUG_OUT(2) <= RESET;
--- DEBUG_OUT(3) <= CLK_125_IN;
---
--- DEBUG_OUT(127 downto 4) <= (others => '0');
-
- DEBUG_OUT(63 downto 0) <= monitor_gen_dbg(4 * 64 - 1 downto 3 * 64);
+ DEBUG_OUT(63 downto 0) <= monitor_gen_dbg(4 * 64 - 1 downto 3 * 64);
DEBUG_OUT(127 downto 65) <= (others => '0');
end generate;
-
-
+
testbench_sim : if DO_SIMULATION = 1 generate
-
clk_125_rx_from_pcs(0) <= CLK_125_IN;
clk_125_rx_from_pcs(1) <= CLK_125_IN;
clk_125_rx_from_pcs(2) <= CLK_125_IN;
clk_125_rx_from_pcs(3) <= CLK_125_IN;
-
+
done_generate : for i in 0 to 3 generate
process
begin
mac_tx_done(i) <= '0';
wait until rising_edge(mac_fifoeof(i));
wait until rising_edge(clk_125_rx_from_pcs(i));
- wait until rising_edge(clk_125_rx_from_pcs(i));
wait until rising_edge(clk_125_rx_from_pcs(i));
- wait until rising_edge(clk_125_rx_from_pcs(i));
+ wait until rising_edge(clk_125_rx_from_pcs(i));
+ wait until rising_edge(clk_125_rx_from_pcs(i));
wait until rising_edge(clk_125_rx_from_pcs(i));
wait until rising_edge(clk_125_rx_from_pcs(i));
mac_tx_done(i) <= '1';
wait until rising_edge(clk_125_rx_from_pcs(i));
end process;
end generate done_generate;
-
+
process
begin
- wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_tx_read(0) <= mac_fifoavail(0);
- mac_tx_read(1) <= mac_fifoavail(1);
- mac_tx_read(2) <= mac_fifoavail(2);
- mac_tx_read(3) <= mac_fifoavail(3);
+ wait until rising_edge(clk_125_rx_from_pcs(0));
+ mac_tx_read(0) <= mac_fifoavail(0);
+ mac_tx_read(1) <= mac_fifoavail(1);
+ mac_tx_read(2) <= mac_fifoavail(2);
+ mac_tx_read(3) <= mac_fifoavail(3);
end process;
-
- mac_rx_eof(1) <= mac_rx_eof(0);
- mac_rx_eof(2) <= mac_rx_eof(0);
- mac_rx_eof(3) <= mac_rx_eof(0);
- mac_rx_write(1) <= mac_rx_write(0);
- mac_rx_write(2) <= mac_rx_write(0);
- mac_rx_write(3) <= mac_rx_write(0);
+
+ mac_rx_eof(1) <= mac_rx_eof(0);
+ mac_rx_eof(2) <= mac_rx_eof(0);
+ mac_rx_eof(3) <= mac_rx_eof(0);
+ mac_rx_write(1) <= mac_rx_write(0);
+ mac_rx_write(2) <= mac_rx_write(0);
+ mac_rx_write(3) <= mac_rx_write(0);
mac_rx_data(2 * 8 - 1 downto 1 * 8) <= mac_rx_data(1 * 8 - 1 downto 0 * 8);
mac_rx_data(3 * 8 - 1 downto 2 * 8) <= mac_rx_data(1 * 8 - 1 downto 0 * 8);
mac_rx_data(4 * 8 - 1 downto 3 * 8) <= mac_rx_data(1 * 8 - 1 downto 0 * 8);
-
-
+
testbench_proc : process
begin
-
+
--trigger <= '0';
--gbe_ready <= '0';
- mac_rx_write(0) <= '0';
+ mac_rx_write(0) <= '0';
mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
- mac_rx_eof(0) <= '0';
-
+ mac_rx_eof(0) <= '0';
+
wait for 5 us;
-
- -- FIRST FRAME UDP - DHCP Offer
+
+ -- FIRST FRAME UDP - DHCP Offer
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_write(0) <= '1';
- -- dest mac
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_write(0) <= '1';
+ -- dest mac
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- -- src mac
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ -- src mac
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"aa";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"aa";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"bb";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"bb";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"cc";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"cc";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"dd";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"dd";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ee";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ee";
wait until rising_edge(clk_125_rx_from_pcs(0));
- -- frame type
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"08";
+ -- frame type
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"08";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- -- ip headers
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"45";
+ -- ip headers
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"45";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"10";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"10";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"5a";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"5a";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"49";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"49";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"11"; -- udp
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"11"; -- udp
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"cc";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"cc";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"cc";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"cc";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"c0";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"c0";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"a8";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"a8";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"c0";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"c0";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"a8";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"a8";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
- -- udp headers
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
+ -- udp headers
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"43";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"43";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"44";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"44";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"2c";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"2c";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"aa";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"aa";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"bb";
- -- dhcp data
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"bb";
+ -- dhcp data
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"06";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"06";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff"; --transcation id
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff"; --transcation id
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";--transcation id
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff"; --transcation id
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"fa";--transcation id
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"fa"; --transcation id
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ce";--transcation id
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ce"; --transcation id
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"c0";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"c0";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"a8";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"a8";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"10";
-
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"10";
+
for i in 0 to 219 loop
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
end loop;
-
+
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"35";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"35";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_eof(0) <= '1';
-
+ mac_rx_eof(0) <= '1';
+
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_write(0) <='0';
- mac_rx_eof(0) <= '0';
-
+ mac_rx_write(0) <= '0';
+ mac_rx_eof(0) <= '0';
+
wait for 6 us;
-
- wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_write(0) <= '1';
- -- dest mac
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_write(0) <= '1';
+ -- dest mac
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- -- src mac
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"aa";
+ -- src mac
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"bb";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"aa";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"cc";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"bb";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"dd";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"cc";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ee";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"dd";
wait until rising_edge(clk_125_rx_from_pcs(0));
- -- frame type
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"08";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ee";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ -- frame type
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"08";
wait until rising_edge(clk_125_rx_from_pcs(0));
- -- ip headers
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"45";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"10";
+ -- ip headers
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"45";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"10";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"5a";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"49";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"5a";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"49";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"11"; -- udp
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"cc";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"11"; -- udp
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"cc";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"cc";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"c0";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"cc";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"a8";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"c0";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"a8";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"c0";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"a8";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"c0";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"a8";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
- -- udp headers
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
+ -- udp headers
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"43";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"43";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"44";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"44";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"2c";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"aa";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"2c";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"bb";
- -- dhcp data
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"aa";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"bb";
+ -- dhcp data
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"02";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"06";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"06";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"fa";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ff";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ce";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"fa";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"ce";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"c0";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"a8";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"c0";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"a8";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"10";
-
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ wait until rising_edge(clk_125_rx_from_pcs(0));
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"10";
+
for i in 0 to 219 loop
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
end loop;
-
+
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"35";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"35";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"01";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"05";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"05";
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
+ mac_rx_data(1 * 8 - 1 downto 0 * 8) <= x"00";
wait until rising_edge(clk_125_rx_from_pcs(0));
mac_rx_eof(0) <= '1';
-
+
wait until rising_edge(clk_125_rx_from_pcs(0));
- mac_rx_write(0) <='0';
- mac_rx_eof(0) <= '0';
-
-
+ mac_rx_write(0) <= '0';
+ mac_rx_eof(0) <= '0';
+
wait for 5 us;
wait for 2 us;
-
+
--gbe_ready <= '1';
-
+
wait for 1 us;
-
+
--trigger <= '1';
wait;
-
+
end process testbench_proc;
-
+
end generate testbench_sim;
end architecture RTL;
--*******
-- SAVING PART
--*******
+
+-- ready_impl_gen : if DO_SIMULATION = 0 generate
+ READY_PROC : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ --if (load_current_state = IDLE) then
+ PC_READY_OUT <= not df_full;
+ --else
+ -- PC_READY_OUT <= '0';
+ --end if;
+ end if;
+ end process READY_PROC;
+
+ df_full <= df_afull; --df_full_real;
+-- end generate ready_impl_gen;
+
+-- ready_sim_gen : if DO_SIMULATION = 1 generate
+--
+-- -- FULL_PROC : process
+-- -- begin
+-- -- df_full <= '0';
+-- --
+-- -- wait for 22000 ns;
+-- -- wait until rising_edge(CLK);
+-- -- df_full <= '1';
+-- -- wait until rising_edge(CLK);
+-- -- wait until rising_edge(CLK);
+-- -- wait until rising_edge(CLK);
+-- -- df_full <= '0';
+-- --
+-- -- wait;
+-- -- end process FULL_PROC;
+--
+-- afull_rand_inst : random_size
+-- port map(Clk => CLK,
+-- Enb => '1',
+-- Rst => RESET,
+-- Dout => s
+-- );
+--
+-- process(clk)
+-- variable seed1, seed2 : positive;
+-- variable rand : real;
+-- variable int_rand : integer;
+-- variable stim : std_logic_vector(11 downto 0);
+-- begin
+-- if rising_edge(CLK) then
+-- uniform(seed1, seed2, rand);
+-- int_rand := integer(trunc(rand*4096.0));
+-- stim := std_logic_vector(to_unsigned(int_rand, stim'length));
+--
+-- rand_vec <= stim;
+-- end if;
+-- end process;
+--
+--
+-- df_full <= df_afull;
+--
+-- READY_PROC : process(CLK)
+-- begin
+-- if rising_edge(CLK) then
+--
+-- df_afull_q <= df_afull;
+--
+-- --if (load_current_state = IDLE) then
+-- PC_READY_OUT <= not df_full and not qsf_full and not shf_full and not rand_vec(0); -- and not s(0); -- ORIGINAL
+-- --else
+-- -- PC_READY_OUT <= '0';
+-- --end if;
+-- end if;
+-- end process READY_PROC;
+--
+-- end generate ready_sim_gen;
+
+
DF_EOD_PROC : process(CLK)
begin
end if;
end process DF_QQ_PROC;
- ready_impl_gen : if DO_SIMULATION = 0 generate
- READY_PROC : process(CLK)
- begin
- if rising_edge(CLK) then
- --if (load_current_state = IDLE) then
- PC_READY_OUT <= not df_full;
- --else
- -- PC_READY_OUT <= '0';
- --end if;
- end if;
- end process READY_PROC;
-
- df_full <= df_afull; --df_full_real;
- end generate ready_impl_gen;
-
- ready_sim_gen : if DO_SIMULATION = 1 generate
-
- -- FULL_PROC : process
- -- begin
- -- df_full <= '0';
- --
- -- wait for 22000 ns;
- -- wait until rising_edge(CLK);
- -- df_full <= '1';
- -- wait until rising_edge(CLK);
- -- wait until rising_edge(CLK);
- -- wait until rising_edge(CLK);
- -- df_full <= '0';
- --
- -- wait;
- -- end process FULL_PROC;
-
- afull_rand_inst : random_size
- port map(Clk => CLK,
- Enb => '1',
- Rst => RESET,
- Dout => s
- );
-
- process(clk)
- variable seed1, seed2 : positive;
- variable rand : real;
- variable int_rand : integer;
- variable stim : std_logic_vector(11 downto 0);
- begin
- if rising_edge(CLK) then
- uniform(seed1, seed2, rand);
- int_rand := integer(trunc(rand*4096.0));
- stim := std_logic_vector(to_unsigned(int_rand, stim'length));
-
- rand_vec <= stim;
- end if;
- end process;
-
-
- df_full <= df_afull;
-
- READY_PROC : process(CLK)
- begin
- if rising_edge(CLK) then
-
- df_afull_q <= df_afull;
-
- --if (load_current_state = IDLE) then
- PC_READY_OUT <= not df_full and not qsf_full and not shf_full and not rand_vec(0); -- and not s(0); -- COMMENTED SIMULATED FIFO AFULL
- --else
- -- PC_READY_OUT <= '0';
- --end if;
- end if;
- end process READY_PROC;
-
- end generate ready_sim_gen;
-
--*****
-- subevent headers
SUBEVENT_HEADERS_FIFO : fifo_4096x9 --fifo_4kx8_ecp3
MAX_SINGLE_SUB_SIZE_IN : in std_logic_vector(15 downto 0);
READOUT_CTR_IN : in std_logic_vector(23 downto 0); -- gk 26.04.10
READOUT_CTR_VALID_IN : in std_logic; -- gk 26.04.10
+ CFG_AUTO_THROTTLE_IN : in std_logic;
+ CFG_THROTTLE_PAUSE_IN : in std_logic_vector(15 downto 0);
-- PacketConstructor interface
PC_WR_EN_OUT : out std_logic;
PC_DATA_OUT : out std_logic_vector(7 downto 0);
architecture RTL of trb_net16_gbe_ipu_interface is
attribute syn_encoding : string;
- type saveStates is (IDLE, SAVE_EVT_ADDR, WAIT_FOR_DATA, SAVE_DATA, ADD_SUBSUB1, ADD_SUBSUB2, ADD_SUBSUB3, ADD_SUBSUB4, ADD_MISSING, TERMINATE, SEND_TERM_PULSE, CLOSE, FINISH_4_WORDS, CLEANUP);
+ type saveStates is (IDLE, SAVE_EVT_ADDR, WAIT_FOR_DATA, PRE_SAVE_DATA, SAVE_PRE_DATA, SAVE_DATA, ADD_SUBSUB1, ADD_SUBSUB2, ADD_SUBSUB3, ADD_SUBSUB4, TERMINATE, SEND_TERM_PULSE, CLOSE, CLEANUP);
signal save_current_state, save_next_state : saveStates;
attribute syn_encoding of save_current_state : signal is "onehot";
signal sf_q, pc_data : std_logic_vector(7 downto 0);
signal cts_rnd, cts_trg : std_logic_vector(15 downto 0);
- signal save_ctr : std_logic_vector(15 downto 0);
signal saved_events_ctr, loaded_events_ctr, saved_events_ctr_gbe : std_logic_vector(31 downto 0);
signal loaded_bytes_ctr : std_Logic_vector(15 downto 0);
signal bank_select : std_logic_vector(3 downto 0);
signal readout_ctr : std_logic_vector(23 downto 0) := x"000000";
- signal pc_ready_q : std_logic;
- signal sf_afull_q, sf_afull_qq, sf_afull_qqq, sf_afull_qqqq, sf_afull_qqqqq : std_logic;
+ signal sf_afull_q, sf_afull_qq, sf_afull_qqq, sf_afull_qqqq : std_logic := '0';
signal sf_aempty : std_logic;
signal rec_state, load_state : std_logic_vector(3 downto 0);
signal queue_size : std_logic_vector(17 downto 0);
signal number_of_subs : std_logic_vector(15 downto 0);
signal size_check_ctr : integer range 0 to 7;
- signal sf_data_q, sf_data_qq, sf_data_qqq, sf_data_qqqq, sf_data_qqqqq : std_logic_vector(15 downto 0);
- signal sf_wr_q, sf_wr_lock : std_logic;
- signal save_eod_q, save_eod_qq, save_eod_qqq, save_eod_qqqq, save_eod_qqqqq : std_logic;
- signal sf_wr_qq, sf_wr_qqq, sf_wr_qqqq, sf_wr_qqqqq : std_logic;
+ signal sf_data_q, sf_data_qq, sf_data_qqq, sf_data_qqqq, sf_data_qqqqq, sf_data_qqqqqq : std_logic_vector(15 downto 0);
+ signal sf_wr_lock : std_logic;
signal too_large_dropped : std_logic_vector(31 downto 0);
signal previous_ttype, previous_bank : std_logic_vector(3 downto 0);
- signal sf_afull_real : std_logic;
signal sf_cnt : std_logic_vector(15 downto 0);
- signal local_fee_busy, local_fee_busy_q, local_fee_busy_qq, local_fee_busy_qqq, local_fee_busy_qqqq, local_fee_busy_qqqqq, local_fee_busy_qqqqqq, local_fee_busy_qqqqqqq, local_fee_busy_qqqqqqqq : std_logic;
-
attribute syn_keep : string;
attribute syn_keep of sf_cnt : signal is "true";
signal saved_bytes_ctr : std_logic_vector(31 downto 0);
- signal longer_busy_ctr : std_logic_vector(7 downto 0);
- signal uneven_ctr : std_logic_vector(3 downto 0);
- signal saved_size : std_logic_vector(16 downto 0);
- signal overwrite_afull : std_logic;
- signal last_three_bytes : std_logic_vector(3 downto 0);
- signal sf_eos_q, sf_eos_qq : std_logic;
- signal eos_ctr : std_logic_vector(3 downto 0);
+ signal last_three_bytes : std_logic_vector(3 downto 0);
+ signal sf_eos_q : std_logic;
+ signal eos_ctr : std_logic_vector(3 downto 0);
+
+ signal fee_dataready, fee_dataready_q, fee_dataready_qq, fee_dataready_qqq, fee_dataready_qqqq, fee_dataready_qqqqq : std_logic;
+ signal temp_data_store : std_logic_vector(6 * 16 - 1 downto 0) := (others => '0');
+ signal local_read, local_read_q, local_read_qq, local_read_qqq, local_read_qqqq, local_read_qqqqq, local_read_qqqqqq, local_read_qqqqqqq, local_read_qqqqqqqq, local_read_qqqqqqqqq : std_logic := '0';
begin
end if;
end process SAVE_MACHINE_PROC;
- SAVE_MACHINE : process(save_current_state, CTS_START_READOUT_IN, local_fee_busy, saved_size, FEE_BUSY_IN, CTS_READ_IN, size_check_ctr)
+ SAVE_MACHINE : process(save_current_state, CTS_START_READOUT_IN, FEE_BUSY_IN, CTS_READ_IN, size_check_ctr)
begin
rec_state <= x"0";
case (save_current_state) is
when WAIT_FOR_DATA =>
rec_state <= x"3";
if (FEE_BUSY_IN = '1') then
- save_next_state <= SAVE_DATA;
+ save_next_state <= PRE_SAVE_DATA;
else
save_next_state <= WAIT_FOR_DATA;
end if;
+
+ when PRE_SAVE_DATA =>
+ rec_state <= x"e";
+ if (size_check_ctr = 5) then
+ save_next_state <= SAVE_PRE_DATA;
+ else
+ save_next_state <= PRE_SAVE_DATA;
+ end if;
+
+ when SAVE_PRE_DATA =>
+ rec_state <= x"e";
+ if (size_check_ctr = 0) then
+ save_next_state <= SAVE_DATA;
+ else
+ save_next_state <= SAVE_PRE_DATA;
+ end if;
when SAVE_DATA =>
rec_state <= x"4";
- --if (FEE_BUSY_IN = '0') then
- if (local_fee_busy = '0') then
+ if (FEE_BUSY_IN = '0') then
save_next_state <= TERMINATE;
else
save_next_state <= SAVE_DATA;
when CLOSE =>
rec_state <= x"6";
- if (CTS_START_READOUT_IN = '0') then
- if (saved_size = x"0000" & "0") then
- save_next_state <= ADD_SUBSUB1;
- else
- save_next_state <= ADD_MISSING;
- end if;
- else
- save_next_state <= CLOSE;
- end if;
-
- when ADD_MISSING =>
- if (saved_size = x"0000" & "1") then
- save_next_state <= ADD_SUBSUB1;
- else
- save_next_state <= ADD_MISSING;
- end if;
+ save_next_state <= ADD_SUBSUB1;
when ADD_SUBSUB1 =>
rec_state <= x"7";
when ADD_SUBSUB4 =>
rec_state <= x"a";
- save_next_state <= FINISH_4_WORDS;
-
- when FINISH_4_WORDS =>
- rec_state <= x"b";
- if (size_check_ctr = 1) then
- save_next_state <= CLEANUP;
- else
- save_next_state <= FINISH_4_WORDS;
- end if;
+ save_next_state <= CLEANUP;
when CLEANUP =>
rec_state <= x"c";
- save_next_state <= IDLE;
+ if (CTS_START_READOUT_IN = '0') then
+ save_next_state <= IDLE;
+ else
+ save_next_state <= CLEANUP;
+ end if;
when others => save_next_state <= IDLE;
end case;
end process SAVE_MACHINE;
+
SF_WR_EN_PROC : process(CLK_IPU)
begin
if rising_edge(CLK_IPU) then
- sf_afull_q <= sf_afull;
- sf_afull_qq <= sf_afull_q;
- sf_afull_qqq <= sf_afull_qq;
- sf_afull_qqqq <= sf_afull_qqq;
- sf_afull_qqqqq <= sf_afull_qqqq;
-
- --if (sf_afull_q = '0' and save_current_state = SAVE_DATA and FEE_DATAREADY_IN = '1' and FEE_BUSY_IN = '1') then
- --if (sf_afull_qqqqq = '0' and save_current_state = SAVE_DATA and FEE_DATAREADY_IN = '1' and FEE_BUSY_IN = '1') then
- --if (sf_afull_qqqqq = '0' and save_current_state = SAVE_DATA and FEE_DATAREADY_IN = '1' and local_fee_busy = '1') then
- if (sf_afull_qqqqq = '0' and save_current_state = SAVE_DATA and FEE_DATAREADY_IN = '1') then
+ if (save_current_state = SAVE_DATA and local_read_qqqqqqqqq = '1' and fee_dataready_qqqqq = '1') then
sf_wr_en <= '1';
- elsif (save_current_state = SAVE_EVT_ADDR) then
+ elsif (save_current_state = SAVE_PRE_DATA) then
sf_wr_en <= '1';
elsif (save_current_state = ADD_SUBSUB1 or save_current_state = ADD_SUBSUB2 or save_current_state = ADD_SUBSUB3 or save_current_state = ADD_SUBSUB4) then
sf_wr_en <= '1';
- elsif (save_current_state = FINISH_4_WORDS) then
- sf_wr_en <= '1';
- elsif (save_current_state = ADD_MISSING) then
- sf_wr_en <= '1';
else
sf_wr_en <= '0';
end if;
end if;
end process SF_WR_EN_PROC;
- LOCAL_BUSY_PROC : process(CLK_IPU)
- begin
- if rising_edge(CLK_IPU) then
- if (save_current_state = IDLE) then
- longer_busy_ctr <= x"14";
- elsif (save_current_state = SAVE_DATA and FEE_BUSY_IN = '0' and sf_afull_qqqqq = '0') then
- longer_busy_ctr <= longer_busy_ctr - x"1";
- else
- longer_busy_ctr <= longer_busy_ctr;
- end if;
-
- if (FEE_BUSY_IN = '1') then
- local_fee_busy <= '1';
- elsif (save_current_state = SAVE_DATA and longer_busy_ctr > x"00") then
- local_fee_busy <= '1';
- else
- local_fee_busy <= '0';
- end if;
- end if;
- end process LOCAL_BUSY_PROC;
-
SF_DATA_EOD_PROC : process(CLK_IPU)
begin
if rising_edge(CLK_IPU) then
case (save_current_state) is
- when SAVE_EVT_ADDR =>
- sf_data(3 downto 0) <= CTS_INFORMATION_IN(3 downto 0);
- sf_data(7 downto 4) <= CTS_READOUT_TYPE_IN;
- sf_data(15 downto 8) <= x"ab";
- save_eod <= '0';
+
+ when SAVE_PRE_DATA =>
+ sf_data <= temp_data_store( (5 - size_check_ctr + 1) * 16 - 1 downto (5 - size_check_ctr) * 16);
+ save_eod <= '0';
when SAVE_DATA =>
- sf_data <= FEE_DATA_IN;
+ sf_data <= sf_data_qqqqqq;
save_eod <= '0';
when ADD_SUBSUB1 =>
process(CLK_IPU)
begin
if rising_edge(CLK_IPU) then
- if (sf_wr_en = '1') then
- sf_data_q <= sf_data;
- sf_data_qq <= sf_data_q;
- sf_data_qqq <= sf_data_qq;
- sf_data_qqqq <= sf_data_qqq;
- sf_data_qqqqq <= sf_data_qqqq;
-
- save_eod_q <= save_eod;
- save_eod_qq <= save_eod_q;
- save_eod_qqq <= save_eod_qq;
- save_eod_qqqq <= save_eod_qqq;
- save_eod_qqqqq <= save_eod_qqqq;
- else
- sf_data_q <= sf_data_q;
- sf_data_qq <= sf_data_qq;
- sf_data_qqq <= sf_data_qqq;
- sf_data_qqqq <= sf_data_qqqq;
- sf_data_qqqqq <= sf_data_qqqqq;
-
- save_eod_q <= save_eod_q;
- save_eod_qq <= save_eod_qq;
- save_eod_qqq <= save_eod_qqq;
- save_eod_qqqq <= save_eod_qqqq;
- save_eod_qqqqq <= save_eod_qqqq;
- end if;
-
- sf_wr_q <= sf_wr_en and (not sf_wr_lock) and DATA_GBE_ENABLE_IN;
- sf_wr_qq <= sf_wr_q;
- sf_wr_qqq <= sf_wr_qq;
- sf_wr_qqqq <= sf_wr_qqq;
- sf_wr_qqqqq <= sf_wr_qqqq;
+
+ sf_data_q <= FEE_DATA_IN;
+ sf_data_qq <= sf_data_q;
+ sf_data_qqq <= sf_data_qq;
+ sf_data_qqqq <= sf_data_qqq;
+ sf_data_qqqqq <= sf_data_qqqq;
+ sf_data_qqqqqq <= sf_data_qqqqq;
+
+ sf_afull_q <= sf_afull;
+ sf_afull_qq <= sf_afull_q;
+ sf_afull_qqq <= sf_afull_qq;
+ sf_afull_qqqq <= sf_afull_qqq;
+
+ fee_dataready <= FEE_DATAREADY_IN;
+ fee_dataready_q <= fee_dataready;
+ fee_dataready_qq <= fee_dataready_q;
+ fee_dataready_qqq <= fee_dataready_qq;
+ fee_dataready_qqqq <= fee_dataready_qqq;
+ fee_dataready_qqqqq <= fee_dataready_qqqq;
end if;
end process;
+
process(CLK_IPU)
begin
if rising_edge(CLK_IPU) then
if (save_current_state = IDLE) then
- size_check_ctr <= 0;
- elsif (save_current_state = SAVE_DATA and sf_wr_en = '1' and size_check_ctr /= 4) then
+ size_check_ctr <= 1;
+ elsif (save_current_state = PRE_SAVE_DATA and FEE_DATAREADY_IN = '1' and size_check_ctr /= 5) then
size_check_ctr <= size_check_ctr + 1;
- elsif (save_current_state = FINISH_4_WORDS and size_check_ctr /= 0) then
- size_check_ctr <= size_check_ctr - 1;
+ elsif (save_current_state = SAVE_PRE_DATA and size_check_ctr /= 0) then
+ size_check_ctr <= size_check_ctr - 1;
else
size_check_ctr <= size_check_ctr;
end if;
-
+
if (save_current_state = IDLE) then
- sf_wr_lock <= '1';
- saved_size <= (others => '0');
- elsif (save_current_state = SAVE_DATA and size_check_ctr = 2 and sf_wr_en = '1' and (sf_data & "00") < ("00" & MAX_SUBEVENT_SIZE_IN)) then -- condition to ALLOW an event to be passed forward
+ sf_wr_lock <= '1';
+ elsif (save_current_state = PRE_SAVE_DATA and size_check_ctr = 3 and FEE_DATAREADY_IN = '1' and (sf_data & "00") < ("00" & MAX_SUBEVENT_SIZE_IN)) then -- condition to ALLOW an event to be passed forward
sf_wr_lock <= '0';
- saved_size <= (sf_data & "0") + x"1";
- elsif (save_current_state = SAVE_DATA and sf_wr_q = '1') then
- saved_size <= saved_size - x"1";
- elsif (save_current_state = ADD_MISSING) then
- saved_size <= saved_size - x"1";
else
sf_wr_lock <= sf_wr_lock;
- saved_size <= saved_size;
end if;
-
+
+ end if;
+ end process;
+
+ process(CLK_IPU)
+ begin
+ if rising_edge(CLK_IPU) then
+ if (save_current_state = SAVE_EVT_ADDR) then
+ temp_data_store(15 downto 0) <= x"ab" & CTS_READOUT_TYPE_IN & CTS_INFORMATION_IN(3 downto 0);
+ elsif (save_current_state = PRE_SAVE_DATA and FEE_DATAREADY_IN = '1') then
+ temp_data_store( (size_check_ctr + 2) * 16 - 1 downto (size_check_ctr + 1) * 16) <= FEE_DATA_IN;
+ else
+ temp_data_store <= temp_data_store;
+ end if;
end if;
end process;
if (RESET = '1') then
saved_events_ctr <= (others => '0');
elsif rising_edge(CLK_IPU) then
- --if (save_current_state = ADD_SUBSUB4 and sf_wr_lock = '0' and DATA_GBE_ENABLE_IN = '1') then
if (save_current_state = SEND_TERM_PULSE and DATA_GBE_ENABLE_IN = '1') then
saved_events_ctr <= saved_events_ctr + x"1";
else
CTS_DATAREADY_PROC : process(CLK_IPU)
begin
if rising_edge(CLK_IPU) then
- --if (save_current_state = SAVE_DATA and FEE_BUSY_IN = '0') then
- if (save_current_state = SAVE_DATA and local_fee_busy = '0') then
+ if (save_current_state = SAVE_DATA and FEE_BUSY_IN = '0') then
CTS_DATAREADY_OUT <= '1';
elsif (save_current_state = TERMINATE) then
CTS_DATAREADY_OUT <= '1';
CTS_READOUT_FINISHED_PROC : process(CLK_IPU)
begin
if rising_edge(CLK_IPU) then
- --if (save_current_state = CLOSE) then
- if (save_current_state = SEND_TERM_PULSE) then
+ if (save_current_state = CLEANUP) then
CTS_READOUT_FINISHED_OUT <= '1';
else
CTS_READOUT_FINISHED_OUT <= '0';
CTS_RND_TRG_PROC : process(CLK_IPU)
begin
if rising_edge(CLK_IPU) then
- if (save_current_state = SAVE_DATA and save_ctr = x"0000") then
- cts_rnd <= sf_data;
- cts_trg <= cts_trg;
- elsif (save_current_state = SAVE_DATA and save_ctr = x"0001") then
- cts_rnd <= cts_rnd;
- cts_trg <= sf_data;
+ if (save_current_state = SAVE_PRE_DATA and size_check_ctr = 5) then
+ cts_rnd <= temp_data_store(3 * 16 - 1 downto 2 * 16);
+ cts_trg <= temp_data_store(4 * 16 - 1 downto 3 * 16);
else
cts_rnd <= cts_rnd;
cts_trg <= cts_trg;
end if;
end process CTS_RND_TRG_PROC;
- SAVE_CTR_PROC : process(CLK_IPU)
- begin
- if rising_edge(CLK_IPU) then
- if (save_current_state = IDLE) then
- save_ctr <= (others => '0');
- elsif (save_current_state = SAVE_DATA and sf_wr_en = '1') then
- save_ctr <= save_ctr + x"1";
- else
- save_ctr <= save_ctr;
- end if;
- end if;
- end process SAVE_CTR_PROC;
-
- sf_afull_sim_gen : if DO_SIMULATION = 1 generate
-
--- process
--- begin
--- sf_afull <= '0';
--- wait for 21310 ns;
--- sf_afull <= '1';
--- wait for 10 ns;
--- sf_afull <= sf_afull_real;
--- wait;
--- end process;
-
- sf_afull <= sf_afull_real;
-
- end generate sf_afull_sim_gen;
-
- sf_afull_impl_gen : if DO_SIMULATION = 0 generate
- sf_afull <= sf_afull_real;
-
- end generate sf_afull_impl_gen;
-
- -- size_check_debug : if DO_SIMULATION = 1 generate
- --
- -- process(save_ctr, sf_data_qqqqq, save_current_state)
- -- begin
- -- if (save_ctr > x"000c" and save_current_state = SAVE_DATA) then
- -- assert (save_ctr - x"000c" = sf_data_qqqqq) report "IPU_INTERFACE: Mismatch between data and internal counters" severity warning;
- -- end if;
- -- end process;
- --
- -- end generate size_check_debug;
-
- process(CLK_IPU)
- begin
- if rising_edge(CLK_IPU) then
- if (save_current_state = IDLE) then
- overwrite_afull <= '0';
- elsif (sf_wr_q = '1' and save_current_state /= SAVE_DATA) then
- overwrite_afull <= '1';
- elsif (save_current_state = SAVE_DATA) then
- overwrite_afull <= '0';
- else
- overwrite_afull <= overwrite_afull;
- end if;
- end if;
- end process;
-
-
FEE_READ_PROC : process(CLK_IPU)
begin
if rising_edge(CLK_IPU) then
-
if (save_current_state = SAVE_DATA) then
- if (sf_afull = '0' or overwrite_afull = '1') then
- FEE_READ_OUT <= '1';
+ if (sf_afull = '0') then
+ local_read <= '1';
else
- FEE_READ_OUT <= '0';
+ local_read <= '0';
end if;
+ elsif (save_current_state = SAVE_PRE_DATA) then
+ local_read <= '0';
+ elsif (save_current_state = PRE_SAVE_DATA and size_check_ctr > 2 and FEE_DATAREADY_IN = '1') then
+ local_read <= '0';
+ elsif (save_current_state = PRE_SAVE_DATA and size_check_ctr > 3) then
+ local_read <= '0';
else
- FEE_READ_OUT <= '1';
+ local_read <= '1';
end if;
--- if (sf_afull = '0') then
--- --if (save_current_state = IDLE or save_current_state = SAVE_EVT_ADDR or save_current_state = WAIT_FOR_DATA or save_current_state = SAVE_DATA) then
--- FEE_READ_OUT <= '1';
--- --else
--- -- FEE_READ_OUT <= '0';
--- --end if;
--- else
--- FEE_READ_OUT <= '0';
--- end if;
+ local_read_q <= local_read;
+ local_read_qq <= local_read_q;
+ local_read_qqq <= local_read_qq or not FEE_DATAREADY_IN;
+ local_read_qqqq <= local_read_qqq;
+ local_read_qqqqq <= local_read_qqqq;
+ local_read_qqqqqq <= local_read_qqqqq;
+ local_read_qqqqqqq <= local_read_qqqqqq;
+ local_read_qqqqqqqq <= local_read_qqqqqqq;
+ local_read_qqqqqqqqq <= local_read_qqqqqqqq;
+
end if;
end process FEE_READ_PROC;
+
+ FEE_READ_OUT <= local_read;
THE_SPLIT_FIFO : entity work.fifo_32kx18x9_wcnt -- fifo_32kx16x8_mb2 --fifo_16kx18x9
port map(
-- Byte swapping for correct byte order on readout side of FIFO
- Data(7 downto 0) => sf_data_qqqqq(15 downto 8),
+ Data(7 downto 0) => sf_data(15 downto 8),
Data(8) => '0',
- Data(16 downto 9) => sf_data_qqqqq(7 downto 0),
- Data(17) => save_eod_qqqqq,
+ Data(16 downto 9) => sf_data(7 downto 0),
+ Data(17) => save_eod,
WrClock => CLK_IPU,
RdClock => CLK_GBE,
- WrEn => sf_wr_q, -- sf_wr_en
+ WrEn => sf_wr_en,
RdEn => sf_rd_en,
Reset => sf_reset,
RPReset => sf_reset,
AmEmptyThresh => b"0000_0000_0000_0010", --b"0000_0000_0000_0010", -- one byte ahead
- AmFullThresh => b"111_1111_1110_1111", -- 0x7fef = 32751 -- b"001_0011_1000_1000"
+ AmFullThresh => b"111_1111_1101_1111", -- 0x7fef = 32751 -- b"001_0011_1000_1000"
Q(7 downto 0) => sf_q,
Q(8) => sf_eos,
WCNT => sf_cnt,
Empty => sf_empty,
AlmostEmpty => sf_aempty,
Full => sf_full, -- WARNING, JUST FOR DEBUG
- AlmostFull => sf_afull_real
+ AlmostFull => sf_afull
);
sf_reset <= RESET;
if rising_edge(CLK_IPU) then
if (RESET = '1') then
saved_bytes_ctr <= (others => '0');
- elsif (save_current_state = SAVE_DATA and sf_wr_q = '1') then
+ elsif (save_current_state = SAVE_DATA and sf_wr_en = '1') then
saved_bytes_ctr <= saved_bytes_ctr + x"2";
elsif (save_current_state = CLEANUP) then
saved_bytes_ctr <= (others => '0');
end if;
end process LOAD_MACHINE_PROC;
- LOAD_MACHINE : process(load_current_state, saved_events_ctr_gbe, loaded_events_ctr, loaded_bytes_ctr, last_three_bytes, PC_READY_IN, sf_eos, sf_eos_q, sf_rd_en, eos_ctr, queue_size, number_of_subs, subevent_size, MAX_QUEUE_SIZE_IN, MAX_SUBS_IN_QUEUE_IN, MAX_SINGLE_SUB_SIZE_IN, previous_bank, previous_ttype, trigger_type, bank_select, MULT_EVT_ENABLE_IN)
+ LOAD_MACHINE : process(load_current_state, saved_events_ctr_gbe, loaded_events_ctr, loaded_bytes_ctr, last_three_bytes, sf_eos_q, sf_rd_en, eos_ctr, PC_READY_IN, sf_eos, queue_size, number_of_subs, subevent_size, MAX_QUEUE_SIZE_IN, MAX_SUBS_IN_QUEUE_IN, MAX_SINGLE_SUB_SIZE_IN, previous_bank, previous_ttype, trigger_type, bank_select, MULT_EVT_ENABLE_IN)
begin
load_state <= x"0";
case (load_current_state) is
when REMOVE =>
load_state <= x"3";
- if (loaded_bytes_ctr = x"0008") then
+ if (loaded_bytes_ctr = x"000A") then
load_next_state <= WAIT_ONE;
else
load_next_state <= REMOVE;
when LOAD =>
load_state <= x"9";
- --if (sf_eos = '1') then
- --if (eos_ctr = x"0") then
- --if (sf_eos_q = '1') then
if (sf_eos = '1' and sf_rd_en = '1') then
load_next_state <= FINISH_ONE;
elsif (sf_eos = '1' and sf_rd_en = '0') then
else
load_next_state <= LOAD;
end if;
-
+
when FINISH_ONE =>
load_state <= x"d";
if (PC_READY_IN = '1') then
else
load_next_state <= FINISH_ONE;
end if;
-
+
when FINISH_TWO =>
load_state <= x"e";
if (PC_READY_IN = '1') then
when CLOSE_SUB =>
load_state <= x"a";
- --if (last_three_bytes = x"0") then
- if (subevent_size > ("00" & MAX_SINGLE_SUB_SIZE_IN) and queue_size = (subevent_size + x"10" + x"8" + x"4")) then
- load_next_state <= CLOSE_QUEUE_IMMEDIATELY;
- else
- load_next_state <= WAIT_FOR_SUBS;
- end if;
- --else
- -- load_next_state <= CLOSE_SUB;
- --end if;
+ if (subevent_size > ("00" & MAX_SINGLE_SUB_SIZE_IN) and queue_size = (subevent_size + x"10" + x"8" + x"4")) then
+ load_next_state <= CLOSE_QUEUE_IMMEDIATELY;
+ else
+ load_next_state <= WAIT_FOR_SUBS;
+ end if;
when CLOSE_QUEUE =>
load_state <= x"b";
end case;
end process LOAD_MACHINE;
-
+
+ saved_ctr_sync : signal_sync
+ generic map(
+ WIDTH => 32,
+ DEPTH => 2
+ )
+ port map(
+ RESET => RESET,
+ CLK0 => CLK_GBE,
+ CLK1 => CLK_GBE,
+ D_IN => saved_events_ctr,
+ D_OUT => saved_events_ctr_gbe
+ );
+
process(CLK_GBE)
begin
if rising_edge(CLK_GBE) then
end if;
end if;
end process;
-
-
+
process(CLK_GBE)
begin
if rising_edge(CLK_GBE) then
else
sf_eos_q <= sf_eos_q;
end if;
-
- sf_eos_qq <= sf_eos_q;
-
--- if (load_current_state = REMOVE) then
--- sf_eos_qq <= '0';
--- elsif (PC_READY_IN = '1') then
--- if (load_current_state = LOAD and sf_eos_q = '1') then
--- sf_eos_qq <= '1';
--- else
--- sf_eos_qq <= sf_eos_qq;
--- end if;
--- else
--- sf_eos_qq <= sf_eos_qq;
--- end if;
-
+
if (load_current_state = REMOVE or load_current_state = IDLE) then
eos_ctr <= x"f";
elsif (eos_ctr = x"f" and load_current_state = LOAD and sf_eos = '1' and sf_rd_en = '1') then
else
eos_ctr <= eos_ctr;
end if;
-
+
end if;
end process;
-
-
- saved_ctr_sync : signal_sync
- generic map(
- WIDTH => 32,
- DEPTH => 2
- )
- port map(
- RESET => RESET,
- CLK0 => CLK_GBE,
- CLK1 => CLK_GBE,
- D_IN => saved_events_ctr,
- D_OUT => saved_events_ctr_gbe
- );
--TODO: all queue split conditions here
-- the queue size counter used only for closing current queue
SF_RD_EN_PROC : process(CLK_GBE)
begin
if rising_edge(CLK_GBE) then
-
--- if (PC_READY_IN = '1') then
--- if (load_current_state = REMOVE) then
--- sf_rd_en <= '1';
--- elsif (load_current_state = LOAD and PC_READY_IN = '1') then --pc_ready_q = '1') then
--- sf_rd_en <= '1';
--- else
--- sf_rd_en <= '0';
--- end if;
--- else
--- sf_rd_en <= '0';
--- end if;
-
--- if (load_current_state = REMOVE) then
--- sf_rd_en <= '1';
--- elsif (load_current_state = LOAD) then
--- if (sf_eos_q = '0') then
--- if (PC_READY_IN = '1') then
--- sf_rd_en <= '1';
--- else
--- sf_rd_en <= '0';
--- end if;
--- elsif (sf_eos_q = '1' or sf_eos_qq = '1') then
--- sf_rd_en <= '1';
--- else
--- sf_rd_en <= '0';
--- end if;
--- else
--- sf_rd_en <= '0';
--- end if;
-
if (load_current_state = REMOVE) then
sf_rd_en <= '1';
- --elsif (eos_ctr /= x"f" and eos_ctr /= x"0") then
else
if (PC_READY_IN = '1') then
if (load_current_state = LOAD and sf_eos = '0') then
sf_rd_en <= '1';
elsif (load_current_state = FINISH_ONE or load_current_state = FINISH_TWO) then
sf_rd_en <= '1';
- --elsif (load_current_state = CLOSE_SUB and last_three_bytes /= x"0") then
- -- sf_rd_en <= '1';
else
sf_rd_en <= '0';
end if;
end if;
end if;
-
end if;
end process SF_RD_EN_PROC;
if rising_edge(CLK_GBE) then
if (load_current_state = IDLE) then
trigger_random <= (others => '0');
- elsif (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"0005") then
+ elsif (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"0007") then
trigger_random <= pc_data;
else
trigger_random <= trigger_random;
if rising_edge(CLK_GBE) then
if (load_current_state = IDLE) then
trigger_number <= (others => '0');
- elsif (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"0007") then
+ elsif (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"0009") then
trigger_number(7 downto 0) <= pc_data;
- elsif (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"0006") then
+ elsif (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"0008") then
trigger_number(15 downto 8) <= pc_data;
else
trigger_number <= trigger_number;
if rising_edge(CLK_GBE) then
if (load_current_state = IDLE) then
subevent_size <= (others => '0');
- elsif (load_current_state = WAIT_ONE and sf_rd_en = '1' and loaded_bytes_ctr = x"0009") then
+ elsif (load_current_state = WAIT_ONE and sf_rd_en = '1' and loaded_bytes_ctr = x"000B") then
subevent_size(9 downto 2) <= pc_data;
- elsif (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"0008") then
+ elsif (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"000A") then
subevent_size(17 downto 10) <= pc_data;
else
subevent_size <= subevent_size;
if rising_edge(CLK_GBE) then
if (load_current_state = IDLE) then
trigger_type <= x"0";
- elsif (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"0003") then
+ elsif (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"0005") then
trigger_type <= pc_data(7 downto 4);
else
trigger_type <= trigger_type;
if (RESET = '1') then
loaded_events_ctr <= (others => '0');
elsif rising_edge(CLK_GBE) then
- if (load_current_state = CLOSE_SUB) then -- and PC_READY_IN = '1') then -- and last_three_bytes = x"0") then
+ if (load_current_state = CLOSE_SUB) then
loaded_events_ctr <= loaded_events_ctr + x"1";
else
loaded_events_ctr <= loaded_events_ctr;
if rising_edge(CLK_GBE) then
if (load_current_state = IDLE) then
bank_select <= x"0";
- elsif (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"0003") then
+ elsif (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"0005") then
bank_select <= pc_data(3 downto 0);
else
bank_select <= bank_select;
START_CONFIG_PROC : process(CLK_GBE)
begin
if rising_edge(CLK_GBE) then
- if (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"0003") then
+ if (load_current_state = REMOVE and sf_rd_en = '1' and loaded_bytes_ctr = x"0005") then
START_CONFIG_OUT <= '1';
elsif (CONFIG_DONE_IN = '1') then
START_CONFIG_OUT <= '0';
PC_WR_EN_PROC : process(CLK_GBE)
begin
if rising_edge(CLK_GBE) then
- --pc_ready_q <= PC_READY_IN;
if (PC_READY_IN = '1') then
- if ( (load_current_state = LOAD and sf_eos = '0') or load_current_state = FINISH_ONE or load_current_state = FINISH_TWO) then
+ if ((load_current_state = LOAD and sf_eos = '0') or load_current_state = FINISH_ONE or load_current_state = FINISH_TWO) then
PC_WR_EN_OUT <= '1';
else
PC_WR_EN_OUT <= '0';
MONITOR_OUT(223 downto 32) <= (others => '0');
end architecture RTL;
+
MC_RESET_LINK_IN : in std_logic;
MC_IDLE_TOO_LONG_OUT : out std_logic;
MC_DHCP_DONE_OUT : out std_logic;
--- MC_MY_MAC_OUT : out std_logic_vector(47 downto 0);
MC_MY_MAC_IN : in std_logic_vector(47 downto 0);
-- signals to/from receive controller
PCS_AN_COMPLETE_IN : in std_logic;
-- signals to/from hub
--- MC_UNIQUE_ID_IN : in std_logic_vector(63 downto 0);
-
GSC_CLK_IN : in std_logic;
GSC_INIT_DATAREADY_OUT : out std_logic;
GSC_INIT_DATA_OUT : out std_logic_vector(15 downto 0);
CFG_ADDITIONAL_HDR_IN : in std_logic;
CFG_MAX_REPLY_SIZE_IN : in std_logic_vector(31 downto 0);
+
+ CFG_AUTO_THROTTLE_IN : in std_logic;
+ CFG_THROTTLE_PAUSE_IN : in std_logic_vector(15 downto 0);
MAKE_RESET_OUT : out std_logic;
DATA_HIST_OUT : out hist_array;
SCTRL_HIST_OUT : out hist_array;
-
+
DEBUG_OUT : out std_logic_vector(63 downto 0)
);
end trb_net16_gbe_main_control;
signal stat_data : std_logic_vector(31 downto 0);
signal stat_addr : std_logic_vector(7 downto 0);
--- signal unique_id : std_logic_vector(63 downto 0);
-
signal nothing_sent : std_logic;
signal nothing_sent_ctr : std_logic_vector(31 downto 0);
attribute syn_keep of nothing_sent, link_state, state, redirect_state, dhcp_done : signal is true;
attribute syn_preserve of nothing_sent, link_state, state, redirect_state, dhcp_done : signal is true;
- signal mc_busy : std_logic;
- signal incl_dhcp : std_logic;
- signal flow_state : std_logic_vector(3 downto 0);
+ signal mc_busy : std_logic;
+ signal incl_dhcp : std_logic;
+ signal flow_state : std_logic_vector(3 downto 0);
signal selector_debug : std_logic_vector(63 downto 0);
begin
--- unique_id <= MC_UNIQUE_ID_IN;
-
protocol_selector : entity work.trb_net16_gbe_protocol_selector
generic map(
RX_PATH_ENABLE => RX_PATH_ENABLE,
CFG_MAX_SINGLE_SUB_IN => CFG_MAX_SINGLE_SUB_IN,
CFG_ADDITIONAL_HDR_IN => CFG_ADDITIONAL_HDR_IN,
CFG_MAX_REPLY_SIZE_IN => CFG_MAX_REPLY_SIZE_IN,
+ CFG_AUTO_THROTTLE_IN => CFG_AUTO_THROTTLE_IN,
+ CFG_THROTTLE_PAUSE_IN => CFG_THROTTLE_PAUSE_IN,
-- input for statistics from outside
STAT_DATA_IN => stat_data,
MONITOR_SELECT_GEN_DBG_OUT => MONITOR_SELECT_GEN_DBG_OUT,
DATA_HIST_OUT => DATA_HIST_OUT,
SCTRL_HIST_OUT => SCTRL_HIST_OUT,
- DEBUG_OUT => selector_debug
+ DEBUG_OUT => selector_debug
);
TC_DATA_OUT <= tc_data;
-- END OF LINK STATE CONTROL
--*************
- --*************
- -- GENERATE MAC_ADDRESS
- --g_MY_MAC <= unique_id(31 downto 8) & x"be0002";
--- MC_MY_MAC_OUT <= unique_id(31 downto 8) & x"be0002";
-
- --*************
-
- --****************
- -- TRI SPEED MAC CONTROLLER
-
- --TSMAC_CONTROLLER : trb_net16_gbe_mac_control
- --port map(
- -- CLK => CLK,
- -- RESET => MC_RESET_LINK_IN,
- --
- ---- signals to/from main controller
- -- MC_TSMAC_READY_OUT => tsm_ready,
- -- MC_RECONF_IN => tsm_reconf,
- -- MC_GBE_EN_IN => '1',
- -- MC_RX_DISCARD_FCS => '0',
- -- MC_PROMISC_IN => '1',
- -- MC_MAC_ADDR_IN => g_MY_MAC, --x"001122334455",
- --
- ---- signal to/from Host interface of TriSpeed MAC
- -- TSM_HADDR_OUT => tsm_haddr,
- -- TSM_HDATA_OUT => tsm_hdata,
- -- TSM_HCS_N_OUT => tsm_hcs_n,
- -- TSM_HWRITE_N_OUT => tsm_hwrite_n,
- -- TSM_HREAD_N_OUT => tsm_hread_n,
- -- TSM_HREADY_N_IN => TSM_HREADY_N_IN,
- -- TSM_HDATA_EN_N_IN => TSM_HDATA_EN_N_IN,
- --
- -- DEBUG_OUT => open
- --);
-
- --DEBUG_OUT <= mac_control_debug;
process(CLK)
begin
if rising_edge(CLK) then
process(CLK)
begin
if rising_edge(CLK) then
- DEBUG_OUT(3 downto 0) <= redirect_state;
- DEBUG_OUT(7 downto 4) <= flow_state;
- DEBUG_OUT(11 downto 8) <= link_state;
+ DEBUG_OUT(3 downto 0) <= redirect_state;
+ DEBUG_OUT(7 downto 4) <= flow_state;
+ DEBUG_OUT(11 downto 8) <= link_state;
DEBUG_OUT(31 downto 12) <= (others => '0');
-
+
DEBUG_OUT(63 downto 32) <= selector_debug(31 downto 0);
end if;
end process;
entity trb_net16_gbe_protocol_selector is
generic(
- RX_PATH_ENABLE : integer range 0 to 1 := 1;
- DO_SIMULATION : integer range 0 to 1 := 0;
-
- INCLUDE_READOUT : std_logic := '0';
- INCLUDE_SLOWCTRL : std_logic := '0';
- INCLUDE_DHCP : std_logic := '0';
- INCLUDE_ARP : std_logic := '0';
- INCLUDE_PING : std_logic := '0';
-
- READOUT_BUFFER_SIZE : integer range 1 to 4;
- SLOWCTRL_BUFFER_SIZE : integer range 1 to 4
+ RX_PATH_ENABLE : integer range 0 to 1 := 1;
+ DO_SIMULATION : integer range 0 to 1 := 0;
+ INCLUDE_READOUT : std_logic := '0';
+ INCLUDE_SLOWCTRL : std_logic := '0';
+ INCLUDE_DHCP : std_logic := '0';
+ INCLUDE_ARP : std_logic := '0';
+ INCLUDE_PING : std_logic := '0';
+ READOUT_BUFFER_SIZE : integer range 1 to 4;
+ SLOWCTRL_BUFFER_SIZE : integer range 1 to 4
);
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
- RESET_FOR_DHCP : in std_logic;
-
--- signals to/from main controller
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_PROTO_SELECT_IN : in std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
- PS_BUSY_OUT : out std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
- PS_FRAME_SIZE_IN : in std_logic_vector(15 downto 0);
- PS_RESPONSE_READY_OUT : out std_logic;
-
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
--- singals to/from transmit controller with constructed response
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_RD_EN_IN : in std_logic;
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_IDENT_OUT : out std_logic_vector(15 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-
- MC_BUSY_IN : in std_logic;
-
- -- misc signals for response constructors
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_OUT : out std_logic_vector(31 downto 0);
- DHCP_START_IN : in std_logic;
- DHCP_DONE_OUT : out std_logic;
-
- GSC_CLK_IN : in std_logic;
- GSC_INIT_DATAREADY_OUT : out std_logic;
- GSC_INIT_DATA_OUT : out std_logic_vector(15 downto 0);
- GSC_INIT_PACKET_NUM_OUT : out std_logic_vector(2 downto 0);
- GSC_INIT_READ_IN : in std_logic;
- GSC_REPLY_DATAREADY_IN : in std_logic;
- GSC_REPLY_DATA_IN : in std_logic_vector(15 downto 0);
- GSC_REPLY_PACKET_NUM_IN : in std_logic_vector(2 downto 0);
- GSC_REPLY_READ_OUT : out std_logic;
- GSC_BUSY_IN : in std_logic;
-
- MAKE_RESET_OUT : out std_logic;
-
- -- signal for data readout
+ port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+ RESET_FOR_DHCP : in std_logic;
+
+ -- signals to/from main controller
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_PROTO_SELECT_IN : in std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ PS_BUSY_OUT : out std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ PS_FRAME_SIZE_IN : in std_logic_vector(15 downto 0);
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+
+ -- singals to/from transmit controller with constructed response
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_RD_EN_IN : in std_logic;
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_IDENT_OUT : out std_logic_vector(15 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
+ MC_BUSY_IN : in std_logic;
+
+ -- misc signals for response constructors
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_OUT : out std_logic_vector(31 downto 0);
+ DHCP_START_IN : in std_logic;
+ DHCP_DONE_OUT : out std_logic;
+ GSC_CLK_IN : in std_logic;
+ GSC_INIT_DATAREADY_OUT : out std_logic;
+ GSC_INIT_DATA_OUT : out std_logic_vector(15 downto 0);
+ GSC_INIT_PACKET_NUM_OUT : out std_logic_vector(2 downto 0);
+ GSC_INIT_READ_IN : in std_logic;
+ GSC_REPLY_DATAREADY_IN : in std_logic;
+ GSC_REPLY_DATA_IN : in std_logic_vector(15 downto 0);
+ GSC_REPLY_PACKET_NUM_IN : in std_logic_vector(2 downto 0);
+ GSC_REPLY_READ_OUT : out std_logic;
+ GSC_BUSY_IN : in std_logic;
+ MAKE_RESET_OUT : out std_logic;
+
+ -- signal for data readout
-- CTS interface
- CTS_NUMBER_IN : in std_logic_vector (15 downto 0);
- CTS_CODE_IN : in std_logic_vector (7 downto 0);
- CTS_INFORMATION_IN : in std_logic_vector (7 downto 0);
- CTS_READOUT_TYPE_IN : in std_logic_vector (3 downto 0);
- CTS_START_READOUT_IN : in std_logic;
- CTS_DATA_OUT : out std_logic_vector (31 downto 0);
- CTS_DATAREADY_OUT : out std_logic;
- CTS_READOUT_FINISHED_OUT : out std_logic;
- CTS_READ_IN : in std_logic;
- CTS_LENGTH_OUT : out std_logic_vector (15 downto 0);
- CTS_ERROR_PATTERN_OUT : out std_logic_vector (31 downto 0);
- -- Data payload interface
- FEE_DATA_IN : in std_logic_vector (15 downto 0);
- FEE_DATAREADY_IN : in std_logic;
- FEE_READ_OUT : out std_logic;
- FEE_STATUS_BITS_IN : in std_logic_vector (31 downto 0);
- FEE_BUSY_IN : in std_logic;
- -- ip configurator
- SLV_ADDR_IN : in std_logic_vector(7 downto 0);
- SLV_READ_IN : in std_logic;
- SLV_WRITE_IN : in std_logic;
- SLV_BUSY_OUT : out std_logic;
- SLV_ACK_OUT : out std_logic;
- SLV_DATA_IN : in std_logic_vector(31 downto 0);
- SLV_DATA_OUT : out std_logic_vector(31 downto 0);
-
- CFG_GBE_ENABLE_IN : in std_logic;
- CFG_IPU_ENABLE_IN : in std_logic;
- CFG_MULT_ENABLE_IN : in std_logic;
- CFG_SUBEVENT_ID_IN : in std_logic_vector(31 downto 0);
- CFG_SUBEVENT_DEC_IN : in std_logic_vector(31 downto 0);
- CFG_QUEUE_DEC_IN : in std_logic_vector(31 downto 0);
- CFG_READOUT_CTR_IN : in std_logic_vector(23 downto 0);
- CFG_READOUT_CTR_VALID_IN : in std_logic;
- CFG_INSERT_TTYPE_IN : in std_logic;
- CFG_MAX_SUB_IN : in std_logic_vector(15 downto 0);
- CFG_MAX_QUEUE_IN : in std_logic_vector(15 downto 0);
- CFG_MAX_SUBS_IN_QUEUE_IN : in std_logic_vector(15 downto 0);
- CFG_MAX_SINGLE_SUB_IN : in std_logic_vector(15 downto 0);
-
- CFG_ADDITIONAL_HDR_IN : in std_logic;
- CFG_MAX_REPLY_SIZE_IN : in std_logic_vector(31 downto 0);
-
- -- input for statistics from outside
- STAT_DATA_IN : in std_logic_vector(31 downto 0);
- STAT_ADDR_IN : in std_logic_vector(7 downto 0);
- STAT_DATA_RDY_IN : in std_logic;
- STAT_DATA_ACK_OUT : out std_logic;
-
- MONITOR_SELECT_REC_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_SENT_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_DROP_IN_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_DROP_OUT_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
- MONITOR_SELECT_GEN_DBG_OUT : out std_logic_vector(2*c_MAX_PROTOCOLS * 32 - 1 downto 0);
-
- DATA_HIST_OUT : out hist_array;
- SCTRL_HIST_OUT : out hist_array;
-
- DEBUG_OUT : out std_logic_vector(63 downto 0)
-);
+ CTS_NUMBER_IN : in std_logic_vector(15 downto 0);
+ CTS_CODE_IN : in std_logic_vector(7 downto 0);
+ CTS_INFORMATION_IN : in std_logic_vector(7 downto 0);
+ CTS_READOUT_TYPE_IN : in std_logic_vector(3 downto 0);
+ CTS_START_READOUT_IN : in std_logic;
+ CTS_DATA_OUT : out std_logic_vector(31 downto 0);
+ CTS_DATAREADY_OUT : out std_logic;
+ CTS_READOUT_FINISHED_OUT : out std_logic;
+ CTS_READ_IN : in std_logic;
+ CTS_LENGTH_OUT : out std_logic_vector(15 downto 0);
+ CTS_ERROR_PATTERN_OUT : out std_logic_vector(31 downto 0);
+ -- Data payload interface
+ FEE_DATA_IN : in std_logic_vector(15 downto 0);
+ FEE_DATAREADY_IN : in std_logic;
+ FEE_READ_OUT : out std_logic;
+ FEE_STATUS_BITS_IN : in std_logic_vector(31 downto 0);
+ FEE_BUSY_IN : in std_logic;
+ -- ip configurator
+ SLV_ADDR_IN : in std_logic_vector(7 downto 0);
+ SLV_READ_IN : in std_logic;
+ SLV_WRITE_IN : in std_logic;
+ SLV_BUSY_OUT : out std_logic;
+ SLV_ACK_OUT : out std_logic;
+ SLV_DATA_IN : in std_logic_vector(31 downto 0);
+ SLV_DATA_OUT : out std_logic_vector(31 downto 0);
+ CFG_GBE_ENABLE_IN : in std_logic;
+ CFG_IPU_ENABLE_IN : in std_logic;
+ CFG_MULT_ENABLE_IN : in std_logic;
+ CFG_SUBEVENT_ID_IN : in std_logic_vector(31 downto 0);
+ CFG_SUBEVENT_DEC_IN : in std_logic_vector(31 downto 0);
+ CFG_QUEUE_DEC_IN : in std_logic_vector(31 downto 0);
+ CFG_READOUT_CTR_IN : in std_logic_vector(23 downto 0);
+ CFG_READOUT_CTR_VALID_IN : in std_logic;
+ CFG_INSERT_TTYPE_IN : in std_logic;
+ CFG_MAX_SUB_IN : in std_logic_vector(15 downto 0);
+ CFG_MAX_QUEUE_IN : in std_logic_vector(15 downto 0);
+ CFG_MAX_SUBS_IN_QUEUE_IN : in std_logic_vector(15 downto 0);
+ CFG_MAX_SINGLE_SUB_IN : in std_logic_vector(15 downto 0);
+ CFG_ADDITIONAL_HDR_IN : in std_logic;
+ CFG_MAX_REPLY_SIZE_IN : in std_logic_vector(31 downto 0);
+ CFG_AUTO_THROTTLE_IN : in std_logic;
+ CFG_THROTTLE_PAUSE_IN : in std_logic_vector(15 downto 0);
+
+ -- input for statistics from outside
+ STAT_DATA_IN : in std_logic_vector(31 downto 0);
+ STAT_ADDR_IN : in std_logic_vector(7 downto 0);
+ STAT_DATA_RDY_IN : in std_logic;
+ STAT_DATA_ACK_OUT : out std_logic;
+ MONITOR_SELECT_REC_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
+ MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
+ MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
+ MONITOR_SELECT_SENT_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
+ MONITOR_SELECT_DROP_IN_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
+ MONITOR_SELECT_DROP_OUT_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
+ MONITOR_SELECT_GEN_DBG_OUT : out std_logic_vector(2 * c_MAX_PROTOCOLS * 32 - 1 downto 0);
+ DATA_HIST_OUT : out hist_array;
+ SCTRL_HIST_OUT : out hist_array;
+ DEBUG_OUT : out std_logic_vector(63 downto 0)
+ );
end trb_net16_gbe_protocol_selector;
-
architecture trb_net16_gbe_protocol_selector of trb_net16_gbe_protocol_selector is
---attribute HGROUP : string;
---attribute HGROUP of trb_net16_gbe_protocol_selector : architecture is "GBE_MAIN_group";
+ --attribute HGROUP : string;
+ --attribute HGROUP of trb_net16_gbe_protocol_selector : architecture is "GBE_MAIN_group";
+
+ attribute syn_encoding : string;
+
+ signal rd_en : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ signal resp_ready : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ signal tc_wr : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ signal tc_data : std_logic_vector(c_MAX_PROTOCOLS * 9 - 1 downto 0);
+ signal tc_size : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
+ signal tc_type : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
+ signal busy : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ signal selected : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ signal tc_mac : std_logic_vector(c_MAX_PROTOCOLS * 48 - 1 downto 0);
+ signal tc_ip : std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
+ signal tc_udp : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
+ signal tc_src_mac : std_logic_vector(c_MAX_PROTOCOLS * 48 - 1 downto 0);
+ signal tc_src_ip : std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
+ signal tc_src_udp : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
+ signal tc_ip_proto : std_logic_vector(c_MAX_PROTOCOLS * 8 - 1 downto 0);
+
+ -- plus 1 is for the outside
+ signal stat_data : std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
+ signal stat_addr : std_logic_vector(c_MAX_PROTOCOLS * 8 - 1 downto 0);
+ signal stat_rdy : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ signal stat_ack : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ signal tc_ip_size : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
+ signal tc_udp_size : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
+ signal tc_size_left : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
+ signal tc_flags_size : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
+
+ signal tc_data_not_valid : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+
+ type select_states is (IDLE, LOOP_OVER, SELECT_ONE, PROCESS_REQUEST, CLEANUP);
+ signal select_current_state, select_next_state : select_states;
+ attribute syn_encoding of select_current_state : signal is "onehot";
+
+ signal state : std_logic_vector(3 downto 0);
+ signal index : integer range 0 to c_MAX_PROTOCOLS - 1;
+
+ signal mult : std_logic;
+
+ signal tc_ident : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
+ signal zeros : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+
+ attribute syn_preserve : boolean;
+ attribute syn_keep : boolean;
+ attribute syn_keep of state, mult : signal is true;
+ attribute syn_preserve of state, mult : signal is true;
+
+ signal my_ip : std_logic_vector(31 downto 0);
+ signal select_state : std_logic_vector(3 downto 0);
-attribute syn_encoding : string;
-
-signal rd_en : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
-signal resp_ready : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
-signal tc_wr : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
-signal tc_data : std_logic_vector(c_MAX_PROTOCOLS * 9 - 1 downto 0);
-signal tc_size : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
-signal tc_type : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
-signal busy : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
-signal selected : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
-signal tc_mac : std_logic_vector(c_MAX_PROTOCOLS * 48 - 1 downto 0);
-signal tc_ip : std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
-signal tc_udp : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
-signal tc_src_mac : std_logic_vector(c_MAX_PROTOCOLS * 48 - 1 downto 0);
-signal tc_src_ip : std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
-signal tc_src_udp : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
-signal tc_ip_proto : std_logic_vector(c_MAX_PROTOCOLS * 8 - 1 downto 0);
+begin
+ zeros <= (others => '0');
--- plus 1 is for the outside
-signal stat_data : std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
-signal stat_addr : std_logic_vector(c_MAX_PROTOCOLS * 8 - 1 downto 0);
-signal stat_rdy : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
-signal stat_ack : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
-signal tc_ip_size : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
-signal tc_udp_size : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
-signal tc_size_left : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
-signal tc_flags_size : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
+ arp_gen : if INCLUDE_ARP = '1' generate
+ -- protocol Nr. 1 ARP
+ ARP : trb_net16_gbe_response_constructor_ARP
+ generic map(STAT_ADDRESS_BASE => 6
+ )
+ port map(
+ CLK => CLK,
+ RESET => RESET,
+
+ -- INTERFACE
+ MY_MAC_IN => MY_MAC_IN,
+ MY_IP_IN => my_ip,
+ PS_DATA_IN => PS_DATA_IN,
+ PS_WR_EN_IN => PS_WR_EN_IN,
+ PS_ACTIVATE_IN => PS_PROTO_SELECT_IN(0),
+ PS_RESPONSE_READY_OUT => resp_ready(0),
+ PS_BUSY_OUT => busy(0),
+ PS_SELECTED_IN => selected(0),
+ PS_SRC_MAC_ADDRESS_IN => PS_SRC_MAC_ADDRESS_IN,
+ PS_DEST_MAC_ADDRESS_IN => PS_DEST_MAC_ADDRESS_IN,
+ PS_SRC_IP_ADDRESS_IN => PS_SRC_IP_ADDRESS_IN,
+ PS_DEST_IP_ADDRESS_IN => PS_DEST_IP_ADDRESS_IN,
+ PS_SRC_UDP_PORT_IN => PS_SRC_UDP_PORT_IN,
+ PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,
+ TC_RD_EN_IN => TC_RD_EN_IN,
+ TC_DATA_OUT => tc_data(1 * 9 - 1 downto 0 * 9),
+ TC_FRAME_SIZE_OUT => tc_size(1 * 16 - 1 downto 0 * 16),
+ TC_FRAME_TYPE_OUT => tc_type(1 * 16 - 1 downto 0 * 16),
+ TC_IP_PROTOCOL_OUT => tc_ip_proto(1 * 8 - 1 downto 0 * 8),
+ TC_IDENT_OUT => tc_ident(1 * 16 - 1 downto 0 * 16),
+ TC_DEST_MAC_OUT => tc_mac(1 * 48 - 1 downto 0 * 48),
+ TC_DEST_IP_OUT => tc_ip(1 * 32 - 1 downto 0 * 32),
+ TC_DEST_UDP_OUT => tc_udp(1 * 16 - 1 downto 0 * 16),
+ TC_SRC_MAC_OUT => tc_src_mac(1 * 48 - 1 downto 0 * 48),
+ TC_SRC_IP_OUT => tc_src_ip(1 * 32 - 1 downto 0 * 32),
+ TC_SRC_UDP_OUT => tc_src_udp(1 * 16 - 1 downto 0 * 16),
+ STAT_DATA_OUT => stat_data(1 * 32 - 1 downto 0 * 32),
+ STAT_ADDR_OUT => stat_addr(1 * 8 - 1 downto 0 * 8),
+ STAT_DATA_RDY_OUT => stat_rdy(0),
+ STAT_DATA_ACK_IN => stat_ack(0),
+ RECEIVED_FRAMES_OUT => open, --RECEIVED_FRAMES_OUT(1 * 16 - 1 downto 0 * 16),
+ SENT_FRAMES_OUT => open, --SENT_FRAMES_OUT(1 * 16 - 1 downto 0 * 16),
+ DEBUG_OUT => MONITOR_SELECT_GEN_DBG_OUT(1 * 64 - 1 downto 0 * 64) --PROTOS_DEBUG_OUT(1 * 32 - 1 downto 0 * 32)
+ -- END OF INTERFACE
+ );
+ end generate arp_gen;
+
+ no_arp_gen : if INCLUDE_ARP = '0' generate
+ resp_ready(0) <= '0';
+ busy(0) <= '0';
+ end generate no_arp_gen;
+
+ dhcp_gen : if INCLUDE_DHCP = '1' generate
+ -- protocol No. 2 DHCP
+ DHCP : trb_net16_gbe_response_constructor_DHCP
+ generic map(
+ STAT_ADDRESS_BASE => 0,
+ DO_SIMULATION => DO_SIMULATION
+ )
+ port map(
+ CLK => CLK,
+ RESET => RESET_FOR_DHCP, --RESET,
+
+ -- INTERFACE
+ MY_MAC_IN => MY_MAC_IN,
+ MY_IP_IN => my_ip,
+ PS_DATA_IN => PS_DATA_IN,
+ PS_WR_EN_IN => PS_WR_EN_IN,
+ PS_ACTIVATE_IN => PS_PROTO_SELECT_IN(1),
+ PS_RESPONSE_READY_OUT => resp_ready(1),
+ PS_BUSY_OUT => busy(1),
+ PS_SELECTED_IN => selected(1),
+ PS_SRC_MAC_ADDRESS_IN => PS_SRC_MAC_ADDRESS_IN,
+ PS_DEST_MAC_ADDRESS_IN => PS_DEST_MAC_ADDRESS_IN,
+ PS_SRC_IP_ADDRESS_IN => PS_SRC_IP_ADDRESS_IN,
+ PS_DEST_IP_ADDRESS_IN => PS_DEST_IP_ADDRESS_IN,
+ PS_SRC_UDP_PORT_IN => PS_SRC_UDP_PORT_IN,
+ PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,
+ TC_RD_EN_IN => TC_RD_EN_IN,
+ TC_DATA_OUT => tc_data(2 * 9 - 1 downto 1 * 9),
+ TC_FRAME_SIZE_OUT => tc_size(2 * 16 - 1 downto 1 * 16),
+ TC_FRAME_TYPE_OUT => tc_type(2 * 16 - 1 downto 1 * 16),
+ TC_IP_PROTOCOL_OUT => tc_ip_proto(2 * 8 - 1 downto 1 * 8),
+ TC_IDENT_OUT => tc_ident(2 * 16 - 1 downto 1 * 16),
+ TC_DEST_MAC_OUT => tc_mac(2 * 48 - 1 downto 1 * 48),
+ TC_DEST_IP_OUT => tc_ip(2 * 32 - 1 downto 1 * 32),
+ TC_DEST_UDP_OUT => tc_udp(2 * 16 - 1 downto 1 * 16),
+ TC_SRC_MAC_OUT => tc_src_mac(2 * 48 - 1 downto 1 * 48),
+ TC_SRC_IP_OUT => tc_src_ip(2 * 32 - 1 downto 1 * 32),
+ TC_SRC_UDP_OUT => tc_src_udp(2 * 16 - 1 downto 1 * 16),
+ STAT_DATA_OUT => stat_data(2 * 32 - 1 downto 1 * 32),
+ STAT_ADDR_OUT => stat_addr(2 * 8 - 1 downto 1 * 8),
+ STAT_DATA_RDY_OUT => stat_rdy(1),
+ STAT_DATA_ACK_IN => stat_ack(1),
+ RECEIVED_FRAMES_OUT => open, --RECEIVED_FRAMES_OUT(2 * 16 - 1 downto 1 * 16),
+ SENT_FRAMES_OUT => open, --SENT_FRAMES_OUT(2 * 16 - 1 downto 1 * 16),
+ -- END OF INTERFACE
+
+ MY_IP_OUT => my_ip,
+ DHCP_START_IN => DHCP_START_IN,
+ DHCP_DONE_OUT => DHCP_DONE_OUT,
+ DEBUG_OUT => MONITOR_SELECT_GEN_DBG_OUT(2 * 64 - 1 downto 1 * 64) --PROTOS_DEBUG_OUT(1 * 32 - 1 downto 0 * 32)
+ );
+ end generate dhcp_gen;
+
+ no_dhcp_gen : if INCLUDE_DHCP = '0' generate
+ resp_ready(1) <= '0';
+ busy(1) <= '0';
+ end generate no_dhcp_gen;
+
+ ping_gen : if INCLUDE_PING = '1' generate
+ --protocol No. 3 Ping
+ Ping : trb_net16_gbe_response_constructor_Ping
+ generic map(STAT_ADDRESS_BASE => 3
+ )
+ port map(
+ CLK => CLK,
+ RESET => RESET,
+
+ ---- INTERFACE
+ MY_MAC_IN => MY_MAC_IN,
+ MY_IP_IN => my_ip,
+ PS_DATA_IN => PS_DATA_IN,
+ PS_WR_EN_IN => PS_WR_EN_IN,
+ PS_ACTIVATE_IN => PS_PROTO_SELECT_IN(4),
+ PS_RESPONSE_READY_OUT => resp_ready(4),
+ PS_BUSY_OUT => busy(4),
+ PS_SELECTED_IN => selected(4),
+ PS_SRC_MAC_ADDRESS_IN => PS_SRC_MAC_ADDRESS_IN,
+ PS_DEST_MAC_ADDRESS_IN => PS_DEST_MAC_ADDRESS_IN,
+ PS_SRC_IP_ADDRESS_IN => PS_SRC_IP_ADDRESS_IN,
+ PS_DEST_IP_ADDRESS_IN => PS_DEST_IP_ADDRESS_IN,
+ PS_SRC_UDP_PORT_IN => PS_SRC_UDP_PORT_IN,
+ PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,
+ TC_RD_EN_IN => TC_RD_EN_IN,
+ TC_DATA_OUT => tc_data(5 * 9 - 1 downto 4 * 9),
+ TC_FRAME_SIZE_OUT => tc_size(5 * 16 - 1 downto 4 * 16),
+ TC_FRAME_TYPE_OUT => tc_type(5 * 16 - 1 downto 4 * 16),
+ TC_IP_PROTOCOL_OUT => tc_ip_proto(5 * 8 - 1 downto 4 * 8),
+ TC_IDENT_OUT => tc_ident(5 * 16 - 1 downto 4 * 16),
+ TC_DEST_MAC_OUT => tc_mac(5 * 48 - 1 downto 4 * 48),
+ TC_DEST_IP_OUT => tc_ip(5 * 32 - 1 downto 4 * 32),
+ TC_DEST_UDP_OUT => tc_udp(5 * 16 - 1 downto 4 * 16),
+ TC_SRC_MAC_OUT => tc_src_mac(5 * 48 - 1 downto 4 * 48),
+ TC_SRC_IP_OUT => tc_src_ip(5 * 32 - 1 downto 4 * 32),
+ TC_SRC_UDP_OUT => tc_src_udp(5 * 16 - 1 downto 4 * 16),
+ STAT_DATA_OUT => open,
+ STAT_ADDR_OUT => open,
+ STAT_DATA_RDY_OUT => open,
+ STAT_DATA_ACK_IN => '0',
+ RECEIVED_FRAMES_OUT => open,
+ SENT_FRAMES_OUT => open,
+ DEBUG_OUT => MONITOR_SELECT_GEN_DBG_OUT(5 * 64 - 1 downto 4 * 64)
+ -- END OF INTERFACE
+ );
+ end generate ping_gen;
+
+ no_ping_gen : if INCLUDE_PING = '0' generate
+ resp_ready(4) <= '0';
+ busy(4) <= '0';
+ end generate no_ping_gen;
+
+ sctrl_gen : if INCLUDE_SLOWCTRL = '1' generate
+ SCTRL : trb_net16_gbe_response_constructor_SCTRL
+ generic map(STAT_ADDRESS_BASE => 8,
+ SLOWCTRL_BUFFER_SIZE => SLOWCTRL_BUFFER_SIZE
+ )
+ port map(
+ CLK => CLK,
+ RESET => RESET,
+
+ -- INTERFACE
+ MY_MAC_IN => MY_MAC_IN,
+ MY_IP_IN => my_ip,
+ PS_DATA_IN => PS_DATA_IN,
+ PS_WR_EN_IN => PS_WR_EN_IN,
+ PS_ACTIVATE_IN => PS_PROTO_SELECT_IN(2),
+ PS_RESPONSE_READY_OUT => resp_ready(2),
+ PS_BUSY_OUT => busy(2),
+ PS_SELECTED_IN => selected(2),
+ PS_SRC_MAC_ADDRESS_IN => PS_SRC_MAC_ADDRESS_IN,
+ PS_DEST_MAC_ADDRESS_IN => PS_DEST_MAC_ADDRESS_IN,
+ PS_SRC_IP_ADDRESS_IN => PS_SRC_IP_ADDRESS_IN,
+ PS_DEST_IP_ADDRESS_IN => PS_DEST_IP_ADDRESS_IN,
+ PS_SRC_UDP_PORT_IN => PS_SRC_UDP_PORT_IN,
+ PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,
+ TC_RD_EN_IN => TC_RD_EN_IN,
+ TC_DATA_OUT => tc_data(3 * 9 - 1 downto 2 * 9),
+ TC_FRAME_SIZE_OUT => tc_size(3 * 16 - 1 downto 2 * 16),
+ TC_FRAME_TYPE_OUT => tc_type(3 * 16 - 1 downto 2 * 16),
+ TC_IP_PROTOCOL_OUT => tc_ip_proto(3 * 8 - 1 downto 2 * 8),
+ TC_IDENT_OUT => tc_ident(3 * 16 - 1 downto 2 * 16),
+ TC_DEST_MAC_OUT => tc_mac(3 * 48 - 1 downto 2 * 48),
+ TC_DEST_IP_OUT => tc_ip(3 * 32 - 1 downto 2 * 32),
+ TC_DEST_UDP_OUT => tc_udp(3 * 16 - 1 downto 2 * 16),
+ TC_SRC_MAC_OUT => tc_src_mac(3 * 48 - 1 downto 2 * 48),
+ TC_SRC_IP_OUT => tc_src_ip(3 * 32 - 1 downto 2 * 32),
+ TC_SRC_UDP_OUT => tc_src_udp(3 * 16 - 1 downto 2 * 16),
+ STAT_DATA_OUT => stat_data(3 * 32 - 1 downto 2 * 32),
+ STAT_ADDR_OUT => stat_addr(3 * 8 - 1 downto 2 * 8),
+ STAT_DATA_RDY_OUT => stat_rdy(2),
+ STAT_DATA_ACK_IN => stat_ack(2),
+ DEBUG_OUT => MONITOR_SELECT_GEN_DBG_OUT(3 * 64 - 1 downto 2 * 64),
+ -- END OF INTERFACE
+
+ GSC_CLK_IN => GSC_CLK_IN,
+ GSC_INIT_DATAREADY_OUT => GSC_INIT_DATAREADY_OUT,
+ GSC_INIT_DATA_OUT => GSC_INIT_DATA_OUT,
+ GSC_INIT_PACKET_NUM_OUT => GSC_INIT_PACKET_NUM_OUT,
+ GSC_INIT_READ_IN => GSC_INIT_READ_IN,
+ GSC_REPLY_DATAREADY_IN => GSC_REPLY_DATAREADY_IN,
+ GSC_REPLY_DATA_IN => GSC_REPLY_DATA_IN,
+ GSC_REPLY_PACKET_NUM_IN => GSC_REPLY_PACKET_NUM_IN,
+ GSC_REPLY_READ_OUT => GSC_REPLY_READ_OUT,
+ GSC_BUSY_IN => GSC_BUSY_IN,
+ CFG_ADDITIONAL_HDR_IN => CFG_ADDITIONAL_HDR_IN,
+ CFG_MAX_REPLY_SIZE_IN => CFG_MAX_REPLY_SIZE_IN,
+ MAKE_RESET_OUT => MAKE_RESET_OUT,
+ MONITOR_SELECT_REC_OUT => MONITOR_SELECT_REC_OUT(3 * 32 - 1 downto 2 * 32),
+ MONITOR_SELECT_REC_BYTES_OUT => MONITOR_SELECT_REC_BYTES_OUT(3 * 32 - 1 downto 2 * 32),
+ MONITOR_SELECT_SENT_BYTES_OUT => MONITOR_SELECT_SENT_BYTES_OUT(3 * 32 - 1 downto 2 * 32),
+ MONITOR_SELECT_SENT_OUT => MONITOR_SELECT_SENT_OUT(3 * 32 - 1 downto 2 * 32),
+ DATA_HIST_OUT => SCTRL_HIST_OUT
+ );
+ end generate sctrl_gen;
+
+ no_sctrl_gen : if INCLUDE_SLOWCTRL = '0' generate
+ resp_ready(2) <= '0';
+ busy(2) <= '0';
+ MAKE_RESET_OUT <= '0';
+
+ GSC_INIT_DATAREADY_OUT <= '0';
+ GSC_INIT_DATA_OUT <= (others => '0');
+ GSC_INIT_PACKET_NUM_OUT <= (others => '0');
+ GSC_REPLY_READ_OUT <= '1';
+
+ end generate no_sctrl_gen;
+
+ trbnet_gen : if INCLUDE_READOUT = '1' generate
+ TrbNetData : trb_net16_gbe_response_constructor_TrbNetData
+ generic map(
+ RX_PATH_ENABLE => RX_PATH_ENABLE,
+ DO_SIMULATION => DO_SIMULATION,
+ READOUT_BUFFER_SIZE => READOUT_BUFFER_SIZE
+ )
+ port map(
+ CLK => CLK,
+ RESET => RESET,
+
+ -- INTERFACE
+ MY_MAC_IN => MY_MAC_IN,
+ MY_IP_IN => my_ip,
+ PS_DATA_IN => PS_DATA_IN,
+ PS_WR_EN_IN => PS_WR_EN_IN,
+ PS_ACTIVATE_IN => PS_PROTO_SELECT_IN(3),
+ PS_RESPONSE_READY_OUT => resp_ready(3),
+ PS_BUSY_OUT => busy(3),
+ PS_SELECTED_IN => selected(3),
+ PS_SRC_MAC_ADDRESS_IN => PS_SRC_MAC_ADDRESS_IN,
+ PS_DEST_MAC_ADDRESS_IN => PS_DEST_MAC_ADDRESS_IN,
+ PS_SRC_IP_ADDRESS_IN => PS_SRC_IP_ADDRESS_IN,
+ PS_DEST_IP_ADDRESS_IN => PS_DEST_IP_ADDRESS_IN,
+ PS_SRC_UDP_PORT_IN => PS_SRC_UDP_PORT_IN,
+ PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,
+ TC_RD_EN_IN => TC_RD_EN_IN,
+ TC_DATA_OUT => tc_data(4 * 9 - 1 downto 3 * 9),
+ TC_FRAME_SIZE_OUT => tc_size(4 * 16 - 1 downto 3 * 16),
+ TC_FRAME_TYPE_OUT => tc_type(4 * 16 - 1 downto 3 * 16),
+ TC_IP_PROTOCOL_OUT => tc_ip_proto(4 * 8 - 1 downto 3 * 8),
+ TC_IDENT_OUT => tc_ident(4 * 16 - 1 downto 3 * 16),
+ TC_DEST_MAC_OUT => tc_mac(4 * 48 - 1 downto 3 * 48),
+ TC_DEST_IP_OUT => tc_ip(4 * 32 - 1 downto 3 * 32),
+ TC_DEST_UDP_OUT => tc_udp(4 * 16 - 1 downto 3 * 16),
+ TC_SRC_MAC_OUT => tc_src_mac(4 * 48 - 1 downto 3 * 48),
+ TC_SRC_IP_OUT => tc_src_ip(4 * 32 - 1 downto 3 * 32),
+ TC_SRC_UDP_OUT => tc_src_udp(4 * 16 - 1 downto 3 * 16),
+ STAT_DATA_OUT => stat_data(4 * 32 - 1 downto 3 * 32),
+ STAT_ADDR_OUT => stat_addr(4 * 8 - 1 downto 3 * 8),
+ STAT_DATA_RDY_OUT => stat_rdy(3),
+ STAT_DATA_ACK_IN => stat_ack(3),
+ DEBUG_OUT => MONITOR_SELECT_GEN_DBG_OUT(4 * 64 - 1 downto 3 * 64),
+ -- END OF INTERFACE
+
+ -- CTS interface
+ CTS_NUMBER_IN => CTS_NUMBER_IN,
+ CTS_CODE_IN => CTS_CODE_IN,
+ CTS_INFORMATION_IN => CTS_INFORMATION_IN,
+ CTS_READOUT_TYPE_IN => CTS_READOUT_TYPE_IN,
+ CTS_START_READOUT_IN => CTS_START_READOUT_IN,
+ CTS_DATA_OUT => CTS_DATA_OUT,
+ CTS_DATAREADY_OUT => CTS_DATAREADY_OUT,
+ CTS_READOUT_FINISHED_OUT => CTS_READOUT_FINISHED_OUT,
+ CTS_READ_IN => CTS_READ_IN,
+ CTS_LENGTH_OUT => CTS_LENGTH_OUT,
+ CTS_ERROR_PATTERN_OUT => CTS_ERROR_PATTERN_OUT,
+ -- Data payload interface
+ FEE_DATA_IN => FEE_DATA_IN,
+ FEE_DATAREADY_IN => FEE_DATAREADY_IN,
+ FEE_READ_OUT => FEE_READ_OUT,
+ FEE_STATUS_BITS_IN => FEE_STATUS_BITS_IN,
+ FEE_BUSY_IN => FEE_BUSY_IN,
+ -- ip configurator
+ SLV_ADDR_IN => SLV_ADDR_IN,
+ SLV_READ_IN => SLV_READ_IN,
+ SLV_WRITE_IN => SLV_WRITE_IN,
+ SLV_BUSY_OUT => SLV_BUSY_OUT,
+ SLV_ACK_OUT => SLV_ACK_OUT,
+ SLV_DATA_IN => SLV_DATA_IN,
+ SLV_DATA_OUT => SLV_DATA_OUT,
+ CFG_GBE_ENABLE_IN => CFG_GBE_ENABLE_IN,
+ CFG_IPU_ENABLE_IN => CFG_IPU_ENABLE_IN,
+ CFG_MULT_ENABLE_IN => CFG_MULT_ENABLE_IN,
+ CFG_SUBEVENT_ID_IN => CFG_SUBEVENT_ID_IN,
+ CFG_SUBEVENT_DEC_IN => CFG_SUBEVENT_DEC_IN,
+ CFG_QUEUE_DEC_IN => CFG_QUEUE_DEC_IN,
+ CFG_READOUT_CTR_IN => CFG_READOUT_CTR_IN,
+ CFG_READOUT_CTR_VALID_IN => CFG_READOUT_CTR_VALID_IN,
+ CFG_INSERT_TTYPE_IN => CFG_INSERT_TTYPE_IN,
+ CFG_MAX_SUB_IN => CFG_MAX_SUB_IN,
+ CFG_MAX_QUEUE_IN => CFG_MAX_QUEUE_IN,
+ CFG_MAX_SUBS_IN_QUEUE_IN => CFG_MAX_SUBS_IN_QUEUE_IN,
+ CFG_MAX_SINGLE_SUB_IN => CFG_MAX_SINGLE_SUB_IN,
+ CFG_AUTO_THROTTLE_IN => CFG_AUTO_THROTTLE_IN,
+ CFG_THROTTLE_PAUSE_IN => CFG_THROTTLE_PAUSE_IN,
+ MONITOR_SELECT_REC_OUT => MONITOR_SELECT_REC_OUT(4 * 32 - 1 downto 3 * 32),
+ MONITOR_SELECT_REC_BYTES_OUT => MONITOR_SELECT_REC_BYTES_OUT(4 * 32 - 1 downto 3 * 32),
+ MONITOR_SELECT_SENT_BYTES_OUT => MONITOR_SELECT_SENT_BYTES_OUT(4 * 32 - 1 downto 3 * 32),
+ MONITOR_SELECT_SENT_OUT => MONITOR_SELECT_SENT_OUT(4 * 32 - 1 downto 3 * 32),
+ MONITOR_SELECT_DROP_OUT_OUT => MONITOR_SELECT_DROP_OUT_OUT(4 * 32 - 1 downto 3 * 32),
+ MONITOR_SELECT_DROP_IN_OUT => open,
+ DATA_HIST_OUT => DATA_HIST_OUT
+ );
+ end generate trbnet_gen;
+
+ no_readout_gen : if INCLUDE_READOUT = '0' generate
+ resp_ready(3) <= '0';
+ busy(3) <= '0';
+ CTS_DATA_OUT <= (others => '0');
+ CTS_DATAREADY_OUT <= '0';
+ CTS_READOUT_FINISHED_OUT <= '0';
+ CTS_LENGTH_OUT <= (others => '0');
+ CTS_ERROR_PATTERN_OUT <= (others => '0');
+ FEE_READ_OUT <= '0';
+ end generate no_readout_gen;
+
+ --stat_gen : if g_SIMULATE = 0 generate
+ --Stat : trb_net16_gbe_response_constructor_Stat
+ --generic map( STAT_ADDRESS_BASE => 10
+ --)
+ --port map (
+ -- CLK => CLK,
+ -- RESET => RESET,
+ --
+ ---- INTERFACE
+ -- PS_DATA_IN => PS_DATA_IN,
+ -- PS_WR_EN_IN => PS_WR_EN_IN,
+ -- PS_ACTIVATE_IN => PS_PROTO_SELECT_IN(4),
+ -- PS_RESPONSE_READY_OUT => resp_ready(4),
+ -- PS_BUSY_OUT => busy(4),
+ -- PS_SELECTED_IN => selected(4),
+ --
+ -- PS_SRC_MAC_ADDRESS_IN => PS_SRC_MAC_ADDRESS_IN,
+ -- PS_DEST_MAC_ADDRESS_IN => PS_DEST_MAC_ADDRESS_IN,
+ -- PS_SRC_IP_ADDRESS_IN => PS_SRC_IP_ADDRESS_IN,
+ -- PS_DEST_IP_ADDRESS_IN => PS_DEST_IP_ADDRESS_IN,
+ -- PS_SRC_UDP_PORT_IN => PS_SRC_UDP_PORT_IN,
+ -- PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,
+ --
+ -- TC_WR_EN_OUT => TC_WR_EN_OUT,
+ -- TC_DATA_OUT => tc_data(5 * 9 - 1 downto 4 * 9),
+ -- TC_FRAME_SIZE_OUT => tc_size(5 * 16 - 1 downto 4 * 16),
+ -- TC_FRAME_TYPE_OUT => tc_type(5 * 16 - 1 downto 4 * 16),
+ -- TC_IP_PROTOCOL_OUT => tc_ip_proto(5 * 8 - 1 downto 4 * 8),
+ --
+ -- TC_DEST_MAC_OUT => tc_mac(5 * 48 - 1 downto 4 * 48),
+ -- TC_DEST_IP_OUT => tc_ip(5 * 32 - 1 downto 4 * 32),
+ -- TC_DEST_UDP_OUT => tc_udp(5 * 16 - 1 downto 4 * 16),
+ -- TC_SRC_MAC_OUT => tc_src_mac(5 * 48 - 1 downto 4 * 48),
+ -- TC_SRC_IP_OUT => tc_src_ip(5 * 32 - 1 downto 4 * 32),
+ -- TC_SRC_UDP_OUT => tc_src_udp(5 * 16 - 1 downto 4 * 16),
+ --
+ -- TC_IP_SIZE_OUT => tc_ip_size(5 * 16 - 1 downto 4 * 16),
+ -- TC_UDP_SIZE_OUT => tc_udp_size(5 * 16 - 1 downto 4 * 16),
+ -- TC_FLAGS_OFFSET_OUT => tc_flags_size(5 * 16 - 1 downto 4 * 16),
+ --
+ -- TC_BUSY_IN => TC_BUSY_IN,
+ --
+ -- STAT_DATA_OUT => stat_data(5 * 32 - 1 downto 4 * 32),
+ -- STAT_ADDR_OUT => stat_addr(5 * 8 - 1 downto 4 * 8),
+ -- STAT_DATA_RDY_OUT => stat_rdy(4),
+ -- STAT_DATA_ACK_IN => stat_ack(4),
+ --
+ -- RECEIVED_FRAMES_OUT => RECEIVED_FRAMES_OUT(5 * 16 - 1 downto 4 * 16),
+ -- SENT_FRAMES_OUT => SENT_FRAMES_OUT(5 * 16 - 1 downto 4 * 16),
+ -- DEBUG_OUT => PROTOS_DEBUG_OUT(5 * 32 - 1 downto 4 * 32),
+ --
+ -- STAT_DATA_IN => stat_data,
+ -- STAT_ADDR_IN => stat_addr,
+ -- STAT_DATA_RDY_IN => stat_rdy,
+ -- STAT_DATA_ACK_OUT => stat_ack
+ --);
+ --end generate;
+
+ --***************
+ -- DO NOT TOUCH, response selection logic
+
+ --stat_data((c_MAX_PROTOCOLS + 1) * 32 - 1 downto c_MAX_PROTOCOLS * 32) <= STAT_DATA_IN;
+ --stat_addr((c_MAX_PROTOCOLS + 1) * 8 - 1 downto c_MAX_PROTOCOLS * 8) <= STAT_ADDR_IN;
+ --stat_rdy(c_MAX_PROTOCOLS) <= STAT_DATA_RDY_IN;
+ --STAT_DATA_ACK_OUT <= stat_ack(c_MAX_PROTOCOLS);
+
+ --mult <= or_all(resp_ready(2 downto 0)); --or_all(resp_ready(2 downto 0)) and or_all(resp_ready(4 downto 3));
+
+ PS_BUSY_OUT <= busy;
+
+ SELECT_MACHINE_PROC : process(RESET, CLK)
+ begin
+ if RESET = '1' then
+ select_current_state <= IDLE;
+ elsif rising_edge(CLK) then
+ -- if (RESET = '1') then
+ -- select_current_state <= IDLE;
+ -- else
+ select_current_state <= select_next_state;
+ -- end if;
+ end if;
+ end process SELECT_MACHINE_PROC;
-signal tc_data_not_valid : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ SELECT_MACHINE : process(select_current_state, MC_BUSY_IN, resp_ready, index, zeros, busy)
+ begin
+ select_state <= x"0";
-type select_states is (IDLE, LOOP_OVER, SELECT_ONE, PROCESS_REQUEST, CLEANUP);
-signal select_current_state, select_next_state : select_states;
-attribute syn_encoding of select_current_state : signal is "onehot";
+ case (select_current_state) is
+ when IDLE =>
+ select_state <= x"1";
+ if (MC_BUSY_IN = '0') then
+ select_next_state <= LOOP_OVER;
+ else
+ select_next_state <= IDLE;
+ end if;
-signal state : std_logic_vector(3 downto 0);
-signal index : integer range 0 to c_MAX_PROTOCOLS - 1;
+ when LOOP_OVER =>
+ select_state <= x"2";
+ if (resp_ready /= zeros) then
+ if (resp_ready(index) = '1') then
+ select_next_state <= SELECT_ONE;
+ elsif (index = c_MAX_PROTOCOLS) then
+ select_next_state <= CLEANUP;
+ else
+ select_next_state <= LOOP_OVER;
+ end if;
+ else
+ select_next_state <= CLEANUP;
+ end if;
-signal mult : std_logic;
+ when SELECT_ONE =>
+ select_state <= x"3";
+ if (MC_BUSY_IN = '1') then
+ select_next_state <= PROCESS_REQUEST;
+ else
+ select_next_state <= SELECT_ONE;
+ end if;
-signal tc_ident : std_logic_vector(c_MAX_PROTOCOLS * 16 - 1 downto 0);
-signal zeros : std_logic_vector(c_MAX_PROTOCOLS - 1 downto 0);
+ when PROCESS_REQUEST =>
+ select_state <= x"4";
+ if (busy(index) = '0') then --if (MC_BUSY_IN = '0') then
+ select_next_state <= CLEANUP;
+ else
+ select_next_state <= PROCESS_REQUEST;
+ end if;
-attribute syn_preserve : boolean;
-attribute syn_keep : boolean;
-attribute syn_keep of state, mult : signal is true;
-attribute syn_preserve of state, mult : signal is true;
+ when CLEANUP =>
+ select_state <= x"5";
+ select_next_state <= IDLE;
-signal my_ip : std_logic_vector(31 downto 0);
-signal select_state : std_logic_vector(3 downto 0);
+ when others => select_next_state <= IDLE;
+ end case;
-begin
+ end process SELECT_MACHINE;
-zeros <= (others => '0');
-
-
-
-arp_gen : if INCLUDE_ARP = '1' generate
- -- protocol Nr. 1 ARP
- ARP : trb_net16_gbe_response_constructor_ARP
- generic map( STAT_ADDRESS_BASE => 6
- )
- port map (
- CLK => CLK,
- RESET => RESET,
-
- -- INTERFACE
- MY_MAC_IN => MY_MAC_IN,
- MY_IP_IN => my_ip,
-
- PS_DATA_IN => PS_DATA_IN,
- PS_WR_EN_IN => PS_WR_EN_IN,
- PS_ACTIVATE_IN => PS_PROTO_SELECT_IN(0),
- PS_RESPONSE_READY_OUT => resp_ready(0),
- PS_BUSY_OUT => busy(0),
- PS_SELECTED_IN => selected(0),
-
- PS_SRC_MAC_ADDRESS_IN => PS_SRC_MAC_ADDRESS_IN,
- PS_DEST_MAC_ADDRESS_IN => PS_DEST_MAC_ADDRESS_IN,
- PS_SRC_IP_ADDRESS_IN => PS_SRC_IP_ADDRESS_IN,
- PS_DEST_IP_ADDRESS_IN => PS_DEST_IP_ADDRESS_IN,
- PS_SRC_UDP_PORT_IN => PS_SRC_UDP_PORT_IN,
- PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,
-
- TC_RD_EN_IN => TC_RD_EN_IN,
- TC_DATA_OUT => tc_data(1 * 9 - 1 downto 0 * 9),
- TC_FRAME_SIZE_OUT => tc_size(1 * 16 - 1 downto 0 * 16),
- TC_FRAME_TYPE_OUT => tc_type(1 * 16 - 1 downto 0 * 16),
- TC_IP_PROTOCOL_OUT => tc_ip_proto(1 * 8 - 1 downto 0 * 8),
- TC_IDENT_OUT => tc_ident(1 * 16 - 1 downto 0 * 16),
-
- TC_DEST_MAC_OUT => tc_mac(1 * 48 - 1 downto 0 * 48),
- TC_DEST_IP_OUT => tc_ip(1 * 32 - 1 downto 0 * 32),
- TC_DEST_UDP_OUT => tc_udp(1 * 16 - 1 downto 0 * 16),
- TC_SRC_MAC_OUT => tc_src_mac(1 * 48 - 1 downto 0 * 48),
- TC_SRC_IP_OUT => tc_src_ip(1 * 32 - 1 downto 0 * 32),
- TC_SRC_UDP_OUT => tc_src_udp(1 * 16 - 1 downto 0 * 16),
-
- STAT_DATA_OUT => stat_data(1 * 32 - 1 downto 0 * 32),
- STAT_ADDR_OUT => stat_addr(1 * 8 - 1 downto 0 * 8),
- STAT_DATA_RDY_OUT => stat_rdy(0),
- STAT_DATA_ACK_IN => stat_ack(0),
- RECEIVED_FRAMES_OUT => open, --RECEIVED_FRAMES_OUT(1 * 16 - 1 downto 0 * 16),
- SENT_FRAMES_OUT => open, --SENT_FRAMES_OUT(1 * 16 - 1 downto 0 * 16),
- DEBUG_OUT => MONITOR_SELECT_GEN_DBG_OUT(1 * 64 - 1 downto 0 * 64) --PROTOS_DEBUG_OUT(1 * 32 - 1 downto 0 * 32)
- -- END OF INTERFACE
- );
-end generate arp_gen;
-
-no_arp_gen : if INCLUDE_ARP = '0' generate
- resp_ready(0) <= '0';
- busy(0) <= '0';
-end generate no_arp_gen;
-
-
-dhcp_gen : if INCLUDE_DHCP = '1' generate
- -- protocol No. 2 DHCP
- DHCP : trb_net16_gbe_response_constructor_DHCP
- generic map(
- STAT_ADDRESS_BASE => 0,
- DO_SIMULATION => DO_SIMULATION
- )
- port map (
- CLK => CLK,
- RESET => RESET_FOR_DHCP, --RESET,
-
- -- INTERFACE
- MY_MAC_IN => MY_MAC_IN,
- MY_IP_IN => my_ip,
-
- PS_DATA_IN => PS_DATA_IN,
- PS_WR_EN_IN => PS_WR_EN_IN,
- PS_ACTIVATE_IN => PS_PROTO_SELECT_IN(1),
- PS_RESPONSE_READY_OUT => resp_ready(1),
- PS_BUSY_OUT => busy(1),
- PS_SELECTED_IN => selected(1),
-
- PS_SRC_MAC_ADDRESS_IN => PS_SRC_MAC_ADDRESS_IN,
- PS_DEST_MAC_ADDRESS_IN => PS_DEST_MAC_ADDRESS_IN,
- PS_SRC_IP_ADDRESS_IN => PS_SRC_IP_ADDRESS_IN,
- PS_DEST_IP_ADDRESS_IN => PS_DEST_IP_ADDRESS_IN,
- PS_SRC_UDP_PORT_IN => PS_SRC_UDP_PORT_IN,
- PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,
-
- TC_RD_EN_IN => TC_RD_EN_IN,
- TC_DATA_OUT => tc_data(2 * 9 - 1 downto 1 * 9),
- TC_FRAME_SIZE_OUT => tc_size(2 * 16 - 1 downto 1 * 16),
- TC_FRAME_TYPE_OUT => tc_type(2 * 16 - 1 downto 1 * 16),
- TC_IP_PROTOCOL_OUT => tc_ip_proto(2 * 8 - 1 downto 1 * 8),
- TC_IDENT_OUT => tc_ident(2 * 16 - 1 downto 1 * 16),
-
- TC_DEST_MAC_OUT => tc_mac(2 * 48 - 1 downto 1 * 48),
- TC_DEST_IP_OUT => tc_ip(2 * 32 - 1 downto 1 * 32),
- TC_DEST_UDP_OUT => tc_udp(2 * 16 - 1 downto 1 * 16),
- TC_SRC_MAC_OUT => tc_src_mac(2 * 48 - 1 downto 1 * 48),
- TC_SRC_IP_OUT => tc_src_ip(2 * 32 - 1 downto 1 * 32),
- TC_SRC_UDP_OUT => tc_src_udp(2 * 16 - 1 downto 1 * 16),
-
- STAT_DATA_OUT => stat_data(2 * 32 - 1 downto 1 * 32),
- STAT_ADDR_OUT => stat_addr(2 * 8 - 1 downto 1 * 8),
- STAT_DATA_RDY_OUT => stat_rdy(1),
- STAT_DATA_ACK_IN => stat_ack(1),
- RECEIVED_FRAMES_OUT => open, --RECEIVED_FRAMES_OUT(2 * 16 - 1 downto 1 * 16),
- SENT_FRAMES_OUT => open, --SENT_FRAMES_OUT(2 * 16 - 1 downto 1 * 16),
- -- END OF INTERFACE
-
- MY_IP_OUT => my_ip,
- DHCP_START_IN => DHCP_START_IN,
- DHCP_DONE_OUT => DHCP_DONE_OUT,
-
- DEBUG_OUT => MONITOR_SELECT_GEN_DBG_OUT(2 * 64 - 1 downto 1 * 64) --PROTOS_DEBUG_OUT(1 * 32 - 1 downto 0 * 32)
- );
-end generate dhcp_gen;
-
-no_dhcp_gen : if INCLUDE_DHCP = '0' generate
- resp_ready(1) <= '0';
- busy(1) <= '0';
-end generate no_dhcp_gen;
-
-ping_gen : if INCLUDE_PING = '1' generate
- --protocol No. 3 Ping
- Ping : trb_net16_gbe_response_constructor_Ping
- generic map( STAT_ADDRESS_BASE => 3
- )
- port map (
- CLK => CLK,
- RESET => RESET,
-
- ---- INTERFACE
- MY_MAC_IN => MY_MAC_IN,
- MY_IP_IN => my_ip,
-
- PS_DATA_IN => PS_DATA_IN,
- PS_WR_EN_IN => PS_WR_EN_IN,
- PS_ACTIVATE_IN => PS_PROTO_SELECT_IN(4),
- PS_RESPONSE_READY_OUT => resp_ready(4),
- PS_BUSY_OUT => busy(4),
- PS_SELECTED_IN => selected(4),
-
- PS_SRC_MAC_ADDRESS_IN => PS_SRC_MAC_ADDRESS_IN,
- PS_DEST_MAC_ADDRESS_IN => PS_DEST_MAC_ADDRESS_IN,
- PS_SRC_IP_ADDRESS_IN => PS_SRC_IP_ADDRESS_IN,
- PS_DEST_IP_ADDRESS_IN => PS_DEST_IP_ADDRESS_IN,
- PS_SRC_UDP_PORT_IN => PS_SRC_UDP_PORT_IN,
- PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,
-
- TC_RD_EN_IN => TC_RD_EN_IN,
- TC_DATA_OUT => tc_data(5 * 9 - 1 downto 4 * 9),
- TC_FRAME_SIZE_OUT => tc_size(5 * 16 - 1 downto 4 * 16),
- TC_FRAME_TYPE_OUT => tc_type(5 * 16 - 1 downto 4 * 16),
- TC_IP_PROTOCOL_OUT => tc_ip_proto(5 * 8 - 1 downto 4 * 8),
- TC_IDENT_OUT => tc_ident(5 * 16 - 1 downto 4 * 16),
-
- TC_DEST_MAC_OUT => tc_mac(5 * 48 - 1 downto 4 * 48),
- TC_DEST_IP_OUT => tc_ip(5 * 32 - 1 downto 4 * 32),
- TC_DEST_UDP_OUT => tc_udp(5 * 16 - 1 downto 4 * 16),
- TC_SRC_MAC_OUT => tc_src_mac(5 * 48 - 1 downto 4 * 48),
- TC_SRC_IP_OUT => tc_src_ip(5 * 32 - 1 downto 4 * 32),
- TC_SRC_UDP_OUT => tc_src_udp(5 * 16 - 1 downto 4 * 16),
-
- STAT_DATA_OUT => open,
- STAT_ADDR_OUT => open,
- STAT_DATA_RDY_OUT => open,
- STAT_DATA_ACK_IN => '0',
- RECEIVED_FRAMES_OUT => open,
- SENT_FRAMES_OUT => open,
- DEBUG_OUT => MONITOR_SELECT_GEN_DBG_OUT(5 * 64 - 1 downto 4 * 64)
- -- END OF INTERFACE
- );
-end generate ping_gen;
-
-no_ping_gen : if INCLUDE_PING = '0' generate
- resp_ready(4) <= '0';
- busy(4) <= '0';
-end generate no_ping_gen;
-
-sctrl_gen : if INCLUDE_SLOWCTRL = '1' generate
- SCTRL : trb_net16_gbe_response_constructor_SCTRL
- generic map( STAT_ADDRESS_BASE => 8,
- SLOWCTRL_BUFFER_SIZE => SLOWCTRL_BUFFER_SIZE
- )
- port map (
- CLK => CLK,
- RESET => RESET,
-
- -- INTERFACE
- MY_MAC_IN => MY_MAC_IN,
- MY_IP_IN => my_ip,
-
- PS_DATA_IN => PS_DATA_IN,
- PS_WR_EN_IN => PS_WR_EN_IN,
- PS_ACTIVATE_IN => PS_PROTO_SELECT_IN(2),
- PS_RESPONSE_READY_OUT => resp_ready(2),
- PS_BUSY_OUT => busy(2),
- PS_SELECTED_IN => selected(2),
-
- PS_SRC_MAC_ADDRESS_IN => PS_SRC_MAC_ADDRESS_IN,
- PS_DEST_MAC_ADDRESS_IN => PS_DEST_MAC_ADDRESS_IN,
- PS_SRC_IP_ADDRESS_IN => PS_SRC_IP_ADDRESS_IN,
- PS_DEST_IP_ADDRESS_IN => PS_DEST_IP_ADDRESS_IN,
- PS_SRC_UDP_PORT_IN => PS_SRC_UDP_PORT_IN,
- PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,
-
- TC_RD_EN_IN => TC_RD_EN_IN,
- TC_DATA_OUT => tc_data(3 * 9 - 1 downto 2 * 9),
- TC_FRAME_SIZE_OUT => tc_size(3 * 16 - 1 downto 2 * 16),
- TC_FRAME_TYPE_OUT => tc_type(3 * 16 - 1 downto 2 * 16),
- TC_IP_PROTOCOL_OUT => tc_ip_proto(3 * 8 - 1 downto 2 * 8),
- TC_IDENT_OUT => tc_ident(3 * 16 - 1 downto 2 * 16),
-
- TC_DEST_MAC_OUT => tc_mac(3 * 48 - 1 downto 2 * 48),
- TC_DEST_IP_OUT => tc_ip(3 * 32 - 1 downto 2 * 32),
- TC_DEST_UDP_OUT => tc_udp(3 * 16 - 1 downto 2 * 16),
- TC_SRC_MAC_OUT => tc_src_mac(3 * 48 - 1 downto 2 * 48),
- TC_SRC_IP_OUT => tc_src_ip(3 * 32 - 1 downto 2 * 32),
- TC_SRC_UDP_OUT => tc_src_udp(3 * 16 - 1 downto 2 * 16),
-
- STAT_DATA_OUT => stat_data(3 * 32 - 1 downto 2 * 32),
- STAT_ADDR_OUT => stat_addr(3 * 8 - 1 downto 2 * 8),
- STAT_DATA_RDY_OUT => stat_rdy(2),
- STAT_DATA_ACK_IN => stat_ack(2),
-
- DEBUG_OUT => MONITOR_SELECT_GEN_DBG_OUT(3 * 64 - 1 downto 2 * 64),
- -- END OF INTERFACE
-
- GSC_CLK_IN => GSC_CLK_IN,
- GSC_INIT_DATAREADY_OUT => GSC_INIT_DATAREADY_OUT,
- GSC_INIT_DATA_OUT => GSC_INIT_DATA_OUT,
- GSC_INIT_PACKET_NUM_OUT => GSC_INIT_PACKET_NUM_OUT,
- GSC_INIT_READ_IN => GSC_INIT_READ_IN,
- GSC_REPLY_DATAREADY_IN => GSC_REPLY_DATAREADY_IN,
- GSC_REPLY_DATA_IN => GSC_REPLY_DATA_IN,
- GSC_REPLY_PACKET_NUM_IN => GSC_REPLY_PACKET_NUM_IN,
- GSC_REPLY_READ_OUT => GSC_REPLY_READ_OUT,
- GSC_BUSY_IN => GSC_BUSY_IN,
- CFG_ADDITIONAL_HDR_IN => CFG_ADDITIONAL_HDR_IN,
- CFG_MAX_REPLY_SIZE_IN => CFG_MAX_REPLY_SIZE_IN,
- MAKE_RESET_OUT => MAKE_RESET_OUT,
-
- MONITOR_SELECT_REC_OUT => MONITOR_SELECT_REC_OUT(3 * 32 - 1 downto 2 * 32),
- MONITOR_SELECT_REC_BYTES_OUT => MONITOR_SELECT_REC_BYTES_OUT(3 * 32 - 1 downto 2 * 32),
- MONITOR_SELECT_SENT_BYTES_OUT => MONITOR_SELECT_SENT_BYTES_OUT(3 * 32 - 1 downto 2 * 32),
- MONITOR_SELECT_SENT_OUT => MONITOR_SELECT_SENT_OUT(3 * 32 - 1 downto 2 * 32),
-
- DATA_HIST_OUT => SCTRL_HIST_OUT
- );
-end generate sctrl_gen;
-
-no_sctrl_gen : if INCLUDE_SLOWCTRL = '0' generate
- resp_ready(2) <= '0';
- busy(2) <= '0';
-end generate no_sctrl_gen;
-
-trbnet_gen : if INCLUDE_READOUT = '1' generate
- TrbNetData : trb_net16_gbe_response_constructor_TrbNetData
- generic map(
- RX_PATH_ENABLE => RX_PATH_ENABLE,
- DO_SIMULATION => DO_SIMULATION,
-
- READOUT_BUFFER_SIZE => READOUT_BUFFER_SIZE
- )
- port map (
- CLK => CLK,
- RESET => RESET,
-
- -- INTERFACE
- MY_MAC_IN => MY_MAC_IN,
- MY_IP_IN => my_ip,
-
- PS_DATA_IN => PS_DATA_IN,
- PS_WR_EN_IN => PS_WR_EN_IN,
- PS_ACTIVATE_IN => PS_PROTO_SELECT_IN(3),
- PS_RESPONSE_READY_OUT => resp_ready(3),
- PS_BUSY_OUT => busy(3),
- PS_SELECTED_IN => selected(3),
-
- PS_SRC_MAC_ADDRESS_IN => PS_SRC_MAC_ADDRESS_IN,
- PS_DEST_MAC_ADDRESS_IN => PS_DEST_MAC_ADDRESS_IN,
- PS_SRC_IP_ADDRESS_IN => PS_SRC_IP_ADDRESS_IN,
- PS_DEST_IP_ADDRESS_IN => PS_DEST_IP_ADDRESS_IN,
- PS_SRC_UDP_PORT_IN => PS_SRC_UDP_PORT_IN,
- PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,
-
- TC_RD_EN_IN => TC_RD_EN_IN,
- TC_DATA_OUT => tc_data(4 * 9 - 1 downto 3 * 9),
- TC_FRAME_SIZE_OUT => tc_size(4 * 16 - 1 downto 3 * 16),
- TC_FRAME_TYPE_OUT => tc_type(4 * 16 - 1 downto 3 * 16),
- TC_IP_PROTOCOL_OUT => tc_ip_proto(4 * 8 - 1 downto 3 * 8),
- TC_IDENT_OUT => tc_ident(4 * 16 - 1 downto 3 * 16),
-
- TC_DEST_MAC_OUT => tc_mac(4 * 48 - 1 downto 3 * 48),
- TC_DEST_IP_OUT => tc_ip(4 * 32 - 1 downto 3 * 32),
- TC_DEST_UDP_OUT => tc_udp(4 * 16 - 1 downto 3 * 16),
- TC_SRC_MAC_OUT => tc_src_mac(4 * 48 - 1 downto 3 * 48),
- TC_SRC_IP_OUT => tc_src_ip(4 * 32 - 1 downto 3 * 32),
- TC_SRC_UDP_OUT => tc_src_udp(4 * 16 - 1 downto 3 * 16),
-
- STAT_DATA_OUT => stat_data(4 * 32 - 1 downto 3 * 32),
- STAT_ADDR_OUT => stat_addr(4 * 8 - 1 downto 3 * 8),
- STAT_DATA_RDY_OUT => stat_rdy(3),
- STAT_DATA_ACK_IN => stat_ack(3),
-
- DEBUG_OUT => MONITOR_SELECT_GEN_DBG_OUT(4 * 64 - 1 downto 3 * 64),
- -- END OF INTERFACE
-
- -- CTS interface
- CTS_NUMBER_IN => CTS_NUMBER_IN,
- CTS_CODE_IN => CTS_CODE_IN,
- CTS_INFORMATION_IN => CTS_INFORMATION_IN,
- CTS_READOUT_TYPE_IN => CTS_READOUT_TYPE_IN,
- CTS_START_READOUT_IN => CTS_START_READOUT_IN,
- CTS_DATA_OUT => CTS_DATA_OUT,
- CTS_DATAREADY_OUT => CTS_DATAREADY_OUT,
- CTS_READOUT_FINISHED_OUT => CTS_READOUT_FINISHED_OUT,
- CTS_READ_IN => CTS_READ_IN,
- CTS_LENGTH_OUT => CTS_LENGTH_OUT,
- CTS_ERROR_PATTERN_OUT => CTS_ERROR_PATTERN_OUT,
- -- Data payload interface
- FEE_DATA_IN => FEE_DATA_IN,
- FEE_DATAREADY_IN => FEE_DATAREADY_IN,
- FEE_READ_OUT => FEE_READ_OUT,
- FEE_STATUS_BITS_IN => FEE_STATUS_BITS_IN,
- FEE_BUSY_IN => FEE_BUSY_IN,
- -- ip configurator
- SLV_ADDR_IN => SLV_ADDR_IN,
- SLV_READ_IN => SLV_READ_IN,
- SLV_WRITE_IN => SLV_WRITE_IN,
- SLV_BUSY_OUT => SLV_BUSY_OUT,
- SLV_ACK_OUT => SLV_ACK_OUT,
- SLV_DATA_IN => SLV_DATA_IN,
- SLV_DATA_OUT => SLV_DATA_OUT,
-
- CFG_GBE_ENABLE_IN => CFG_GBE_ENABLE_IN,
- CFG_IPU_ENABLE_IN => CFG_IPU_ENABLE_IN,
- CFG_MULT_ENABLE_IN => CFG_MULT_ENABLE_IN,
- CFG_SUBEVENT_ID_IN => CFG_SUBEVENT_ID_IN,
- CFG_SUBEVENT_DEC_IN => CFG_SUBEVENT_DEC_IN,
- CFG_QUEUE_DEC_IN => CFG_QUEUE_DEC_IN,
- CFG_READOUT_CTR_IN => CFG_READOUT_CTR_IN,
- CFG_READOUT_CTR_VALID_IN => CFG_READOUT_CTR_VALID_IN,
- CFG_INSERT_TTYPE_IN => CFG_INSERT_TTYPE_IN,
- CFG_MAX_SUB_IN => CFG_MAX_SUB_IN,
- CFG_MAX_QUEUE_IN => CFG_MAX_QUEUE_IN,
- CFG_MAX_SUBS_IN_QUEUE_IN => CFG_MAX_SUBS_IN_QUEUE_IN,
- CFG_MAX_SINGLE_SUB_IN => CFG_MAX_SINGLE_SUB_IN,
-
- MONITOR_SELECT_REC_OUT => MONITOR_SELECT_REC_OUT(4 * 32 - 1 downto 3 * 32),
- MONITOR_SELECT_REC_BYTES_OUT => MONITOR_SELECT_REC_BYTES_OUT(4 * 32 - 1 downto 3 * 32),
- MONITOR_SELECT_SENT_BYTES_OUT => MONITOR_SELECT_SENT_BYTES_OUT(4 * 32 - 1 downto 3 * 32),
- MONITOR_SELECT_SENT_OUT => MONITOR_SELECT_SENT_OUT(4 * 32 - 1 downto 3 * 32),
- MONITOR_SELECT_DROP_OUT_OUT => MONITOR_SELECT_DROP_OUT_OUT(4 * 32 - 1 downto 3 * 32),
- MONITOR_SELECT_DROP_IN_OUT => open,
-
- DATA_HIST_OUT => DATA_HIST_OUT
- );
-end generate trbnet_gen;
-
-no_readout_gen : if INCLUDE_READOUT = '0' generate
- resp_ready(3) <= '0';
- busy(3) <= '0';
-end generate no_readout_gen;
-
---stat_gen : if g_SIMULATE = 0 generate
---Stat : trb_net16_gbe_response_constructor_Stat
---generic map( STAT_ADDRESS_BASE => 10
---)
---port map (
--- CLK => CLK,
--- RESET => RESET,
---
----- INTERFACE
--- PS_DATA_IN => PS_DATA_IN,
--- PS_WR_EN_IN => PS_WR_EN_IN,
--- PS_ACTIVATE_IN => PS_PROTO_SELECT_IN(4),
--- PS_RESPONSE_READY_OUT => resp_ready(4),
--- PS_BUSY_OUT => busy(4),
--- PS_SELECTED_IN => selected(4),
---
--- PS_SRC_MAC_ADDRESS_IN => PS_SRC_MAC_ADDRESS_IN,
--- PS_DEST_MAC_ADDRESS_IN => PS_DEST_MAC_ADDRESS_IN,
--- PS_SRC_IP_ADDRESS_IN => PS_SRC_IP_ADDRESS_IN,
--- PS_DEST_IP_ADDRESS_IN => PS_DEST_IP_ADDRESS_IN,
--- PS_SRC_UDP_PORT_IN => PS_SRC_UDP_PORT_IN,
--- PS_DEST_UDP_PORT_IN => PS_DEST_UDP_PORT_IN,
---
--- TC_WR_EN_OUT => TC_WR_EN_OUT,
--- TC_DATA_OUT => tc_data(5 * 9 - 1 downto 4 * 9),
--- TC_FRAME_SIZE_OUT => tc_size(5 * 16 - 1 downto 4 * 16),
--- TC_FRAME_TYPE_OUT => tc_type(5 * 16 - 1 downto 4 * 16),
--- TC_IP_PROTOCOL_OUT => tc_ip_proto(5 * 8 - 1 downto 4 * 8),
---
--- TC_DEST_MAC_OUT => tc_mac(5 * 48 - 1 downto 4 * 48),
--- TC_DEST_IP_OUT => tc_ip(5 * 32 - 1 downto 4 * 32),
--- TC_DEST_UDP_OUT => tc_udp(5 * 16 - 1 downto 4 * 16),
--- TC_SRC_MAC_OUT => tc_src_mac(5 * 48 - 1 downto 4 * 48),
--- TC_SRC_IP_OUT => tc_src_ip(5 * 32 - 1 downto 4 * 32),
--- TC_SRC_UDP_OUT => tc_src_udp(5 * 16 - 1 downto 4 * 16),
---
--- TC_IP_SIZE_OUT => tc_ip_size(5 * 16 - 1 downto 4 * 16),
--- TC_UDP_SIZE_OUT => tc_udp_size(5 * 16 - 1 downto 4 * 16),
--- TC_FLAGS_OFFSET_OUT => tc_flags_size(5 * 16 - 1 downto 4 * 16),
---
--- TC_BUSY_IN => TC_BUSY_IN,
---
--- STAT_DATA_OUT => stat_data(5 * 32 - 1 downto 4 * 32),
--- STAT_ADDR_OUT => stat_addr(5 * 8 - 1 downto 4 * 8),
--- STAT_DATA_RDY_OUT => stat_rdy(4),
--- STAT_DATA_ACK_IN => stat_ack(4),
---
--- RECEIVED_FRAMES_OUT => RECEIVED_FRAMES_OUT(5 * 16 - 1 downto 4 * 16),
--- SENT_FRAMES_OUT => SENT_FRAMES_OUT(5 * 16 - 1 downto 4 * 16),
--- DEBUG_OUT => PROTOS_DEBUG_OUT(5 * 32 - 1 downto 4 * 32),
---
--- STAT_DATA_IN => stat_data,
--- STAT_ADDR_IN => stat_addr,
--- STAT_DATA_RDY_IN => stat_rdy,
--- STAT_DATA_ACK_OUT => stat_ack
---);
---end generate;
-
---***************
--- DO NOT TOUCH, response selection logic
-
---stat_data((c_MAX_PROTOCOLS + 1) * 32 - 1 downto c_MAX_PROTOCOLS * 32) <= STAT_DATA_IN;
---stat_addr((c_MAX_PROTOCOLS + 1) * 8 - 1 downto c_MAX_PROTOCOLS * 8) <= STAT_ADDR_IN;
---stat_rdy(c_MAX_PROTOCOLS) <= STAT_DATA_RDY_IN;
---STAT_DATA_ACK_OUT <= stat_ack(c_MAX_PROTOCOLS);
-
---mult <= or_all(resp_ready(2 downto 0)); --or_all(resp_ready(2 downto 0)) and or_all(resp_ready(4 downto 3));
-
-PS_BUSY_OUT <= busy;
-
-SELECT_MACHINE_PROC : process(RESET, CLK)
-begin
- if RESET = '1' then
- select_current_state <= IDLE;
- elsif rising_edge(CLK) then
--- if (RESET = '1') then
--- select_current_state <= IDLE;
--- else
- select_current_state <= select_next_state;
--- end if;
- end if;
-end process SELECT_MACHINE_PROC;
-
-SELECT_MACHINE : process(select_current_state, MC_BUSY_IN, resp_ready, index, zeros, busy)
-begin
- select_state <= x"0";
-
- case (select_current_state) is
-
- when IDLE =>
- select_state <= x"1";
- if (MC_BUSY_IN = '0') then
- select_next_state <= LOOP_OVER;
+ INDEX_PROC : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if (select_current_state = IDLE) then
+ index <= 0;
+ elsif (select_current_state = LOOP_OVER and resp_ready(index) = '0') then
+ index <= index + 1;
else
- select_next_state <= IDLE;
+ index <= index;
end if;
-
- when LOOP_OVER =>
- select_state <= x"2";
- if (resp_ready /= zeros) then
- if (resp_ready(index) = '1') then
- select_next_state <= SELECT_ONE;
- elsif (index = c_MAX_PROTOCOLS) then
- select_next_state <= CLEANUP;
+ end if;
+ end process INDEX_PROC;
+
+ SELECTOR_PROC : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if (select_current_state = SELECT_ONE or select_current_state = PROCESS_REQUEST) then
+ TC_DATA_OUT <= tc_data((index + 1) * 9 - 1 downto index * 9);
+ TC_FRAME_SIZE_OUT <= tc_size((index + 1) * 16 - 1 downto index * 16);
+ TC_FRAME_TYPE_OUT <= tc_type((index + 1) * 16 - 1 downto index * 16);
+ TC_DEST_MAC_OUT <= tc_mac((index + 1) * 48 - 1 downto index * 48);
+ TC_DEST_IP_OUT <= tc_ip((index + 1) * 32 - 1 downto index * 32);
+ TC_DEST_UDP_OUT <= tc_udp((index + 1) * 16 - 1 downto index * 16);
+ TC_SRC_MAC_OUT <= tc_src_mac((index + 1) * 48 - 1 downto index * 48);
+ TC_SRC_IP_OUT <= tc_src_ip((index + 1) * 32 - 1 downto index * 32);
+ TC_SRC_UDP_OUT <= tc_src_udp((index + 1) * 16 - 1 downto index * 16);
+ TC_IP_PROTOCOL_OUT <= tc_ip_proto((index + 1) * 8 - 1 downto index * 8);
+ TC_IDENT_OUT <= tc_ident((index + 1) * 16 - 1 downto index * 16);
+ if (select_current_state = SELECT_ONE) then
+ PS_RESPONSE_READY_OUT <= '1';
+ selected(index) <= '0';
else
- select_next_state <= LOOP_OVER;
+ PS_RESPONSE_READY_OUT <= '0';
+ selected(index) <= '1';
end if;
else
- select_next_state <= CLEANUP;
- end if;
-
- when SELECT_ONE =>
- select_state <= x"3";
- if (MC_BUSY_IN = '1') then
- select_next_state <= PROCESS_REQUEST;
- else
- select_next_state <= SELECT_ONE;
- end if;
-
- when PROCESS_REQUEST =>
- select_state <= x"4";
- if (busy(index) = '0') then --if (MC_BUSY_IN = '0') then
- select_next_state <= CLEANUP;
- else
- select_next_state <= PROCESS_REQUEST;
- end if;
-
- when CLEANUP =>
- select_state <= x"5";
- select_next_state <= IDLE;
-
- when others => select_next_state <= IDLE;
-
- end case;
-
-end process SELECT_MACHINE;
-
-INDEX_PROC : process(CLK)
-begin
- if rising_edge(CLK) then
- if (select_current_state = IDLE) then
- index <= 0;
- elsif (select_current_state = LOOP_OVER and resp_ready(index) = '0') then
- index <= index + 1;
- else
- index <= index;
- end if;
- end if;
-end process INDEX_PROC;
-
-SELECTOR_PROC : process(CLK)
-begin
- if rising_edge(CLK) then
- if (select_current_state = SELECT_ONE or select_current_state = PROCESS_REQUEST) then
- TC_DATA_OUT <= tc_data((index + 1) * 9 - 1 downto index * 9);
- TC_FRAME_SIZE_OUT <= tc_size((index + 1) * 16 - 1 downto index * 16);
- TC_FRAME_TYPE_OUT <= tc_type((index + 1) * 16 - 1 downto index * 16);
- TC_DEST_MAC_OUT <= tc_mac((index + 1) * 48 - 1 downto index * 48);
- TC_DEST_IP_OUT <= tc_ip((index + 1) * 32 - 1 downto index * 32);
- TC_DEST_UDP_OUT <= tc_udp((index + 1) * 16 - 1 downto index * 16);
- TC_SRC_MAC_OUT <= tc_src_mac((index + 1) * 48 - 1 downto index * 48);
- TC_SRC_IP_OUT <= tc_src_ip((index + 1) * 32 - 1 downto index * 32);
- TC_SRC_UDP_OUT <= tc_src_udp((index + 1) * 16 - 1 downto index * 16);
- TC_IP_PROTOCOL_OUT <= tc_ip_proto((index + 1) * 8 - 1 downto index * 8);
- TC_IDENT_OUT <= tc_ident((index + 1) * 16 - 1 downto index * 16);
- if (select_current_state = SELECT_ONE) then
- PS_RESPONSE_READY_OUT <= '1';
- selected(index) <= '0';
- else
+ TC_DATA_OUT <= (others => '0');
+ TC_FRAME_SIZE_OUT <= (others => '0');
+ TC_FRAME_TYPE_OUT <= (others => '0');
+ TC_DEST_MAC_OUT <= (others => '0');
+ TC_DEST_IP_OUT <= (others => '0');
+ TC_DEST_UDP_OUT <= (others => '0');
+ TC_SRC_MAC_OUT <= (others => '0');
+ TC_SRC_IP_OUT <= (others => '0');
+ TC_SRC_UDP_OUT <= (others => '0');
+ TC_IP_PROTOCOL_OUT <= (others => '0');
+ TC_IDENT_OUT <= (others => '0');
PS_RESPONSE_READY_OUT <= '0';
- selected(index) <= '1';
+ selected <= (others => '0');
end if;
- else
- TC_DATA_OUT <= (others => '0');
- TC_FRAME_SIZE_OUT <= (others => '0');
- TC_FRAME_TYPE_OUT <= (others => '0');
- TC_DEST_MAC_OUT <= (others => '0');
- TC_DEST_IP_OUT <= (others => '0');
- TC_DEST_UDP_OUT <= (others => '0');
- TC_SRC_MAC_OUT <= (others => '0');
- TC_SRC_IP_OUT <= (others => '0');
- TC_SRC_UDP_OUT <= (others => '0');
- TC_IP_PROTOCOL_OUT <= (others => '0');
- TC_IDENT_OUT <= (others => '0');
- PS_RESPONSE_READY_OUT <= '0';
- selected <= (others => '0');
end if;
- end if;
-end process SELECTOR_PROC;
-
-process(CLK)
-begin
- if rising_edge(CLK) then
- DEBUG_OUT(3 downto 0) <= select_state;
- DEBUG_OUT(11 downto 4) <= std_logic_vector(to_unsigned(index, 8));
- DEBUG_OUT(19 downto 12) <= "000" & resp_ready; -- 4:0
- DEBUG_OUT(27 downto 20) <= "000" & busy; -- 4:0
- DEBUG_OUT(63 downto 28) <= (others => '0');
- end if;
-end process;
+ end process SELECTOR_PROC;
+
+ process(CLK)
+ begin
+ if rising_edge(CLK) then
+ DEBUG_OUT(3 downto 0) <= select_state;
+ DEBUG_OUT(11 downto 4) <= std_logic_vector(to_unsigned(index, 8));
+ DEBUG_OUT(19 downto 12) <= "000" & resp_ready; -- 4:0
+ DEBUG_OUT(27 downto 20) <= "000" & busy; -- 4:0
+ DEBUG_OUT(63 downto 28) <= (others => '0');
+ end if;
+ end process;
end trb_net16_gbe_protocol_selector;
GBE_SOFT_RESET_OUT : out std_logic;
GBE_MAX_REPLY_OUT : out std_logic_vector(31 downto 0);
+ GBE_AUTOTHROTTLE_OUT : out std_logic;
+ GBE_THROTTLE_PAUSE_OUT : out std_logic_vector(15 downto 0);
+
GBE_MAX_SUB_OUT : out std_logic_vector(15 downto 0);
GBE_MAX_QUEUE_OUT : out std_logic_vector(15 downto 0);
GBE_MAX_SUBS_IN_QUEUE_OUT : out std_logic_vector(15 downto 0);
signal max_sub, max_queue, max_subs_in_queue, max_single_sub : std_logic_vector(15 downto 0);
signal dummy_event : std_logic_vector(15 downto 0);
signal dummy_mode : std_logic;
+ signal autothrottle : std_logic;
+ signal throttle_pause : std_logic_vector(15 downto 0);
+
begin
GBE_MAX_REPLY_OUT <= max_reply;
DUMMY_EVENT_SIZE_OUT <= dummy_event;
DUMMY_TRIGGERED_MODE_OUT <= dummy_mode;
+ GBE_AUTOTHROTTLE_OUT <= autothrottle;
+ GBE_THROTTLE_PAUSE_OUT <= throttle_pause;
end if;
end process OUT_PROC;
max_reply <= x"0000_fa00";
dummy_event <= x"0100";
dummy_mode <= '0';
+ autothrottle <= '0';
+ throttle_pause <= x"0000";
elsif (BUS_WRITE_EN_IN = '1') then
when x"13" =>
dummy_mode <= BUS_DATA_IN(0);
+
+ when x"14" =>
+ autothrottle <= BUS_DATA_IN(0);
+ throttle_pause <= BUS_DATA_IN(31 downto 16);
+
when x"ff" =>
if (BUS_DATA_IN = x"ffff_ffff") then
max_reply <= max_reply;
dummy_event <= dummy_event;
dummy_mode <= dummy_mode;
+ autothrottle <= autothrottle;
+ throttle_pause <= throttle_pause;
end case;
else
reset_values <= '0';
data_out(0) <= dummy_mode;
data_out(31 downto 1) <= (others => '0');
+ when 20 =>
+ data_out(0) <= autothrottle;
+ data_out(31 downto 16) <= throttle_pause;
-- Histogram of sctrl data sizes
when 96 to 127 =>
MC_RESET_LINK_IN : in std_logic;
MC_IDLE_TOO_LONG_OUT : out std_logic;
MC_DHCP_DONE_OUT : out std_logic;
--- MC_MY_MAC_OUT : out std_logic_vector(47 downto 0);
MC_MY_MAC_IN : in std_logic_vector(47 downto 0);
-- signals to/from receive controller
PCS_AN_COMPLETE_IN : in std_logic;
-- signals to/from hub
--- MC_UNIQUE_ID_IN : in std_logic_vector(63 downto 0);
-
GSC_CLK_IN : in std_logic;
GSC_INIT_DATAREADY_OUT : out std_logic;
GSC_INIT_DATA_OUT : out std_logic_vector(15 downto 0);
GBE_MAX_SUB_OUT : out std_logic_vector(15 downto 0);
GBE_MAX_QUEUE_OUT : out std_logic_vector(15 downto 0);
GBE_MAX_SUBS_IN_QUEUE_OUT : out std_logic_vector(15 downto 0);
- GBE_MAX_SINGLE_SUB_OUT : out std_logic_vector(15 downto 0);
+ GBE_MAX_SINGLE_SUB_OUT : out std_logic_vector(15 downto 0);
+
+ GBE_AUTOTHROTTLE_OUT : out std_logic;
+ GBE_THROTTLE_PAUSE_OUT : out std_logic_vector(15 downto 0);
MONITOR_RX_BYTES_IN : in std_logic_vector(31 downto 0);
MONITOR_RX_FRAMES_IN : in std_logic_vector(31 downto 0);
use work.trb_net_std.all;
package trb_net_gbe_protocols is
+ type hist_array is array (31 downto 0) of std_logic_vector(31 downto 0);
+
+ --signal g_SIMULATE : integer range 0 to 1 := 0;
+
+ ---- g_MY_IP is being set by DHCP Response Constructor
+ --signal g_MY_IP : std_logic_vector(31 downto 0);
+ ---- g_MY_MAC is being set by Main Controller
+ --signal g_MY_MAC : std_logic_vector(47 downto 0) := x"001122334455";
+
+ constant c_MAX_FRAME_TYPES : integer range 1 to 16 := 2;
+ constant c_MAX_PROTOCOLS : integer range 1 to 16 := 5; --5; --4; --5;
+ constant c_MAX_IP_PROTOCOLS : integer range 1 to 16 := 2;
+ constant c_MAX_UDP_PROTOCOLS : integer range 1 to 16 := 4;
+
+ type frame_types_a is array (c_MAX_FRAME_TYPES - 1 downto 0) of std_logic_vector(15 downto 0);
+ constant FRAME_TYPES : frame_types_a := (x"0800", x"0806");
+ -- IPv4, ARP
+
+ type ip_protos_a is array (c_MAX_IP_PROTOCOLS - 1 downto 0) of std_logic_vector(7 downto 0);
+ constant IP_PROTOCOLS : ip_protos_a := (x"11", x"01");
+ -- UDP, ICMP
+
+ -- this are the destination ports of the incoming packet
+ type udp_protos_a is array (c_MAX_UDP_PROTOCOLS - 1 downto 0) of std_logic_vector(15 downto 0);
+ constant UDP_PROTOCOLS : udp_protos_a := (x"0044", x"6590", x"7530", x"7531"); --x"6590", x"7530", x"7531"); --x"61a8", x"7530", x"7531");
+ -- DHCP client, SCTRL, STATs
+
+ component trb_net16_gbe_response_constructor_Forward is
+ port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+
+ -- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ TC_WR_EN_OUT : out std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_BUSY_IN : in std_logic;
+ RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ -- END OF INTERFACE
+
+ -- debug
+ DEBUG_OUT : out std_logic_vector(63 downto 0)
+ );
+ end component;
-type hist_array is array(31 downto 0) of std_logic_vector(31 downto 0);
-
---signal g_SIMULATE : integer range 0 to 1 := 0;
-
----- g_MY_IP is being set by DHCP Response Constructor
---signal g_MY_IP : std_logic_vector(31 downto 0);
----- g_MY_MAC is being set by Main Controller
---signal g_MY_MAC : std_logic_vector(47 downto 0) := x"001122334455";
-
-constant c_MAX_FRAME_TYPES : integer range 1 to 16 := 2;
-constant c_MAX_PROTOCOLS : integer range 1 to 16 := 5; --5; --4; --5;
-constant c_MAX_IP_PROTOCOLS : integer range 1 to 16 := 2;
-constant c_MAX_UDP_PROTOCOLS : integer range 1 to 16 := 4;
-
-type frame_types_a is array(c_MAX_FRAME_TYPES - 1 downto 0) of std_logic_vector(15 downto 0);
-constant FRAME_TYPES : frame_types_a := (x"0800", x"0806");
--- IPv4, ARP
-
-type ip_protos_a is array(c_MAX_IP_PROTOCOLS - 1 downto 0) of std_logic_vector(7 downto 0);
-constant IP_PROTOCOLS : ip_protos_a := (x"11", x"01");
--- UDP, ICMP
-
--- this are the destination ports of the incoming packet
-type udp_protos_a is array(c_MAX_UDP_PROTOCOLS - 1 downto 0) of std_logic_vector(15 downto 0);
-constant UDP_PROTOCOLS : udp_protos_a := (x"0044", x"6590", x"7530", x"7531"); --x"6590", x"7530", x"7531"); --x"61a8", x"7530", x"7531");
--- DHCP client, SCTRL, STATs
-
-component trb_net16_gbe_response_constructor_Forward is
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
--- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_WR_EN_OUT : out std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_BUSY_IN : in std_logic;
-
- RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
- SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
--- END OF INTERFACE
-
--- debug
- DEBUG_OUT : out std_logic_vector(63 downto 0)
-);
-end component;
-
-component trb_net16_gbe_response_constructor_ARP is
-generic ( STAT_ADDRESS_BASE : integer := 0
-);
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
--- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_RD_EN_IN : in std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_IDENT_OUT : out std_logic_vector(15 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-
- STAT_DATA_OUT : out std_logic_vector(31 downto 0);
- STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
- STAT_DATA_RDY_OUT : out std_logic;
- STAT_DATA_ACK_IN : in std_logic;
-
- RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
- SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
--- END OF INTERFACE
-
--- debug
- DEBUG_OUT : out std_logic_vector(63 downto 0)
-);
-end component;
-
-component trb_net16_gbe_response_constructor_Test is
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
--- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_WR_EN_OUT : out std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_BUSY_IN : in std_logic;
-
- RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
- SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
--- END OF INTERFACE
-
--- debug
- DEBUG_OUT : out std_logic_vector(63 downto 0)
-);
-end component;
-
-component trb_net16_gbe_response_constructor_Trash is
-generic ( STAT_ADDRESS_BASE : integer := 0
-);
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
--- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_RD_EN_IN : in std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_SIZE_LEFT_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_IDENT_OUT : out std_logic_vector(15 downto 0);
- TC_IP_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_UDP_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FLAGS_OFFSET_OUT : out std_logic_vector(15 downto 0);
- TC_BUSY_IN : in std_logic;
-
- STAT_DATA_OUT : out std_logic_vector(31 downto 0);
- STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
- STAT_DATA_RDY_OUT : out std_logic;
- STAT_DATA_ACK_IN : in std_logic;
- RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
- SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
--- END OF INTERFACE
-
--- debug
- DEBUG_OUT : out std_logic_vector(63 downto 0)
-);
-end component;
-
-component trb_net16_gbe_response_constructor_DHCP is
-generic (
- STAT_ADDRESS_BASE : integer := 0;
- DO_SIMULATION : integer := 0
-);
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
--- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_RD_EN_IN : in std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_IDENT_OUT : out std_logic_vector(15 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-
- STAT_DATA_OUT : out std_logic_vector(31 downto 0);
- STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
- STAT_DATA_RDY_OUT : out std_logic;
- STAT_DATA_ACK_IN : in std_logic;
-
- RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
- SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
--- END OF INTERFACE
-
- MY_IP_OUT : out std_logic_vector(31 downto 0);
- DHCP_START_IN : in std_logic;
- DHCP_DONE_OUT : out std_logic;
--- debug
- DEBUG_OUT : out std_logic_vector(63 downto 0)
-);
-end component;
-
-component trb_net16_gbe_response_constructor_Ping is
-generic ( STAT_ADDRESS_BASE : integer := 0
-);
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
--- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_RD_EN_IN : in std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_IDENT_OUT : out std_logic_vector(15 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-
- STAT_DATA_OUT : out std_logic_vector(31 downto 0);
- STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
- STAT_DATA_RDY_OUT : out std_logic;
- STAT_DATA_ACK_IN : in std_logic;
-
- RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
- SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
--- END OF INTERFACE
-
--- debug
- DEBUG_OUT : out std_logic_vector(63 downto 0)
-);
-end component;
-
-component trb_net16_gbe_response_constructor_PseudoPing is
-generic ( STAT_ADDRESS_BASE : integer := 0
-);
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
--- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_RD_EN_IN : in std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_IDENT_OUT : out std_logic_vector(15 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-
- STAT_DATA_OUT : out std_logic_vector(31 downto 0);
- STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
- STAT_DATA_RDY_OUT : out std_logic;
- STAT_DATA_ACK_IN : in std_logic;
-
- RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
- SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
--- END OF INTERFACE
-
--- debug
- DEBUG_OUT : out std_logic_vector(63 downto 0)
-);
-end component;
-
-component trb_net16_gbe_response_constructor_Test1 is
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
--- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_WR_EN_OUT : out std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-
- TC_BUSY_IN : in std_logic;
-
- RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
- SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
--- END OF INTERFACE
-
--- debug
- DEBUG_OUT : out std_logic_vector(63 downto 0)
-);
-end component;
-
-component trb_net16_gbe_response_constructor_SCTRL is
-generic ( STAT_ADDRESS_BASE : integer := 0;
- SLOWCTRL_BUFFER_SIZE : integer range 1 to 4 := 1
-);
- port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
- -- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_RD_EN_IN : in std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_IDENT_OUT : out std_logic_vector(15 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-
- STAT_DATA_OUT : out std_logic_vector(31 downto 0);
- STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
- STAT_DATA_RDY_OUT : out std_logic;
- STAT_DATA_ACK_IN : in std_logic;
-
- DEBUG_OUT : out std_logic_vector(63 downto 0);
- -- END OF INTERFACE
-
- -- protocol specific ports
- GSC_CLK_IN : in std_logic;
- GSC_INIT_DATAREADY_OUT : out std_logic;
- GSC_INIT_DATA_OUT : out std_logic_vector(15 downto 0);
- GSC_INIT_PACKET_NUM_OUT : out std_logic_vector(2 downto 0);
- GSC_INIT_READ_IN : in std_logic;
- GSC_REPLY_DATAREADY_IN : in std_logic;
- GSC_REPLY_DATA_IN : in std_logic_vector(15 downto 0);
- GSC_REPLY_PACKET_NUM_IN : in std_logic_vector(2 downto 0);
- GSC_REPLY_READ_OUT : out std_logic;
- GSC_BUSY_IN : in std_logic;
- MAKE_RESET_OUT : out std_logic;
- CFG_ADDITIONAL_HDR_IN : in std_logic;
- CFG_MAX_REPLY_SIZE_IN : in std_logic_vector(31 downto 0);
- -- end of protocol specific ports
-
- MONITOR_SELECT_REC_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0);
-
- DATA_HIST_OUT : out hist_array
- );
-end component;
-
-component trb_net16_gbe_response_constructor_Stat is
-generic ( STAT_ADDRESS_BASE : integer := 0
-);
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
--- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_WR_EN_OUT : out std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_IDENT_OUT : out std_logic_vector(15 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_IP_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_UDP_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FLAGS_OFFSET_OUT : out std_logic_vector(15 downto 0);
- TC_BUSY_IN : in std_logic;
-
- STAT_DATA_OUT : out std_logic_vector(31 downto 0);
- STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
- STAT_DATA_RDY_OUT : out std_logic;
- STAT_DATA_ACK_IN : in std_logic;
-
- RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
- SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
--- END OF INTERFACE
-
- STAT_DATA_IN : in std_logic_vector((c_MAX_PROTOCOLS + 1) * 32 - 1 downto 0);
- STAT_ADDR_IN : in std_logic_vector((c_MAX_PROTOCOLS + 1) * 8 - 1 downto 0);
- STAT_DATA_RDY_IN : in std_logic_vector((c_MAX_PROTOCOLS + 1) - 1 downto 0);
- STAT_DATA_ACK_OUT : out std_logic_vector((c_MAX_PROTOCOLS + 1) - 1 downto 0);
-
--- debug
- DEBUG_OUT : out std_logic_vector(63 downto 0)
-);
-end component;
-
-component trb_net16_gbe_response_constructor_TrbNetData is
-generic (
- RX_PATH_ENABLE : integer range 0 to 1 := 1;
- DO_SIMULATION : integer range 0 to 1 := 0;
-
- READOUT_BUFFER_SIZE : integer range 1 to 4 := 1
+ component trb_net16_gbe_response_constructor_ARP is
+ generic(STAT_ADDRESS_BASE : integer := 0
+ );
+ port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+
+ -- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ TC_RD_EN_IN : in std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_IDENT_OUT : out std_logic_vector(15 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
+ STAT_DATA_OUT : out std_logic_vector(31 downto 0);
+ STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
+ STAT_DATA_RDY_OUT : out std_logic;
+ STAT_DATA_ACK_IN : in std_logic;
+ RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ -- END OF INTERFACE
+
+ -- debug
+ DEBUG_OUT : out std_logic_vector(63 downto 0)
+ );
+ end component;
+
+ component trb_net16_gbe_response_constructor_Test is
+ port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+
+ -- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ TC_WR_EN_OUT : out std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_BUSY_IN : in std_logic;
+ RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ -- END OF INTERFACE
+
+ -- debug
+ DEBUG_OUT : out std_logic_vector(63 downto 0)
+ );
+ end component;
+
+ component trb_net16_gbe_response_constructor_Trash is
+ generic(STAT_ADDRESS_BASE : integer := 0
+ );
+ port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+
+ -- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ TC_RD_EN_IN : in std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_SIZE_LEFT_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_IDENT_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_UDP_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FLAGS_OFFSET_OUT : out std_logic_vector(15 downto 0);
+ TC_BUSY_IN : in std_logic;
+ STAT_DATA_OUT : out std_logic_vector(31 downto 0);
+ STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
+ STAT_DATA_RDY_OUT : out std_logic;
+ STAT_DATA_ACK_IN : in std_logic;
+ RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ -- END OF INTERFACE
+
+ -- debug
+ DEBUG_OUT : out std_logic_vector(63 downto 0)
+ );
+ end component;
+
+ component trb_net16_gbe_response_constructor_DHCP is
+ generic(
+ STAT_ADDRESS_BASE : integer := 0;
+ DO_SIMULATION : integer := 0
+ );
+ port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+
+ -- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ TC_RD_EN_IN : in std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_IDENT_OUT : out std_logic_vector(15 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
+ STAT_DATA_OUT : out std_logic_vector(31 downto 0);
+ STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
+ STAT_DATA_RDY_OUT : out std_logic;
+ STAT_DATA_ACK_IN : in std_logic;
+ RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ -- END OF INTERFACE
+
+ MY_IP_OUT : out std_logic_vector(31 downto 0);
+ DHCP_START_IN : in std_logic;
+ DHCP_DONE_OUT : out std_logic;
+ -- debug
+ DEBUG_OUT : out std_logic_vector(63 downto 0)
+ );
+ end component;
+
+ component trb_net16_gbe_response_constructor_Ping is
+ generic(STAT_ADDRESS_BASE : integer := 0
+ );
+ port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+
+ -- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ TC_RD_EN_IN : in std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_IDENT_OUT : out std_logic_vector(15 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
+ STAT_DATA_OUT : out std_logic_vector(31 downto 0);
+ STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
+ STAT_DATA_RDY_OUT : out std_logic;
+ STAT_DATA_ACK_IN : in std_logic;
+ RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ -- END OF INTERFACE
+
+ -- debug
+ DEBUG_OUT : out std_logic_vector(63 downto 0)
+ );
+ end component;
+
+ component trb_net16_gbe_response_constructor_PseudoPing is
+ generic(STAT_ADDRESS_BASE : integer := 0
+ );
+ port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+
+ -- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ TC_RD_EN_IN : in std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_IDENT_OUT : out std_logic_vector(15 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
+ STAT_DATA_OUT : out std_logic_vector(31 downto 0);
+ STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
+ STAT_DATA_RDY_OUT : out std_logic;
+ STAT_DATA_ACK_IN : in std_logic;
+ RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ -- END OF INTERFACE
+
+ -- debug
+ DEBUG_OUT : out std_logic_vector(63 downto 0)
+ );
+ end component;
+
+ component trb_net16_gbe_response_constructor_Test1 is
+ port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+
+ -- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ TC_WR_EN_OUT : out std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_BUSY_IN : in std_logic;
+ RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ -- END OF INTERFACE
+
+ -- debug
+ DEBUG_OUT : out std_logic_vector(63 downto 0)
+ );
+ end component;
+
+ component trb_net16_gbe_response_constructor_SCTRL is
+ generic(STAT_ADDRESS_BASE : integer := 0;
+ SLOWCTRL_BUFFER_SIZE : integer range 1 to 4 := 1
+ );
+ port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+
+ -- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ TC_RD_EN_IN : in std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_IDENT_OUT : out std_logic_vector(15 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
+ STAT_DATA_OUT : out std_logic_vector(31 downto 0);
+ STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
+ STAT_DATA_RDY_OUT : out std_logic;
+ STAT_DATA_ACK_IN : in std_logic;
+ DEBUG_OUT : out std_logic_vector(63 downto 0);
+ -- END OF INTERFACE
+
+ -- protocol specific ports
+ GSC_CLK_IN : in std_logic;
+ GSC_INIT_DATAREADY_OUT : out std_logic;
+ GSC_INIT_DATA_OUT : out std_logic_vector(15 downto 0);
+ GSC_INIT_PACKET_NUM_OUT : out std_logic_vector(2 downto 0);
+ GSC_INIT_READ_IN : in std_logic;
+ GSC_REPLY_DATAREADY_IN : in std_logic;
+ GSC_REPLY_DATA_IN : in std_logic_vector(15 downto 0);
+ GSC_REPLY_PACKET_NUM_IN : in std_logic_vector(2 downto 0);
+ GSC_REPLY_READ_OUT : out std_logic;
+ GSC_BUSY_IN : in std_logic;
+ MAKE_RESET_OUT : out std_logic;
+ CFG_ADDITIONAL_HDR_IN : in std_logic;
+ CFG_MAX_REPLY_SIZE_IN : in std_logic_vector(31 downto 0);
+ -- end of protocol specific ports
+
+ MONITOR_SELECT_REC_OUT : out std_logic_vector(31 downto 0);
+ MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(31 downto 0);
+ MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(31 downto 0);
+ MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0);
+ DATA_HIST_OUT : out hist_array
+ );
+ end component;
+
+ component trb_net16_gbe_response_constructor_Stat is
+ generic(STAT_ADDRESS_BASE : integer := 0
+ );
+ port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+
+ -- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ TC_WR_EN_OUT : out std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_IDENT_OUT : out std_logic_vector(15 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_UDP_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FLAGS_OFFSET_OUT : out std_logic_vector(15 downto 0);
+ TC_BUSY_IN : in std_logic;
+ STAT_DATA_OUT : out std_logic_vector(31 downto 0);
+ STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
+ STAT_DATA_RDY_OUT : out std_logic;
+ STAT_DATA_ACK_IN : in std_logic;
+ RECEIVED_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ SENT_FRAMES_OUT : out std_logic_vector(15 downto 0);
+ -- END OF INTERFACE
+
+ STAT_DATA_IN : in std_logic_vector((c_MAX_PROTOCOLS + 1) * 32 - 1 downto 0);
+ STAT_ADDR_IN : in std_logic_vector((c_MAX_PROTOCOLS + 1) * 8 - 1 downto 0);
+ STAT_DATA_RDY_IN : in std_logic_vector((c_MAX_PROTOCOLS + 1) - 1 downto 0);
+ STAT_DATA_ACK_OUT : out std_logic_vector((c_MAX_PROTOCOLS + 1) - 1 downto 0);
+
+ -- debug
+ DEBUG_OUT : out std_logic_vector(63 downto 0)
+ );
+ end component;
+
+ component trb_net16_gbe_response_constructor_TrbNetData is
+ generic(
+ RX_PATH_ENABLE : integer range 0 to 1 := 1;
+ DO_SIMULATION : integer range 0 to 1 := 0;
+ READOUT_BUFFER_SIZE : integer range 1 to 4 := 1
+ );
+ port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+
+ -- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ TC_RD_EN_IN : in std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_IDENT_OUT : out std_logic_vector(15 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
+ STAT_DATA_OUT : out std_logic_vector(31 downto 0);
+ STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
+ STAT_DATA_RDY_OUT : out std_logic;
+ STAT_DATA_ACK_IN : in std_logic;
+ DEBUG_OUT : out std_logic_vector(63 downto 0);
+
+ -- END OF INTERFACE
+
+ -- CTS interface
+ CTS_NUMBER_IN : in std_logic_vector(15 downto 0);
+ CTS_CODE_IN : in std_logic_vector(7 downto 0);
+ CTS_INFORMATION_IN : in std_logic_vector(7 downto 0);
+ CTS_READOUT_TYPE_IN : in std_logic_vector(3 downto 0);
+ CTS_START_READOUT_IN : in std_logic;
+ CTS_DATA_OUT : out std_logic_vector(31 downto 0);
+ CTS_DATAREADY_OUT : out std_logic;
+ CTS_READOUT_FINISHED_OUT : out std_logic;
+ CTS_READ_IN : in std_logic;
+ CTS_LENGTH_OUT : out std_logic_vector(15 downto 0);
+ CTS_ERROR_PATTERN_OUT : out std_logic_vector(31 downto 0);
+ -- Data payload interface
+ FEE_DATA_IN : in std_logic_vector(15 downto 0);
+ FEE_DATAREADY_IN : in std_logic;
+ FEE_READ_OUT : out std_logic;
+ FEE_STATUS_BITS_IN : in std_logic_vector(31 downto 0);
+ FEE_BUSY_IN : in std_logic;
+ -- ip configurator
+ SLV_ADDR_IN : in std_logic_vector(7 downto 0);
+ SLV_READ_IN : in std_logic;
+ SLV_WRITE_IN : in std_logic;
+ SLV_BUSY_OUT : out std_logic;
+ SLV_ACK_OUT : out std_logic;
+ SLV_DATA_IN : in std_logic_vector(31 downto 0);
+ SLV_DATA_OUT : out std_logic_vector(31 downto 0);
+ CFG_GBE_ENABLE_IN : in std_logic;
+ CFG_IPU_ENABLE_IN : in std_logic;
+ CFG_MULT_ENABLE_IN : in std_logic;
+ CFG_SUBEVENT_ID_IN : in std_logic_vector(31 downto 0);
+ CFG_SUBEVENT_DEC_IN : in std_logic_vector(31 downto 0);
+ CFG_QUEUE_DEC_IN : in std_logic_vector(31 downto 0);
+ CFG_READOUT_CTR_IN : in std_logic_vector(23 downto 0);
+ CFG_READOUT_CTR_VALID_IN : in std_logic;
+ CFG_INSERT_TTYPE_IN : in std_logic;
+ CFG_MAX_SUB_IN : in std_logic_vector(15 downto 0);
+ CFG_MAX_QUEUE_IN : in std_logic_vector(15 downto 0);
+ CFG_MAX_SUBS_IN_QUEUE_IN : in std_logic_vector(15 downto 0);
+ CFG_MAX_SINGLE_SUB_IN : in std_logic_vector(15 downto 0);
+ CFG_AUTO_THROTTLE_IN : in std_logic;
+ CFG_THROTTLE_PAUSE_IN : in std_logic_vector(15 downto 0);
+ MONITOR_SELECT_REC_OUT : out std_logic_vector(31 downto 0);
+ MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(31 downto 0);
+ MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(31 downto 0);
+ MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0);
+ MONITOR_SELECT_DROP_IN_OUT : out std_logic_vector(31 downto 0);
+ MONITOR_SELECT_DROP_OUT_OUT : out std_logic_vector(31 downto 0);
+ DATA_HIST_OUT : out hist_array
);
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
--- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_RD_EN_IN : in std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_IDENT_OUT : out std_logic_vector(15 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
-
- STAT_DATA_OUT : out std_logic_vector(31 downto 0);
- STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
- STAT_DATA_RDY_OUT : out std_logic;
- STAT_DATA_ACK_IN : in std_logic;
-
- DEBUG_OUT : out std_logic_vector(63 downto 0);
-
--- END OF INTERFACE
-
- -- CTS interface
- CTS_NUMBER_IN : in std_logic_vector (15 downto 0);
- CTS_CODE_IN : in std_logic_vector (7 downto 0);
- CTS_INFORMATION_IN : in std_logic_vector (7 downto 0);
- CTS_READOUT_TYPE_IN : in std_logic_vector (3 downto 0);
- CTS_START_READOUT_IN : in std_logic;
- CTS_DATA_OUT : out std_logic_vector (31 downto 0);
- CTS_DATAREADY_OUT : out std_logic;
- CTS_READOUT_FINISHED_OUT : out std_logic;
- CTS_READ_IN : in std_logic;
- CTS_LENGTH_OUT : out std_logic_vector (15 downto 0);
- CTS_ERROR_PATTERN_OUT : out std_logic_vector (31 downto 0);
- -- Data payload interface
- FEE_DATA_IN : in std_logic_vector (15 downto 0);
- FEE_DATAREADY_IN : in std_logic;
- FEE_READ_OUT : out std_logic;
- FEE_STATUS_BITS_IN : in std_logic_vector (31 downto 0);
- FEE_BUSY_IN : in std_logic;
- -- ip configurator
- SLV_ADDR_IN : in std_logic_vector(7 downto 0);
- SLV_READ_IN : in std_logic;
- SLV_WRITE_IN : in std_logic;
- SLV_BUSY_OUT : out std_logic;
- SLV_ACK_OUT : out std_logic;
- SLV_DATA_IN : in std_logic_vector(31 downto 0);
- SLV_DATA_OUT : out std_logic_vector(31 downto 0);
-
- CFG_GBE_ENABLE_IN : in std_logic;
- CFG_IPU_ENABLE_IN : in std_logic;
- CFG_MULT_ENABLE_IN : in std_logic;
- CFG_SUBEVENT_ID_IN : in std_logic_vector(31 downto 0);
- CFG_SUBEVENT_DEC_IN : in std_logic_vector(31 downto 0);
- CFG_QUEUE_DEC_IN : in std_logic_vector(31 downto 0);
- CFG_READOUT_CTR_IN : in std_logic_vector(23 downto 0);
- CFG_READOUT_CTR_VALID_IN : in std_logic;
- CFG_INSERT_TTYPE_IN : in std_logic;
- CFG_MAX_SUB_IN : in std_logic_vector(15 downto 0);
- CFG_MAX_QUEUE_IN : in std_logic_vector(15 downto 0);
- CFG_MAX_SUBS_IN_QUEUE_IN : in std_logic_vector(15 downto 0);
- CFG_MAX_SINGLE_SUB_IN : in std_logic_vector(15 downto 0);
-
- MONITOR_SELECT_REC_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_DROP_IN_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_DROP_OUT_OUT : out std_logic_vector(31 downto 0);
-
- DATA_HIST_OUT : out hist_array
-);
-end component;
+ end component;
end package;
use work.trb_net_gbe_protocols.all;
entity trb_net16_gbe_response_constructor_TrbNetData is
-generic (
- RX_PATH_ENABLE : integer range 0 to 1 := 1;
- DO_SIMULATION : integer range 0 to 1 := 0;
- READOUT_BUFFER_SIZE : integer range 1 to 4 := 1
+ generic(
+ RX_PATH_ENABLE : integer range 0 to 1 := 1;
+ DO_SIMULATION : integer range 0 to 1 := 0;
+ READOUT_BUFFER_SIZE : integer range 1 to 4 := 1
+ );
+ port(
+ CLK : in std_logic; -- system clock
+ RESET : in std_logic;
+
+ -- INTERFACE
+ MY_MAC_IN : in std_logic_vector(47 downto 0);
+ MY_IP_IN : in std_logic_vector(31 downto 0);
+ PS_DATA_IN : in std_logic_vector(8 downto 0);
+ PS_WR_EN_IN : in std_logic;
+ PS_ACTIVATE_IN : in std_logic;
+ PS_RESPONSE_READY_OUT : out std_logic;
+ PS_BUSY_OUT : out std_logic;
+ PS_SELECTED_IN : in std_logic;
+ PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
+ PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
+ PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
+ TC_RD_EN_IN : in std_logic;
+ TC_DATA_OUT : out std_logic_vector(8 downto 0);
+ TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
+ TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
+ TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
+ TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
+ TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
+ TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
+ TC_IDENT_OUT : out std_logic_vector(15 downto 0);
+ STAT_DATA_OUT : out std_logic_vector(31 downto 0);
+ STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
+ STAT_DATA_RDY_OUT : out std_logic;
+ STAT_DATA_ACK_IN : in std_logic;
+ DEBUG_OUT : out std_logic_vector(63 downto 0);
+ -- END OF INTERFACE
+
+ -- CTS interface
+ CTS_NUMBER_IN : in std_logic_vector(15 downto 0);
+ CTS_CODE_IN : in std_logic_vector(7 downto 0);
+ CTS_INFORMATION_IN : in std_logic_vector(7 downto 0);
+ CTS_READOUT_TYPE_IN : in std_logic_vector(3 downto 0);
+ CTS_START_READOUT_IN : in std_logic;
+ CTS_DATA_OUT : out std_logic_vector(31 downto 0);
+ CTS_DATAREADY_OUT : out std_logic;
+ CTS_READOUT_FINISHED_OUT : out std_logic;
+ CTS_READ_IN : in std_logic;
+ CTS_LENGTH_OUT : out std_logic_vector(15 downto 0);
+ CTS_ERROR_PATTERN_OUT : out std_logic_vector(31 downto 0);
+ -- Data payload interface
+ FEE_DATA_IN : in std_logic_vector(15 downto 0);
+ FEE_DATAREADY_IN : in std_logic;
+ FEE_READ_OUT : out std_logic;
+ FEE_STATUS_BITS_IN : in std_logic_vector(31 downto 0);
+ FEE_BUSY_IN : in std_logic;
+ -- ip configurator
+ SLV_ADDR_IN : in std_logic_vector(7 downto 0);
+ SLV_READ_IN : in std_logic;
+ SLV_WRITE_IN : in std_logic;
+ SLV_BUSY_OUT : out std_logic;
+ SLV_ACK_OUT : out std_logic;
+ SLV_DATA_IN : in std_logic_vector(31 downto 0);
+ SLV_DATA_OUT : out std_logic_vector(31 downto 0);
+ CFG_GBE_ENABLE_IN : in std_logic;
+ CFG_IPU_ENABLE_IN : in std_logic;
+ CFG_MULT_ENABLE_IN : in std_logic;
+ CFG_SUBEVENT_ID_IN : in std_logic_vector(31 downto 0);
+ CFG_SUBEVENT_DEC_IN : in std_logic_vector(31 downto 0);
+ CFG_QUEUE_DEC_IN : in std_logic_vector(31 downto 0);
+ CFG_READOUT_CTR_IN : in std_logic_vector(23 downto 0);
+ CFG_READOUT_CTR_VALID_IN : in std_logic;
+ CFG_INSERT_TTYPE_IN : in std_logic;
+ CFG_MAX_SUB_IN : in std_logic_vector(15 downto 0);
+ CFG_MAX_QUEUE_IN : in std_logic_vector(15 downto 0);
+ CFG_MAX_SUBS_IN_QUEUE_IN : in std_logic_vector(15 downto 0);
+ CFG_MAX_SINGLE_SUB_IN : in std_logic_vector(15 downto 0);
+ CFG_AUTO_THROTTLE_IN : in std_logic;
+ CFG_THROTTLE_PAUSE_IN : in std_logic_vector(15 downto 0);
+ MONITOR_SELECT_REC_OUT : out std_logic_vector(31 downto 0);
+ MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(31 downto 0);
+ MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(31 downto 0);
+ MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0);
+ MONITOR_SELECT_DROP_IN_OUT : out std_logic_vector(31 downto 0);
+ MONITOR_SELECT_DROP_OUT_OUT : out std_logic_vector(31 downto 0);
+ DATA_HIST_OUT : out hist_array
);
-port (
- CLK : in std_logic; -- system clock
- RESET : in std_logic;
-
--- INTERFACE
- MY_MAC_IN : in std_logic_vector(47 downto 0);
- MY_IP_IN : in std_logic_vector(31 downto 0);
- PS_DATA_IN : in std_logic_vector(8 downto 0);
- PS_WR_EN_IN : in std_logic;
- PS_ACTIVATE_IN : in std_logic;
- PS_RESPONSE_READY_OUT : out std_logic;
- PS_BUSY_OUT : out std_logic;
- PS_SELECTED_IN : in std_logic;
- PS_SRC_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_DEST_MAC_ADDRESS_IN : in std_logic_vector(47 downto 0);
- PS_SRC_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_DEST_IP_ADDRESS_IN : in std_logic_vector(31 downto 0);
- PS_SRC_UDP_PORT_IN : in std_logic_vector(15 downto 0);
- PS_DEST_UDP_PORT_IN : in std_logic_vector(15 downto 0);
-
- TC_RD_EN_IN : in std_logic;
- TC_DATA_OUT : out std_logic_vector(8 downto 0);
- TC_FRAME_SIZE_OUT : out std_logic_vector(15 downto 0);
- TC_FRAME_TYPE_OUT : out std_logic_vector(15 downto 0);
- TC_IP_PROTOCOL_OUT : out std_logic_vector(7 downto 0);
- TC_DEST_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_DEST_IP_OUT : out std_logic_vector(31 downto 0);
- TC_DEST_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_SRC_MAC_OUT : out std_logic_vector(47 downto 0);
- TC_SRC_IP_OUT : out std_logic_vector(31 downto 0);
- TC_SRC_UDP_OUT : out std_logic_vector(15 downto 0);
- TC_IDENT_OUT : out std_logic_vector(15 downto 0);
-
- STAT_DATA_OUT : out std_logic_vector(31 downto 0);
- STAT_ADDR_OUT : out std_logic_vector(7 downto 0);
- STAT_DATA_RDY_OUT : out std_logic;
- STAT_DATA_ACK_IN : in std_logic;
-
- DEBUG_OUT : out std_logic_vector(63 downto 0);
--- END OF INTERFACE
-
- -- CTS interface
- CTS_NUMBER_IN : in std_logic_vector (15 downto 0);
- CTS_CODE_IN : in std_logic_vector (7 downto 0);
- CTS_INFORMATION_IN : in std_logic_vector (7 downto 0);
- CTS_READOUT_TYPE_IN : in std_logic_vector (3 downto 0);
- CTS_START_READOUT_IN : in std_logic;
- CTS_DATA_OUT : out std_logic_vector (31 downto 0);
- CTS_DATAREADY_OUT : out std_logic;
- CTS_READOUT_FINISHED_OUT : out std_logic;
- CTS_READ_IN : in std_logic;
- CTS_LENGTH_OUT : out std_logic_vector (15 downto 0);
- CTS_ERROR_PATTERN_OUT : out std_logic_vector (31 downto 0);
- -- Data payload interface
- FEE_DATA_IN : in std_logic_vector (15 downto 0);
- FEE_DATAREADY_IN : in std_logic;
- FEE_READ_OUT : out std_logic;
- FEE_STATUS_BITS_IN : in std_logic_vector (31 downto 0);
- FEE_BUSY_IN : in std_logic;
- -- ip configurator
- SLV_ADDR_IN : in std_logic_vector(7 downto 0);
- SLV_READ_IN : in std_logic;
- SLV_WRITE_IN : in std_logic;
- SLV_BUSY_OUT : out std_logic;
- SLV_ACK_OUT : out std_logic;
- SLV_DATA_IN : in std_logic_vector(31 downto 0);
- SLV_DATA_OUT : out std_logic_vector(31 downto 0);
-
- CFG_GBE_ENABLE_IN : in std_logic;
- CFG_IPU_ENABLE_IN : in std_logic;
- CFG_MULT_ENABLE_IN : in std_logic;
- CFG_SUBEVENT_ID_IN : in std_logic_vector(31 downto 0);
- CFG_SUBEVENT_DEC_IN : in std_logic_vector(31 downto 0);
- CFG_QUEUE_DEC_IN : in std_logic_vector(31 downto 0);
- CFG_READOUT_CTR_IN : in std_logic_vector(23 downto 0);
- CFG_READOUT_CTR_VALID_IN : in std_logic;
- CFG_INSERT_TTYPE_IN : in std_logic;
- CFG_MAX_SUB_IN : in std_logic_vector(15 downto 0);
- CFG_MAX_QUEUE_IN : in std_logic_vector(15 downto 0);
- CFG_MAX_SUBS_IN_QUEUE_IN : in std_logic_vector(15 downto 0);
- CFG_MAX_SINGLE_SUB_IN : in std_logic_vector(15 downto 0);
-
- MONITOR_SELECT_REC_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_REC_BYTES_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_SENT_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_DROP_IN_OUT : out std_logic_vector(31 downto 0);
- MONITOR_SELECT_DROP_OUT_OUT : out std_logic_vector(31 downto 0);
-
- DATA_HIST_OUT : out hist_array
-);
end trb_net16_gbe_response_constructor_TrbNetData;
-
architecture trb_net16_gbe_response_constructor_TrbNetData of trb_net16_gbe_response_constructor_TrbNetData is
+ attribute syn_encoding : string;
+
+ signal ip_cfg_start : std_logic;
+ signal ip_cfg_bank : std_logic_vector(3 downto 0);
+ signal ip_cfg_done : std_logic;
+ signal ip_cfg_mem_addr : std_logic_vector(7 downto 0);
+ signal ip_cfg_mem_data : std_logic_vector(31 downto 0);
+ signal ip_cfg_mem_clk : std_logic;
+
+ signal ic_dest_mac, ic_dest_mac_shift : std_logic_vector(47 downto 0);
+ signal ic_dest_ip, ic_dest_ip_shift : std_logic_vector(31 downto 0);
+ signal ic_dest_udp, ic_dest_udp_shift : std_logic_vector(15 downto 0);
+ signal ic_src_mac, ic_src_mac_shift : std_logic_vector(47 downto 0);
+ signal ic_src_ip, ic_src_ip_shift : std_logic_vector(31 downto 0);
+ signal ic_src_udp, ic_src_udp_shift : std_logic_vector(15 downto 0);
+
+ signal pc_wr_en : std_logic;
+ signal pc_data : std_logic_vector(7 downto 0);
+ signal pc_eoq : std_logic;
+ signal pc_sos : std_logic;
+ signal pc_ready : std_logic;
+ signal pc_sub_size : std_logic_vector(31 downto 0);
+ signal pc_trig_nr : std_logic_vector(31 downto 0);
+ signal pc_eos : std_logic;
+
+ signal tc_rd_en : std_logic;
+ signal tc_data : std_logic_vector(8 downto 0);
+ signal tc_size : std_logic_vector(15 downto 0);
+ signal tc_sod : std_logic;
+ signal pc_trig_type, pc_trig_type_shift : std_logic_vector(3 downto 0);
+
+ type dissect_states is (IDLE, WAIT_FOR_LOAD, LOAD, CLEANUP);
+ signal dissect_current_state, dissect_next_state : dissect_states;
+ attribute syn_encoding of dissect_current_state : signal is "onehot";
+
+ signal event_bytes : std_logic_vector(15 downto 0);
+ signal loaded_bytes : std_logic_vector(15 downto 0);
+ signal sent_packets : std_logic_vector(15 downto 0);
+
+ signal mon_sent_frames, mon_sent_bytes : std_logic_vector(31 downto 0);
+ signal ipu_dbg : std_logic_vector(383 downto 0);
+ signal constr_dbg : std_logic_vector(63 downto 0);
+
+ signal hist_inst : hist_array;
+ signal tc_sod_flag : std_logic;
+ signal reset_all_hist : std_logic_vector(31 downto 0);
+ signal ipu_monitor : std_logic_vector(223 downto 0);
+
+ -- JUST FOR DEBUGING PURPOSE
+ type sim_check_states is (IDLE, SAVE_HDR, GO_OVER_DATA, SAVE_TLR, GET_ONE_MORE, GET_SECOND_MORE, CLEANUP);
+ signal sim_check_current, sim_check_next : sim_check_states;
+
+ signal hdr, tlr : std_logic_vector(255 downto 0);
-attribute syn_encoding : string;
-
-signal ip_cfg_start : std_logic;
-signal ip_cfg_bank : std_logic_vector(3 downto 0);
-signal ip_cfg_done : std_logic;
-signal ip_cfg_mem_addr : std_logic_vector(7 downto 0);
-signal ip_cfg_mem_data : std_logic_vector(31 downto 0);
-signal ip_cfg_mem_clk : std_logic;
-
-signal ic_dest_mac, ic_dest_mac_shift : std_logic_vector(47 downto 0);
-signal ic_dest_ip, ic_dest_ip_shift : std_logic_vector(31 downto 0);
-signal ic_dest_udp, ic_dest_udp_shift : std_logic_vector(15 downto 0);
-signal ic_src_mac, ic_src_mac_shift : std_logic_vector(47 downto 0);
-signal ic_src_ip, ic_src_ip_shift : std_logic_vector(31 downto 0);
-signal ic_src_udp, ic_src_udp_shift : std_logic_vector(15 downto 0);
-
-signal pc_wr_en : std_logic;
-signal pc_data : std_logic_vector(7 downto 0);
-signal pc_eoq : std_logic;
-signal pc_sos : std_logic;
-signal pc_ready : std_logic;
-signal pc_sub_size : std_logic_vector(31 downto 0);
-signal pc_trig_nr : std_logic_vector(31 downto 0);
-signal pc_eos : std_logic;
-
-signal tc_rd_en : std_logic;
-signal tc_data : std_logic_vector(8 downto 0);
-signal tc_size : std_logic_vector(15 downto 0);
-signal tc_sod : std_logic;
-signal pc_trig_type, pc_trig_type_shift : std_logic_vector(3 downto 0);
-
-type dissect_states is (IDLE, WAIT_FOR_LOAD, LOAD, CLEANUP);
-signal dissect_current_state, dissect_next_state : dissect_states;
-attribute syn_encoding of dissect_current_state : signal is "onehot";
-
-signal event_bytes : std_logic_vector(15 downto 0);
-signal loaded_bytes : std_logic_vector(15 downto 0);
-signal sent_packets : std_logic_vector(15 downto 0);
-
-signal mon_sent_frames, mon_sent_bytes : std_logic_vector(31 downto 0);
-signal ipu_dbg : std_logic_vector(383 downto 0);
-signal constr_dbg : std_logic_vector(63 downto 0);
-
-signal hist_inst : hist_array;
-signal tc_sod_flag : std_logic;
-signal reset_all_hist : std_logic_vector(31 downto 0);
-signal ipu_monitor : std_logic_vector(223 downto 0);
-
--- JUST FOR DEBUGING PURPOSE
-type sim_check_states is (IDLE, SAVE_HDR, GO_OVER_DATA, SAVE_TLR, GET_ONE_MORE, GET_SECOND_MORE, CLEANUP);
-signal sim_check_current, sim_check_next : sim_check_states;
-
-signal hdr, tlr : std_logic_vector(255 downto 0);
+begin
+ sim_check_gen : if DO_SIMULATION = 1 generate
+ process(RESET, CLK)
+ begin
+ if RESET = '1' then
+ sim_check_current <= IDLE;
+ elsif rising_edge(CLK) then
+ sim_check_current <= sim_check_next;
+ end if;
+ end process;
+
+ process(sim_check_current, tc_sod, loaded_bytes, tc_size, hdr, tlr, event_bytes)
+ begin
+ case (sim_check_current) is
+ when IDLE =>
+ if (tc_sod = '1') then
+ sim_check_next <= SAVE_HDR;
+ else
+ sim_check_next <= IDLE;
+ end if;
+
+ when SAVE_HDR =>
+ if (loaded_bytes = x"001f" + x"0002") then
+ sim_check_next <= GO_OVER_DATA;
+ else
+ sim_check_next <= SAVE_HDR;
+ end if;
+
+ when GO_OVER_DATA =>
+ if (loaded_bytes = tc_size + x"0001") then
+ sim_check_next <= SAVE_TLR;
+ else
+ sim_check_next <= GO_OVER_DATA;
+ end if;
+
+ when SAVE_TLR =>
+ if (loaded_bytes = event_bytes) then
+ sim_check_next <= GET_ONE_MORE;
+ else
+ sim_check_next <= SAVE_TLR;
+ end if;
+
+ when GET_ONE_MORE =>
+ sim_check_next <= GET_SECOND_MORE;
+
+ when GET_SECOND_MORE =>
+ sim_check_next <= CLEANUP;
+
+ when CLEANUP =>
+
+ --assert (hdr = tlr) report "--------- >>>> Header Trailer mismatch" severity failure;
+ sim_check_next <= IDLE;
+ end case;
+ end process;
-begin
-
-
-sim_check_gen : if DO_SIMULATION = 1 generate
-
- process(RESET, CLK)
+ process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if (sim_check_current = SAVE_HDR and loaded_bytes > x"0001") then
+ hdr((to_integer(unsigned(loaded_bytes - x"0002") * 8)) + 7 downto (to_integer(unsigned(loaded_bytes - x"0002")) * 8)) <= tc_data(7 downto 0);
+ else
+ hdr <= hdr;
+ end if;
+ end if;
+ end process;
+
+ process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if (sim_check_current = SAVE_TLR) then
+ tlr((to_integer(unsigned(loaded_bytes - tc_size - 2) * 8)) + 7 downto (to_integer(unsigned(loaded_bytes - tc_size - 2)) * 8)) <= tc_data(7 downto 0);
+ elsif (sim_check_current = GET_ONE_MORE) then
+ tlr((to_integer(unsigned(loaded_bytes - tc_size - 1) * 8)) + 7 downto (to_integer(unsigned(loaded_bytes - tc_size - 1)) * 8)) <= tc_data(7 downto 0);
+ elsif (sim_check_current = GET_ONE_MORE) then
+ tlr((to_integer(unsigned(loaded_bytes - tc_size) * 8)) + 7 downto (to_integer(unsigned(loaded_bytes - tc_size)) * 8)) <= tc_data(7 downto 0);
+ else
+ tlr <= tlr;
+ end if;
+ end if;
+ end process;
+
+ end generate sim_check_gen;
+
+ THE_IP_CONFIGURATOR : ip_configurator
+ port map(
+ CLK => CLK,
+ RESET => RESET,
+ -- configuration interface
+ START_CONFIG_IN => ip_cfg_start,
+ BANK_SELECT_IN => ip_cfg_bank,
+ CONFIG_DONE_OUT => ip_cfg_done,
+ MEM_ADDR_OUT => ip_cfg_mem_addr,
+ MEM_DATA_IN => ip_cfg_mem_data,
+ MEM_CLK_OUT => ip_cfg_mem_clk,
+ -- information for IP cores
+ DEST_MAC_OUT => ic_dest_mac,
+ DEST_IP_OUT => ic_dest_ip,
+ DEST_UDP_OUT => ic_dest_udp,
+ SRC_MAC_OUT => ic_src_mac,
+ SRC_IP_OUT => ic_src_ip,
+ SRC_UDP_OUT => ic_src_udp,
+ MTU_OUT => open,
+ -- Debug
+ DEBUG_OUT => open
+ );
+
+ MB_IP_CONFIG : slv_mac_memory
+ port map(
+ CLK => CLK,
+ RESET => RESET,
+ BUSY_IN => '0',
+ -- Slave bus
+ SLV_ADDR_IN => SLV_ADDR_IN,
+ SLV_READ_IN => SLV_READ_IN,
+ SLV_WRITE_IN => SLV_WRITE_IN,
+ SLV_BUSY_OUT => SLV_BUSY_OUT,
+ SLV_ACK_OUT => SLV_ACK_OUT,
+ SLV_DATA_IN => SLV_DATA_IN,
+ SLV_DATA_OUT => SLV_DATA_OUT,
+ -- I/O to the backend
+ MEM_CLK_IN => ip_cfg_mem_clk,
+ MEM_ADDR_IN => ip_cfg_mem_addr,
+ MEM_DATA_OUT => ip_cfg_mem_data,
+ -- Status lines
+ STAT => open
+ );
+
+ THE_IPU_INTERFACE : entity work.trb_net16_gbe_ipu_interface
+ generic map(
+ DO_SIMULATION => DO_SIMULATION
+ )
+ port map(
+ CLK_IPU => CLK,
+ CLK_GBE => CLK,
+ RESET => RESET,
+ --Event information coming from CTS
+ CTS_NUMBER_IN => CTS_NUMBER_IN,
+ CTS_CODE_IN => CTS_CODE_IN,
+ CTS_INFORMATION_IN => CTS_INFORMATION_IN,
+ CTS_READOUT_TYPE_IN => CTS_READOUT_TYPE_IN,
+ CTS_START_READOUT_IN => CTS_START_READOUT_IN,
+ --Information sent to CTS
+ --status data, equipped with DHDR
+ CTS_DATA_OUT => CTS_DATA_OUT,
+ CTS_DATAREADY_OUT => CTS_DATAREADY_OUT,
+ CTS_READOUT_FINISHED_OUT => CTS_READOUT_FINISHED_OUT,
+ CTS_READ_IN => CTS_READ_IN,
+ CTS_LENGTH_OUT => CTS_LENGTH_OUT,
+ CTS_ERROR_PATTERN_OUT => CTS_ERROR_PATTERN_OUT,
+ -- Data from Frontends
+ FEE_DATA_IN => FEE_DATA_IN,
+ FEE_DATAREADY_IN => FEE_DATAREADY_IN,
+ FEE_READ_OUT => FEE_READ_OUT,
+ FEE_STATUS_BITS_IN => FEE_STATUS_BITS_IN,
+ FEE_BUSY_IN => FEE_BUSY_IN,
+ -- slow control interface
+ START_CONFIG_OUT => ip_cfg_start,
+ BANK_SELECT_OUT => ip_cfg_bank,
+ CONFIG_DONE_IN => ip_cfg_done,
+ DATA_GBE_ENABLE_IN => CFG_GBE_ENABLE_IN,
+ DATA_IPU_ENABLE_IN => CFG_IPU_ENABLE_IN,
+ MULT_EVT_ENABLE_IN => CFG_MULT_ENABLE_IN,
+ MAX_SUBEVENT_SIZE_IN => CFG_MAX_SUB_IN,
+ MAX_QUEUE_SIZE_IN => CFG_MAX_QUEUE_IN,
+ MAX_SUBS_IN_QUEUE_IN => CFG_MAX_SUBS_IN_QUEUE_IN,
+ MAX_SINGLE_SUB_SIZE_IN => CFG_MAX_SINGLE_SUB_IN,
+ READOUT_CTR_IN => CFG_READOUT_CTR_IN,
+ READOUT_CTR_VALID_IN => CFG_READOUT_CTR_VALID_IN,
+ CFG_AUTO_THROTTLE_IN => CFG_AUTO_THROTTLE_IN,
+ CFG_THROTTLE_PAUSE_IN => CFG_THROTTLE_PAUSE_IN,
+
+ -- PacketConstructor interface
+ PC_WR_EN_OUT => pc_wr_en,
+ PC_DATA_OUT => pc_data,
+ PC_READY_IN => pc_ready,
+ PC_SOS_OUT => pc_sos,
+ PC_EOS_OUT => pc_eos,
+ PC_EOQ_OUT => pc_eoq,
+ PC_SUB_SIZE_OUT => pc_sub_size,
+ PC_TRIG_NR_OUT => pc_trig_nr,
+ PC_TRIGGER_TYPE_OUT => pc_trig_type,
+ MONITOR_OUT => ipu_monitor,
+ DEBUG_OUT => ipu_dbg
+ );
+
+ MONITOR_SELECT_DROP_OUT_OUT <= ipu_monitor(31 downto 0);
+
+ PACKET_CONSTRUCTOR : entity work.trb_net16_gbe_event_constr
+ generic map(
+ READOUT_BUFFER_SIZE => READOUT_BUFFER_SIZE,
+ DO_SIMULATION => DO_SIMULATION
+ )
+ port map(
+ CLK => CLK,
+ RESET => RESET,
+ PC_WR_EN_IN => pc_wr_en,
+ PC_DATA_IN => pc_data,
+ PC_READY_OUT => pc_ready,
+ PC_START_OF_SUB_IN => pc_sos,
+ PC_END_OF_SUB_IN => pc_eos,
+ PC_END_OF_QUEUE_IN => pc_eoq,
+ PC_SUB_SIZE_IN => pc_sub_size,
+ PC_DECODING_IN => CFG_SUBEVENT_DEC_IN,
+ PC_EVENT_ID_IN => CFG_SUBEVENT_ID_IN,
+ PC_TRIG_NR_IN => pc_trig_nr,
+ PC_TRIGGER_TYPE_IN => pc_trig_type_shift,
+ PC_QUEUE_DEC_IN => CFG_QUEUE_DEC_IN,
+ PC_INSERT_TTYPE_IN => CFG_INSERT_TTYPE_IN,
+ TC_RD_EN_IN => tc_rd_en,
+ TC_DATA_OUT => tc_data,
+ TC_EVENT_SIZE_OUT => tc_size,
+ TC_SOD_OUT => tc_sod,
+ DEBUG_OUT => constr_dbg
+ );
+
+ tc_rd_en <= '1' when PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1' else '0';
+
+ DISSECT_MACHINE_PROC : process(RESET, CLK)
begin
if RESET = '1' then
- sim_check_current <= IDLE;
+ dissect_current_state <= IDLE;
elsif rising_edge(CLK) then
- sim_check_current <= sim_check_next;
+ dissect_current_state <= dissect_next_state;
end if;
- end process;
-
- process(sim_check_current, tc_sod, loaded_bytes, tc_size, hdr, tlr, event_bytes)
+ end process DISSECT_MACHINE_PROC;
+
+ DISSECT_MACHINE : process(dissect_current_state, tc_sod, event_bytes, loaded_bytes, PS_SELECTED_IN)
begin
- case (sim_check_current) is
-
+ case dissect_current_state is
when IDLE =>
if (tc_sod = '1') then
- sim_check_next <= SAVE_HDR;
+ dissect_next_state <= WAIT_FOR_LOAD;
else
- sim_check_next <= IDLE;
+ dissect_next_state <= IDLE;
end if;
-
- when SAVE_HDR =>
- if (loaded_bytes = x"001f" + x"0002") then
- sim_check_next <= GO_OVER_DATA;
+
+ when WAIT_FOR_LOAD =>
+ if (PS_SELECTED_IN = '1') then
+ dissect_next_state <= LOAD;
else
- sim_check_next <= SAVE_HDR;
+ dissect_next_state <= WAIT_FOR_LOAD;
end if;
-
- when GO_OVER_DATA =>
- if (loaded_bytes = tc_size + x"0001") then
- sim_check_next <= SAVE_TLR;
- else
- sim_check_next <= GO_OVER_DATA;
- end if;
-
- when SAVE_TLR =>
- if (loaded_bytes = event_bytes) then
- sim_check_next <= GET_ONE_MORE;
+
+ when LOAD =>
+ if (event_bytes = loaded_bytes) then
+ dissect_next_state <= CLEANUP;
else
- sim_check_next <= SAVE_TLR;
+ dissect_next_state <= LOAD;
end if;
-
- when GET_ONE_MORE =>
- sim_check_next <= GET_SECOND_MORE;
-
- when GET_SECOND_MORE =>
- sim_check_next <= CLEANUP;
-
+
when CLEANUP =>
-
- --assert (hdr = tlr) report "--------- >>>> Header Trailer mismatch" severity failure;
-
- sim_check_next <= IDLE;
-
+ dissect_next_state <= IDLE;
+
end case;
- end process;
-
- process(CLK)
+ end process DISSECT_MACHINE;
+
+ PS_BUSY_OUT <= '0' when dissect_current_state = IDLE else '1';
+ PS_RESPONSE_READY_OUT <= '1' when (dissect_current_state = LOAD) or (dissect_current_state = WAIT_FOR_LOAD) else '0';
+
+ TC_DATA_OUT <= tc_data;
+
+ EVENT_BYTES_PROC : process(clk) is
begin
- if rising_edge(CLK) then
- if (sim_check_current = SAVE_HDR and loaded_bytes > x"0001") then
- hdr((to_integer(unsigned(loaded_bytes - x"0002") * 8)) + 7 downto (to_integer(unsigned(loaded_bytes - x"0002")) * 8)) <= tc_data(7 downto 0);
+ if rising_edge(clk) then
+ if dissect_current_state = IDLE and tc_sod = '1' then
+ event_bytes <= tc_size + x"20"; -- adding termination bytes
else
- hdr <= hdr;
+ event_bytes <= event_bytes;
end if;
end if;
- end process;
-
- process(CLK)
+ end process EVENT_BYTES_PROC;
+
+ LOADED_BYTES_PROC : process(clk) is
begin
- if rising_edge(CLK) then
- if (sim_check_current = SAVE_TLR) then
- tlr((to_integer(unsigned(loaded_bytes - tc_size - 2) * 8)) + 7 downto (to_integer(unsigned(loaded_bytes - tc_size - 2)) * 8)) <= tc_data(7 downto 0);
- elsif (sim_check_current = GET_ONE_MORE) then
- tlr((to_integer(unsigned(loaded_bytes - tc_size - 1) * 8)) + 7 downto (to_integer(unsigned(loaded_bytes - tc_size - 1)) * 8)) <= tc_data(7 downto 0);
- elsif (sim_check_current = GET_ONE_MORE) then
- tlr((to_integer(unsigned(loaded_bytes - tc_size) * 8)) + 7 downto (to_integer(unsigned(loaded_bytes - tc_size)) * 8)) <= tc_data(7 downto 0);
+ if rising_edge(clk) then
+ if (dissect_current_state = IDLE) then
+ loaded_bytes <= (others => '0');
+ elsif (dissect_current_state = LOAD and TC_RD_EN_IN = '1') then
+ loaded_bytes <= loaded_bytes + x"1";
else
- tlr <= tlr;
+ loaded_bytes <= loaded_bytes;
end if;
end if;
- end process;
-
-
-end generate sim_check_gen;
-
-
-
-
-THE_IP_CONFIGURATOR: ip_configurator
-port map(
- CLK => CLK,
- RESET => RESET,
- -- configuration interface
- START_CONFIG_IN => ip_cfg_start,
- BANK_SELECT_IN => ip_cfg_bank,
- CONFIG_DONE_OUT => ip_cfg_done,
- MEM_ADDR_OUT => ip_cfg_mem_addr,
- MEM_DATA_IN => ip_cfg_mem_data,
- MEM_CLK_OUT => ip_cfg_mem_clk,
- -- information for IP cores
- DEST_MAC_OUT => ic_dest_mac,
- DEST_IP_OUT => ic_dest_ip,
- DEST_UDP_OUT => ic_dest_udp,
- SRC_MAC_OUT => ic_src_mac,
- SRC_IP_OUT => ic_src_ip,
- SRC_UDP_OUT => ic_src_udp,
- MTU_OUT => open,
- -- Debug
- DEBUG_OUT => open
-);
-
-MB_IP_CONFIG: slv_mac_memory
-port map(
- CLK => CLK,
- RESET => RESET,
- BUSY_IN => '0',
- -- Slave bus
- SLV_ADDR_IN => SLV_ADDR_IN,
- SLV_READ_IN => SLV_READ_IN,
- SLV_WRITE_IN => SLV_WRITE_IN,
- SLV_BUSY_OUT => SLV_BUSY_OUT,
- SLV_ACK_OUT => SLV_ACK_OUT,
- SLV_DATA_IN => SLV_DATA_IN,
- SLV_DATA_OUT => SLV_DATA_OUT,
- -- I/O to the backend
- MEM_CLK_IN => ip_cfg_mem_clk,
- MEM_ADDR_IN => ip_cfg_mem_addr,
- MEM_DATA_OUT => ip_cfg_mem_data,
- -- Status lines
- STAT => open
-);
-
-THE_IPU_INTERFACE: entity work.trb_net16_gbe_ipu_interface
-generic map (
- DO_SIMULATION => DO_SIMULATION
-)
-port map(
- CLK_IPU => CLK,
- CLK_GBE => CLK,
- RESET => RESET,
- --Event information coming from CTS
- CTS_NUMBER_IN => CTS_NUMBER_IN,
- CTS_CODE_IN => CTS_CODE_IN,
- CTS_INFORMATION_IN => CTS_INFORMATION_IN,
- CTS_READOUT_TYPE_IN => CTS_READOUT_TYPE_IN,
- CTS_START_READOUT_IN => CTS_START_READOUT_IN,
- --Information sent to CTS
- --status data, equipped with DHDR
- CTS_DATA_OUT => CTS_DATA_OUT,
- CTS_DATAREADY_OUT => CTS_DATAREADY_OUT,
- CTS_READOUT_FINISHED_OUT => CTS_READOUT_FINISHED_OUT,
- CTS_READ_IN => CTS_READ_IN,
- CTS_LENGTH_OUT => CTS_LENGTH_OUT,
- CTS_ERROR_PATTERN_OUT => CTS_ERROR_PATTERN_OUT,
- -- Data from Frontends
- FEE_DATA_IN => FEE_DATA_IN,
- FEE_DATAREADY_IN => FEE_DATAREADY_IN,
- FEE_READ_OUT => FEE_READ_OUT,
- FEE_STATUS_BITS_IN => FEE_STATUS_BITS_IN,
- FEE_BUSY_IN => FEE_BUSY_IN,
- -- slow control interface
- START_CONFIG_OUT => ip_cfg_start,
- BANK_SELECT_OUT => ip_cfg_bank,
- CONFIG_DONE_IN => ip_cfg_done,
- DATA_GBE_ENABLE_IN => CFG_GBE_ENABLE_IN,
- DATA_IPU_ENABLE_IN => CFG_IPU_ENABLE_IN,
- MULT_EVT_ENABLE_IN => CFG_MULT_ENABLE_IN,
- MAX_SUBEVENT_SIZE_IN => CFG_MAX_SUB_IN,
- MAX_QUEUE_SIZE_IN => CFG_MAX_QUEUE_IN,
- MAX_SUBS_IN_QUEUE_IN => CFG_MAX_SUBS_IN_QUEUE_IN,
- MAX_SINGLE_SUB_SIZE_IN => CFG_MAX_SINGLE_SUB_IN,
- READOUT_CTR_IN => CFG_READOUT_CTR_IN,
- READOUT_CTR_VALID_IN => CFG_READOUT_CTR_VALID_IN,
- -- PacketConstructor interface
- PC_WR_EN_OUT => pc_wr_en,
- PC_DATA_OUT => pc_data,
- PC_READY_IN => pc_ready,
- PC_SOS_OUT => pc_sos,
- PC_EOS_OUT => pc_eos,
- PC_EOQ_OUT => pc_eoq,
- PC_SUB_SIZE_OUT => pc_sub_size,
- PC_TRIG_NR_OUT => pc_trig_nr,
- PC_TRIGGER_TYPE_OUT => pc_trig_type,
- MONITOR_OUT => ipu_monitor,
- DEBUG_OUT => ipu_dbg
-);
-
-MONITOR_SELECT_DROP_OUT_OUT <= ipu_monitor(31 downto 0);
-
-PACKET_CONSTRUCTOR : entity work.trb_net16_gbe_event_constr
-generic map(
- READOUT_BUFFER_SIZE => READOUT_BUFFER_SIZE,
- DO_SIMULATION => DO_SIMULATION
-)
-port map(
- CLK => CLK,
- RESET => RESET,
- PC_WR_EN_IN => pc_wr_en,
- PC_DATA_IN => pc_data,
- PC_READY_OUT => pc_ready,
- PC_START_OF_SUB_IN => pc_sos,
- PC_END_OF_SUB_IN => pc_eos,
- PC_END_OF_QUEUE_IN => pc_eoq,
- PC_SUB_SIZE_IN => pc_sub_size,
- PC_DECODING_IN => CFG_SUBEVENT_DEC_IN,
- PC_EVENT_ID_IN => CFG_SUBEVENT_ID_IN,
- PC_TRIG_NR_IN => pc_trig_nr,
- PC_TRIGGER_TYPE_IN => pc_trig_type_shift,
- PC_QUEUE_DEC_IN => CFG_QUEUE_DEC_IN,
- PC_INSERT_TTYPE_IN => CFG_INSERT_TTYPE_IN,
- TC_RD_EN_IN => tc_rd_en,
- TC_DATA_OUT => tc_data,
- TC_EVENT_SIZE_OUT => tc_size,
- TC_SOD_OUT => tc_sod,
- DEBUG_OUT => constr_dbg
-);
-
-tc_rd_en <= '1' when PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1' else '0';
-
-DISSECT_MACHINE_PROC : process(RESET, CLK)
-begin
- if RESET = '1' then
- dissect_current_state <= IDLE;
- elsif rising_edge(CLK) then
- dissect_current_state <= dissect_next_state;
- end if;
-end process DISSECT_MACHINE_PROC;
-
-DISSECT_MACHINE : process(dissect_current_state, tc_sod, event_bytes, loaded_bytes, PS_SELECTED_IN)
-begin
- case dissect_current_state is
-
- when IDLE =>
- if (tc_sod = '1') then
- dissect_next_state <= WAIT_FOR_LOAD;
- else
- dissect_next_state <= IDLE;
- end if;
-
- when WAIT_FOR_LOAD =>
- if (PS_SELECTED_IN = '1') then
- dissect_next_state <= LOAD;
- else
- dissect_next_state <= WAIT_FOR_LOAD;
- end if;
-
- when LOAD =>
- if (event_bytes = loaded_bytes) then
- dissect_next_state <= CLEANUP;
- else
- dissect_next_state <= LOAD;
- end if;
-
- when CLEANUP =>
- dissect_next_state <= IDLE;
-
- end case;
-end process DISSECT_MACHINE;
+ end process LOADED_BYTES_PROC;
-PS_BUSY_OUT <= '0' when dissect_current_state = IDLE else '1';
-PS_RESPONSE_READY_OUT <= '1' when (dissect_current_state = LOAD) or (dissect_current_state = WAIT_FOR_LOAD) else '0';
+ TC_FRAME_SIZE_OUT <= event_bytes;
+ TC_FRAME_TYPE_OUT <= x"0008";
-TC_DATA_OUT <= tc_data;
+ TC_DEST_MAC_OUT <= ic_dest_mac_shift; --x"c4e870211b00"; --ic_dest_mac;
+ TC_DEST_IP_OUT <= ic_dest_ip_shift; --x"0300a8c0"; --ic_dest_ip;
+ TC_DEST_UDP_OUT <= ic_dest_udp_shift; --x"c35c"; --ic_dest_udp;
-EVENT_BYTES_PROC : process (clk) is
-begin
- if rising_edge(clk) then
- if dissect_current_state = IDLE and tc_sod = '1' then
- event_bytes <= tc_size + x"20"; -- adding termination bytes
- else
- event_bytes <= event_bytes;
- end if;
- end if;
-end process EVENT_BYTES_PROC;
+ --TC_DEST_MAC_OUT <= x"87883c290c00"; --ic_dest_mac;
+ --TC_DEST_IP_OUT <= x"0188a8c0"; --ic_dest_ip;
+ --TC_DEST_UDP_OUT <= x"c35b"; --ic_dest_udp;
-LOADED_BYTES_PROC : process (clk) is
-begin
- if rising_edge(clk) then
- if (dissect_current_state = IDLE) then
- loaded_bytes <= (others => '0');
- elsif (dissect_current_state = LOAD and TC_RD_EN_IN = '1') then
- loaded_bytes <= loaded_bytes + x"1";
- else
- loaded_bytes <= loaded_bytes;
- end if;
- end if;
-end process LOADED_BYTES_PROC;
+ process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if (ip_cfg_start = '1') then
+ ic_dest_mac_shift <= ic_dest_mac;
+ ic_dest_ip_shift <= ic_dest_ip;
+ ic_dest_udp_shift <= ic_dest_udp;
-TC_FRAME_SIZE_OUT <= event_bytes;
-TC_FRAME_TYPE_OUT <= x"0008";
+ ic_src_mac_shift <= ic_src_mac;
+ ic_src_ip_shift <= ic_src_ip;
+ ic_src_udp_shift <= ic_src_udp;
-TC_DEST_MAC_OUT <= ic_dest_mac_shift; --x"c4e870211b00"; --ic_dest_mac;
-TC_DEST_IP_OUT <= ic_dest_ip_shift; --x"0300a8c0"; --ic_dest_ip;
-TC_DEST_UDP_OUT <= ic_dest_udp_shift; --x"c35c"; --ic_dest_udp;
+ pc_trig_type_shift <= pc_trig_type;
+ else
+ ic_dest_mac_shift <= ic_dest_mac_shift;
+ ic_dest_ip_shift <= ic_dest_ip_shift;
+ ic_dest_udp_shift <= ic_dest_udp_shift;
---TC_DEST_MAC_OUT <= x"87883c290c00"; --ic_dest_mac;
---TC_DEST_IP_OUT <= x"0188a8c0"; --ic_dest_ip;
---TC_DEST_UDP_OUT <= x"c35b"; --ic_dest_udp;
+ ic_src_mac_shift <= ic_src_mac_shift;
+ ic_src_ip_shift <= ic_src_ip_shift;
+ ic_src_udp_shift <= ic_src_udp_shift;
-process(CLK)
-begin
- if rising_edge(CLK) then
- if (ip_cfg_start = '1') then
- ic_dest_mac_shift <= ic_dest_mac;
- ic_dest_ip_shift <= ic_dest_ip;
- ic_dest_udp_shift <= ic_dest_udp;
-
- ic_src_mac_shift <= ic_src_mac;
- ic_src_ip_shift <= ic_src_ip;
- ic_src_udp_shift <= ic_src_udp;
-
- pc_trig_type_shift <= pc_trig_type;
- else
- ic_dest_mac_shift <= ic_dest_mac_shift;
- ic_dest_ip_shift <= ic_dest_ip_shift;
- ic_dest_udp_shift <= ic_dest_udp_shift;
-
- ic_src_mac_shift <= ic_src_mac_shift;
- ic_src_ip_shift <= ic_src_ip_shift;
- ic_src_udp_shift <= ic_src_udp_shift;
-
- pc_trig_type_shift <= pc_trig_type_shift;
- end if;
- end if;
-end process;
-
-
-
-rx_enable_gen : if (RX_PATH_ENABLE = 1) generate
- TC_SRC_MAC_OUT <= MY_MAC_IN;
- TC_SRC_IP_OUT <= MY_IP_IN;
-end generate rx_enable_gen;
-
-rx_disable_gen : if (RX_PATH_ENABLE = 0) generate
- TC_SRC_MAC_OUT <= MY_MAC_IN;
- TC_SRC_IP_OUT <= ic_src_ip_shift;
-end generate rx_disable_gen;
-
-TC_SRC_UDP_OUT <= ic_src_udp_shift;
-TC_IP_PROTOCOL_OUT <= x"11";
-TC_IDENT_OUT <= x"4" & sent_packets(11 downto 0);
-
-SENT_PACKETS_PROC : process(CLK)
-begin
- if rising_edge(CLK) then
- if (RESET = '1') then
- sent_packets <= (others => '0');
- elsif (dissect_current_state = IDLE and tc_sod = '1') then
- sent_packets <= sent_packets + x"1";
+ pc_trig_type_shift <= pc_trig_type_shift;
+ end if;
end if;
- end if;
-end process SENT_PACKETS_PROC;
+ end process;
--- monitoring
+ rx_enable_gen : if (RX_PATH_ENABLE = 1) generate
+ TC_SRC_MAC_OUT <= MY_MAC_IN;
+ TC_SRC_IP_OUT <= MY_IP_IN;
+ end generate rx_enable_gen;
+ rx_disable_gen : if (RX_PATH_ENABLE = 0) generate
+ TC_SRC_MAC_OUT <= MY_MAC_IN;
+ TC_SRC_IP_OUT <= ic_src_ip_shift;
+ end generate rx_disable_gen;
-process(CLK)
-begin
- if rising_edge(CLK) then
- if (tc_sod = '1' and tc_sod_flag = '0') then
- tc_sod_flag <= '1';
- elsif (tc_sod = '0') then
- tc_sod_flag <= '0';
- else
- tc_sod_flag <= tc_sod_flag;
+ TC_SRC_UDP_OUT <= ic_src_udp_shift;
+ TC_IP_PROTOCOL_OUT <= x"11";
+ TC_IDENT_OUT <= x"4" & sent_packets(11 downto 0);
+
+ SENT_PACKETS_PROC : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if (RESET = '1') then
+ sent_packets <= (others => '0');
+ elsif (dissect_current_state = IDLE and tc_sod = '1') then
+ sent_packets <= sent_packets + x"1";
+ end if;
end if;
- end if;
-end process;
+ end process SENT_PACKETS_PROC;
+
+ -- monitoring
-hist_ctrs_gen : for i in 0 to 31 generate
process(CLK)
begin
if rising_edge(CLK) then
- if (RESET = '1') then
- reset_all_hist(i) <= '1';
- elsif (hist_inst(i) = x"ffff_ffff") then
- reset_all_hist(i) <= '1';
+ if (tc_sod = '1' and tc_sod_flag = '0') then
+ tc_sod_flag <= '1';
+ elsif (tc_sod = '0') then
+ tc_sod_flag <= '0';
else
- reset_all_hist(i) <= '0';
- end if;
+ tc_sod_flag <= tc_sod_flag;
+ end if;
end if;
end process;
- HIST_PROC : process(CLK)
+ hist_ctrs_gen : for i in 0 to 31 generate
+ process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if (RESET = '1') then
+ reset_all_hist(i) <= '1';
+ elsif (hist_inst(i) = x"ffff_ffff") then
+ reset_all_hist(i) <= '1';
+ else
+ reset_all_hist(i) <= '0';
+ end if;
+ end if;
+ end process;
+
+ HIST_PROC : process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if (RESET = '1') or (reset_all_hist /= x"0000_0000") then
+ hist_inst(i) <= (others => '0');
+ elsif (tc_sod = '1' and tc_sod_flag = '0' and i = to_integer(unsigned(event_bytes(15 downto 11)))) then
+ hist_inst(i) <= hist_inst(i) + x"1";
+ else
+ hist_inst(i) <= hist_inst(i);
+ end if;
+ end if;
+ end process;
+ end generate hist_ctrs_gen;
+
+ DATA_HIST_OUT <= hist_inst;
+
+ process(CLK)
begin
if rising_edge(CLK) then
- if (RESET = '1') or (reset_all_hist /= x"0000_0000") then
- hist_inst(i) <= (others => '0');
- elsif (tc_sod = '1' and tc_sod_flag = '0' and i = to_integer(unsigned(event_bytes(15 downto 11)))) then
- hist_inst(i) <= hist_inst(i) + x"1";
+ if (RESET = '1') then
+ mon_sent_frames <= (others => '0');
+ elsif (dissect_current_state = LOAD and event_bytes = loaded_bytes) then
+ mon_sent_frames <= mon_sent_frames + x"1";
else
- hist_inst(i) <= hist_inst(i);
+ mon_sent_frames <= mon_sent_frames;
end if;
end if;
end process;
-end generate hist_ctrs_gen;
+ MONITOR_SELECT_SENT_OUT <= mon_sent_frames;
-DATA_HIST_OUT <= hist_inst;
-
-process(CLK)
-begin
- if rising_edge(CLK) then
- if (RESET = '1') then
- mon_sent_frames <= (others => '0');
- elsif (dissect_current_state = LOAD and event_bytes = loaded_bytes) then
- mon_sent_frames <= mon_sent_frames + x"1";
- else
- mon_sent_frames <= mon_sent_frames;
- end if;
- end if;
-end process;
-MONITOR_SELECT_SENT_OUT <= mon_sent_frames;
-
-process(CLK)
-begin
- if rising_edge(CLK) then
- if (RESET = '1') then
- mon_sent_bytes <= (others => '0');
- elsif (tc_rd_en = '1') then
- mon_sent_bytes <= mon_sent_bytes + x"1";
- else
- mon_sent_bytes <= mon_sent_bytes;
+ process(CLK)
+ begin
+ if rising_edge(CLK) then
+ if (RESET = '1') then
+ mon_sent_bytes <= (others => '0');
+ elsif (tc_rd_en = '1') then
+ mon_sent_bytes <= mon_sent_bytes + x"1";
+ else
+ mon_sent_bytes <= mon_sent_bytes;
+ end if;
end if;
- end if;
-end process;
-
-MONITOR_SELECT_SENT_BYTES_OUT <= mon_sent_bytes;
-
-
-MONITOR_SELECT_REC_BYTES_OUT <= (others => '0');
-MONITOR_SELECT_REC_OUT <= (others => '0');
+ end process;
-DEBUG_OUT(31 downto 0) <= ipu_dbg(31 downto 0);
-DEBUG_OUT(63 downto 32) <= constr_dbg(31 downto 0);
+ MONITOR_SELECT_SENT_BYTES_OUT <= mon_sent_bytes;
+ MONITOR_SELECT_REC_BYTES_OUT <= (others => '0');
+ MONITOR_SELECT_REC_OUT <= (others => '0');
+ DEBUG_OUT(31 downto 0) <= ipu_dbg(31 downto 0);
+ DEBUG_OUT(63 downto 32) <= constr_dbg(31 downto 0);
end trb_net16_gbe_response_constructor_TrbNetData;
END aa_full_wrapper_tb;
ARCHITECTURE behavior OF aa_full_wrapper_tb IS
-
-signal clk_sys, clk_125, reset, gsr_n, trigger : std_logic := '0';
+ signal clk_sys, clk_125, reset, gsr_n, trigger : std_logic := '0';
+ signal busip0, busip1 : CTRLBUS_RX;
begin
-
uut : entity work.gbe_wrapper
generic map(
DO_SIMULATION => 1,
USE_INTERNAL_TRBNET_DUMMY => 0,
USE_EXTERNAL_TRBNET_DUMMY => 1,
RX_PATH_ENABLE => 1,
- FIXED_SIZE_MODE => 0,
- INCREMENTAL_MODE => 1,
+ FIXED_SIZE_MODE => 1,
+ INCREMENTAL_MODE => 0,
FIXED_SIZE => 100, --13750,
FIXED_DELAY_MODE => 1,
UP_DOWN_MODE => 1,
LINK_HAS_PING => "1111",
LINK_HAS_ARP => "1111",
LINK_HAS_DHCP => "1111",
- LINK_HAS_READOUT => "1000",
- LINK_HAS_SLOWCTRL => "1000",
- NUMBER_OF_OUTPUT_LINKS => 4
+ LINK_HAS_READOUT => "1100",
+ LINK_HAS_SLOWCTRL => "0000"
)
port map(
CLK_SYS_IN => clk_sys,
CLK_125_IN => clk_125,
RESET => reset,
GSR_N => gsr_n,
- SD_RXD_P_IN => (others => '0'),
- SD_RXD_N_IN => (others => '0'),
- SD_TXD_P_OUT => open,
- SD_TXD_N_OUT => open,
SD_PRSNT_N_IN => (others => '0'),
SD_LOS_IN => (others => '0'),
SD_TXDIS_OUT => open,
GSC_REPLY_PACKET_NUM_IN => "111",
GSC_REPLY_READ_OUT => open,
GSC_BUSY_IN => '0',
- SLV_ADDR_IN => (others => '0'),
- SLV_READ_IN => '0',
- SLV_WRITE_IN => '0',
- SLV_BUSY_OUT => open,
- SLV_ACK_OUT => open,
- SLV_DATA_IN => (others => '0'),
- SLV_DATA_OUT => open,
- BUS_ADDR_IN => (others => '0'),
- BUS_DATA_IN => (others => '0'),
- BUS_DATA_OUT => open,
- BUS_WRITE_EN_IN => '0',
- BUS_READ_EN_IN => '0',
- BUS_ACK_OUT => open,
+ -- IP configuration
+ BUS_IP_RX => busip0,
+ BUS_IP_TX => open,
+ -- Registers config
+ BUS_REG_RX => busip1,
+ BUS_REG_TX => open,
MAKE_RESET_OUT => open,
DEBUG_OUT => open
);
process
begin
- clk_sys <= '1'; wait for 5 ns;
- clk_sys <= '0'; wait for 5 ns;
+ clk_sys <= '1';
+ wait for 5 ns;
+ clk_sys <= '0';
+ wait for 5 ns;
end process;
-
+
process
begin
- clk_125 <= '1'; wait for 4 ns;
- clk_125 <= '0'; wait for 4 ns;
+ clk_125 <= '1';
+ wait for 4 ns;
+ clk_125 <= '0';
+ wait for 4 ns;
end process;
-
+
process
begin
reset <= '1';
reset <= '0';
gsr_n <= '1';
wait for 20 us;
-
- trigger <= '1';
-
--- for i in 0 to 10000 loop
--- trigger <= '1';
--- wait for 100 ns;
--- trigger <= '0';
--- wait for 10 us;
--- end loop;
-
+
+ --trigger <= '1';
+
+ -- for i in 0 to 10000 loop
+ -- trigger <= '1';
+ -- wait for 100 ns;
+ -- trigger <= '0';
+ -- wait for 10 us;
+ -- end loop;
+
wait;
end process;
-
end;
\ No newline at end of file
LOCATE UGROUP "THE_HUB/THE_HUB/gen_bufs.3.gen_iobufs.1.gen_iobuf.IOBUF/GEN_IBUF.THE_IBUF/IBUF_group" REGION "REGION_IOBUF" ;
LOCATE UGROUP "THE_HUB/THE_HUB/gen_bufs.2.gen_iobufs.0.gen_iobuf.IOBUF/GEN_IBUF.THE_IBUF/IBUF_group" REGION "REGION_IOBUF" ;
-#GbE Part
-UGROUP "tsmac"
- BLKNAME GBE/imp_gen.MAC
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SGMII_GBE_PCS
- BLKNAME GBE/rx_enable_gen.FRAME_RECEIVER
- BLKNAME GBE/FRAME_TRANSMITTER;
-UGROUP "controllers"
- BLKNAME GBE/main_gen.MAIN_CONTROL
- BLKNAME GBE/rx_enable_gen.RECEIVE_CONTROLLER
- BLKNAME GBE/transmit_gen.TRANSMIT_CONTROLLER;
-UGROUP "gbe_rx_tx"
- BLKNAME GBE/FRAME_CONSTRUCTOR
- BLKNAME GBE/main_gen.MAIN_CONTROL/protocol_selector/TrbNetData/MB_IP_CONFIG
- BLKNAME GBE/main_gen.MAIN_CONTROL/protocol_selector/TrbNetData/THE_IP_CONFIGURATOR
- BLKNAME GBE/setup_imp_gen.SETUP;
-
-#REGION "GBE_REGION" "R20C65D" 36 42 DEVSIZE;
-#REGION "MED0" "R81C30D" 34 40 DEVSIZE;
-#LOCATE UGROUP "gbe_rx_tx" REGION "GBE_REGION" ;
-#REGION "GBE_MAIN_REGION" "R50C64C" 65 64 DEVSIZE;
-#LOCATE UGROUP "controllers" REGION "GBE_MAIN_REGION" ;
-#LOCATE UGROUP "gbe_rx_tx" REGION "GBE_MAIN_REGION" ;
-
-UGROUP "sd_tx_to_pcs"
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_TX_PROC_sd_tx_correct_disp_q
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_TX_PROC_sd_tx_data_q[0]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_TX_PROC_sd_tx_data_q[1]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_TX_PROC_sd_tx_data_q[2]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_TX_PROC_sd_tx_data_q[3]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_TX_PROC_sd_tx_data_q[4]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_TX_PROC_sd_tx_data_q[5]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_TX_PROC_sd_tx_data_q[6]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_TX_PROC_sd_tx_data_q[7]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_TX_PROC_sd_tx_kcntl_q;
-UGROUP "sd_rx_to_pcs"
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_RX_PROC_sd_rx_cv_error_q
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_RX_PROC_sd_rx_data_q[0]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_RX_PROC_sd_rx_data_q[1]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_RX_PROC_sd_rx_data_q[2]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_RX_PROC_sd_rx_data_q[3]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_RX_PROC_sd_rx_data_q[4]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_RX_PROC_sd_rx_data_q[5]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_RX_PROC_sd_rx_data_q[6]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_RX_PROC_sd_rx_data_q[7]
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_RX_PROC_sd_rx_disp_error_q
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES/SYNC_RX_PROC_sd_rx_kcntl_q;
-UGROUP "pcs_tx_to_mac"
- BLKNAME GBE/pcs_tx_en_q
- BLKNAME GBE/pcs_tx_en_qq
- BLKNAME GBE/pcs_tx_er_q
- BLKNAME GBE/pcs_tx_er_qq
- BLKNAME GBE/pcs_txd_q[0]
- BLKNAME GBE/pcs_txd_q[1]
- BLKNAME GBE/pcs_txd_q[2]
- BLKNAME GBE/pcs_txd_q[3]
- BLKNAME GBE/pcs_txd_q[4]
- BLKNAME GBE/pcs_txd_q[5]
- BLKNAME GBE/pcs_txd_q[6]
- BLKNAME GBE/pcs_txd_q[7]
- BLKNAME GBE/pcs_txd_qq[0]
- BLKNAME GBE/pcs_txd_qq[1]
- BLKNAME GBE/pcs_txd_qq[2]
- BLKNAME GBE/pcs_txd_qq[3]
- BLKNAME GBE/pcs_txd_qq[4]
- BLKNAME GBE/pcs_txd_qq[5]
- BLKNAME GBE/pcs_txd_qq[6]
- BLKNAME GBE/pcs_txd_qq[7];
-UGROUP "pcs_rx_to_mac"
- BLKNAME GBE/pcs_rx_en_q
- BLKNAME GBE/pcs_rx_en_qq
- BLKNAME GBE/pcs_rx_er_q
- BLKNAME GBE/pcs_rx_er_qq
- BLKNAME GBE/pcs_rxd_q[0]
- BLKNAME GBE/pcs_rxd_q[1]
- BLKNAME GBE/pcs_rxd_q[2]
- BLKNAME GBE/pcs_rxd_q[3]
- BLKNAME GBE/pcs_rxd_q[4]
- BLKNAME GBE/pcs_rxd_q[5]
- BLKNAME GBE/pcs_rxd_q[6]
- BLKNAME GBE/pcs_rxd_q[7]
- BLKNAME GBE/pcs_rxd_qq[0]
- BLKNAME GBE/pcs_rxd_qq[1]
- BLKNAME GBE/pcs_rxd_qq[2]
- BLKNAME GBE/pcs_rxd_qq[3]
- BLKNAME GBE/pcs_rxd_qq[4]
- BLKNAME GBE/pcs_rxd_qq[5]
- BLKNAME GBE/pcs_rxd_qq[6]
- BLKNAME GBE/pcs_rxd_qq[7];
-
-UGROUP "GBE_SERDES_group" BBOX 10 67
- BLKNAME GBE/imp_gen.serdes_intclk_gen.PCS_SERDES;
-LOCATE UGROUP "GBE_SERDES_group" SITE "R105C17D" ;
-
-MAXDELAY NET "GBE/pcs_rx_e?_q" 1.500000 nS ;
-MAXDELAY NET "GBE/pcs_rxd_q[?]" 1.500000 nS ;
-
-DEFINE PORT GROUP "RX_GRP" "GBE/pcs_rx_en_q"
- "GBE/pcs_rx_er_q"
- "GBE/pcs_rxd_q*";
-INPUT_SETUP GROUP "RX_GRP" 3.500000 ns HOLD 0.000000 ns CLKPORT "GBE/serdes_rx_clk_c" ;
-
-PRIORITIZE NET "GBE/pcs_rx_en_q" 100 ;
-PRIORITIZE NET "GBE/pcs_rx_er_q" 100 ;
-PRIORITIZE NET "GBE/pcs_rxd_q[0]" 100 ;
-PRIORITIZE NET "GBE/pcs_rxd_q[1]" 100 ;
-PRIORITIZE NET "GBE/pcs_rxd_q[2]" 100 ;
-PRIORITIZE NET "GBE/pcs_rxd_q[3]" 100 ;
-PRIORITIZE NET "GBE/pcs_rxd_q[4]" 100 ;
-PRIORITIZE NET "GBE/pcs_rxd_q[5]" 100 ;
-PRIORITIZE NET "GBE/pcs_rxd_q[6]" 100 ;
-PRIORITIZE NET "GBE/pcs_rxd_q[7]" 100 ;
-PRIORITIZE NET "GBE/pcs_rxd_q[0]" 100 ;
-PRIORITIZE NET "GBE/serdes_rx_clk_c" 80 ;
-
#BLOCK PATH FROM CELL "GBE/imp_gen.MAC/U1_LSC_ts_mac_core/U1_cpu_if*" TO CELL "GBE/imp_gen.MAC/U1_LSC_ts_mac_core/U1_tx_mac*" ;
#BLOCK PATH FROM CELL "GBE/imp_gen.MAC/U1_LSC_ts_mac_core/U1_cpu_if*" TO CELL "GBE/imp_gen.MAC/U1_LSC_ts_mac_core/U1_rx_mac*" ;
signal data_length : signed(17 downto 0);
signal buf_FEE_DATAREADY_OUT : std_logic;
+signal gbe_finished_q : std_logic;
+
begin
APL_CTS_TARGET_ADDRESS <= x"FFFF";
cts_send_in_rising <= CTS_SEND_IN and not last_buf_CTS_SEND_IN;
last_cts_send_in_rising <= cts_send_in_rising;
+
+ gbe_finished_q <= GBE_READOUT_FINISHED_IN;
+
+ if (reset = '1') then
+ buf_CTS_START_READOUT_OUT <= '0';
+ else
+ buf_CTS_START_READOUT_OUT <= buf_CTS_START_READOUT_OUT;
+ end if;
if (CTS_SEND_IN and not last_buf_CTS_SEND_IN) = '1' then
buf_CTS_START_READOUT_OUT <= '1';
buf_CTS_NUMBER <= CTS_NUMBER_IN;
buf_CTS_READOUT_TYPE <= CTS_READOUT_TYPE_IN;
end if;
- if GBE_READOUT_FINISHED_IN = '1' then
+ if GBE_READOUT_FINISHED_IN = '1' and gbe_finished_q = '0' then
buf_CTS_START_READOUT_OUT <= '0';
CTS_STATUS_BITS_OUT <= GBE_STATUS_BITS_IN;
end if;
jspc29 / trbnet.git / commitdiff