signal tc_udp_size : std_logic_vector((c_MAX_PROTOCOLS + 1) * 16 - 1 downto 0);
signal tc_flags_size : std_logic_vector((c_MAX_PROTOCOLS + 1) * 16 - 1 downto 0);
+-- temporary
+signal gsc_init_dataready : std_logic;
+signal gsc_init_data : std_logic_vector(15 downto 0);
+signal gsc_init_packet_num : std_logic_vector(2 downto 0);
+signal gsc_init_read : std_logic;
+signal gsc_reply_dataready : std_logic;
+signal gsc_reply_data : std_logic_vector(15 downto 0);
+signal gsc_reply_packet_num : std_logic_vector(2 downto 0);
+signal gsc_reply_read : std_logic;
+signal gsc_busy : std_logic;
+
+attribute syn_preserve : boolean;
+attribute syn_keep : boolean;
+attribute syn_keep of gsc_busy, gsc_reply_read, gsc_reply_packet_num, gsc_reply_data, gsc_init_read, gsc_reply_dataready, gsc_init_packet_num, gsc_init_data, gsc_init_dataready : signal is true;
+attribute syn_preserve of gsc_busy, gsc_reply_read, gsc_reply_packet_num, gsc_reply_data, gsc_init_read, gsc_reply_dataready, gsc_init_packet_num, gsc_init_data, gsc_init_dataready : signal is true;
+
begin
-- protocol Nr. 1 ARP
DEBUG_OUT => PROTOS_DEBUG_OUT(4 * 32 - 1 downto 3 * 32)
);
+
+--GSC_INIT_DATAREADY_OUT <= gsc_init_dataready;
+--GSC_INIT_DATA_OUT <= gsc_init_data;
+--GSC_INIT_PACKET_NUM_OUT <= gsc_init_packet_num;
+--gsc_init_read <= GSC_INIT_READ_IN;
+--gsc_reply_dataready <= GSC_REPLY_DATAREADY_IN;
+--gsc_reply_data <= GSC_REPLY_DATA_IN;
+--gsc_reply_packet_num <= GSC_REPLY_PACKET_NUM_IN;
+--GSC_REPLY_READ_OUT <= gsc_reply_read;
+--gsc_busy <= GSC_BUSY_IN;
+
+
--stat_gen : if g_SIMULATE = 0 generate
Stat : trb_net16_gbe_response_constructor_Stat
generic map( STAT_ADDRESS_BASE => 10
signal tx_fifo_q : std_logic_vector(8 downto 0);
signal tx_fifo_wr, tx_fifo_rd : std_logic;
+signal tx_fifo_reset : std_logic;
signal gsc_reply_read : std_logic;
signal gsc_init_dataready : std_logic;
signal tx_frame_loaded : std_logic_vector(15 downto 0);
signal packet_num : std_logic_vector(2 downto 0);
-
+
signal init_ctr, reply_ctr : std_logic_vector(15 downto 0);
signal rx_empty, tx_empty : std_logic;
attribute syn_preserve : boolean;
attribute syn_keep : boolean;
-attribute syn_keep of tx_data_ctr, tx_loaded_ctr : signal is true;
-attribute syn_preserve of tx_data_ctr, tx_loaded_ctr : signal is true;
+attribute syn_keep of tx_data_ctr, tx_loaded_ctr, state : signal is true;
+attribute syn_preserve of tx_data_ctr, tx_loaded_ctr, state : signal is true;
signal temp_ctr : std_logic_vector(7 downto 0);
+
+signal gsc_init_read_q : std_logic;
+signal fifo_rd_q : std_logic;
+
+signal too_much_data : std_logic;
+
+signal divide_ctr : std_logic_vector(7 downto 0);
+
+signal temp_src_port : std_logic_vector(15 downto 0);
begin
);
rx_fifo_wr <= '1' when PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' else '0';
+
rx_fifo_rd <= '1' when (gsc_init_dataready = '1' and dissect_current_state = LOAD_TO_HUB) or
(gsc_init_dataready = '1' and dissect_current_state = WAIT_FOR_HUB and GSC_INIT_READ_IN = '1') or
(dissect_current_state = READ_FRAME and PS_DATA_IN(8) = '1')
else '0'; -- preload first word
GSC_INIT_DATA_OUT(7 downto 0) <= rx_fifo_q(16 downto 9);
-GSC_INIT_DATA_OUT(15 downto 8) <= rx_fifo_q(7 downto 0);
+GSC_INIT_DATA_OUT(15 downto 8) <= rx_fifo_q(7 downto 0);
+
GSC_INIT_PACKET_NUM_OUT <= packet_num;
-gsc_init_dataready <= '1' when (GSC_INIT_READ_IN = '1' and dissect_current_state = LOAD_TO_HUB) or
- (dissect_current_state = WAIT_FOR_HUB) else '0';
GSC_INIT_DATAREADY_OUT <= gsc_init_dataready;
+gsc_init_dataready <= '1' when (GSC_INIT_READ_IN = '1' and dissect_current_state = LOAD_TO_HUB) or
+ (dissect_current_state = WAIT_FOR_HUB) else '0';
+
+PACKET_NUM_PROC : process(CLK)
+begin
+ if rising_edge(CLK) then
+ if (RESET = '1') or (dissect_current_state = IDLE) then
+ packet_num <= "100";
+ elsif (GSC_INIT_READ_IN = '1' and gsc_init_dataready = '1' and packet_num = "100") then
+ packet_num <= "000";
+ elsif (rx_fifo_rd = '1' and packet_num /= "100") then
+ packet_num <= packet_num + "1";
+ end if;
+ end if;
+end process PACKET_NUM_PROC;
transmit_fifo : fifo_65536x18x9
PORT map(
- Reset => RESET,
- RPReset => RESET,
+ Reset => tx_fifo_reset,
+ RPReset => tx_fifo_reset,
WrClock => CLK,
RdClock => CLK,
Data(7 downto 0) => GSC_REPLY_DATA_IN(15 downto 8),
Empty => tx_empty
);
+tx_fifo_reset <= '1' when (RESET = '1') or (too_much_data = '1' and dissect_current_state = CLEANUP) else '0';
tx_fifo_wr <= '1' when GSC_REPLY_DATAREADY_IN = '1' and gsc_reply_read = '1' else '0';
tx_fifo_rd <= '1' when TC_RD_EN_IN = '1' and dissect_current_state = LOAD_FRAME and (tx_frame_loaded /= g_MAX_FRAME_SIZE) else '0';
---temp_ctr_proc : process(CLK)
---begin
--- if rising_edge(CLK) then
--- if RESET = '1' then
--- temp_ctr <= (others => '0');
--- elsif tx_fifo_rd = '1' then
--- temp_ctr <= temp_ctr + x"1";
--- end if;
--- end if;
---end process temp_ctr_proc;
-
TC_DATA_PROC : process(dissect_current_state, tx_loaded_ctr, tx_data_ctr, tx_frame_loaded, g_MAX_FRAME_SIZE)
begin
if (dissect_current_state = LOAD_FRAME) then
TC_DATA_OUT(7 downto 0) <= tx_fifo_q(7 downto 0);
- --TC_DATA_OUT(7 downto 0) <= temp_ctr;
- --if (tx_loaded_ctr = tx_data_ctr + x"1" or tx_frame_loaded = g_MAX_FRAME_SIZE + x"1") then
if (tx_loaded_ctr = tx_data_ctr or tx_frame_loaded = g_MAX_FRAME_SIZE - x"1") then
TC_DATA_OUT(8) <= '1';
else
TC_DATA_OUT <= (others => '0');
end if;
end process TC_DATA_PROC;
---TC_DATA_OUT(7 downto 0) <= tx_fifo_q(7 downto 0) when dissect_current_state = LOAD_FRAME else (others => '0');
---TC_DATA_OUT(8) <= '1' when ((tx_loaded_ctr = tx_data_ctr or tx_frame_loaded = g_MAX_FRAME_SIZE - x"1") and dissect_current_state = LOAD_FRAME) else '0';
+
GSC_REPLY_READ_OUT <= gsc_reply_read;
gsc_reply_read <= '1' when dissect_current_state = WAIT_FOR_RESPONSE or dissect_current_state = SAVE_RESPONSE else '0';
end if;
end process TX_DATA_CTR_PROC;
+TOO_MUCH_DATA_PROC : process(CLK)
+begin
+ if rising_edge(CLK) then
+ if (RESET = '1') or (dissect_current_state = IDLE) then
+ too_much_data <= '0';
+ elsif (dissect_current_state = SAVE_RESPONSE) and (tx_data_ctr = x"fa00") then
+ too_much_data <= '1';
+ end if;
+ end if;
+end process TOO_MUCH_DATA_PROC;
+
+DIVIDE_CTR_PROC : process(CLK)
+begin
+ if (RESET = '1') or (dissect_current_state = IDLE) then
+ divide_ctr <= (others => '0');
+ elsif (dissect_current_state = SAVE_RESPONSE) and (tx_data_ctr(10 downto 0) = b"101_0111_1000") then
+ divide_ctr <= divide_ctr + x"1";
+ end if;
+end process DIVIDE_CTR_PROC;
+
-- total counter of data transported to frame constructor
TX_LOADED_CTR_PROC : process(CLK)
begin
dissect_current_state = CLEANUP or dissect_current_state = WAIT_FOR_LOAD_ACK or
dissect_current_state = LOAD_ACK or dissect_current_state = DIVIDE)
else '0';
---PS_RESPONSE_READY_OUT <= '1' when (dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or
--- dissect_current_state = CLEANUP or dissect_current_state = DIVIDE)
--- else '0';
---TC_FRAME_SIZE_OUT <= tx_data_ctr;
+temp_src_port <= PS_SRC_UDP_PORT_IN + x"1";
TC_FRAME_TYPE_OUT <= x"0008";
TC_DEST_MAC_OUT <= PS_SRC_MAC_ADDRESS_IN;
TC_DEST_IP_OUT <= PS_SRC_IP_ADDRESS_IN;
-TC_DEST_UDP_OUT <= x"a861";
+TC_DEST_UDP_OUT(7 downto 0) <= temp_src_port(15 downto 8); --x"a861";
+TC_DEST_UDP_OUT(15 downto 8) <= temp_src_port(7 downto 0); --x"a861";
TC_SRC_MAC_OUT <= g_MY_MAC;
TC_SRC_IP_OUT <= g_MY_IP;
TC_SRC_UDP_OUT <= x"a861";
end if;
end if;
end process FRAME_SIZE_PROC;
---TC_FRAME_SIZE_OUT <= tx_data_ctr when (dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME) else x"0010";
-
---IP_SIZE_PROC : process(CLK)
---begin
--- if rising_edge(CLK) then
--- if (RESET= '1' or dissect_current_state = IDLE) then
--- TC_IP_SIZE_OUT <= (others => '0');
--- elsif ((dissect_current_state = DIVIDE and TC_RD_EN_IN = '1' and PS_SELECTED_IN = '1') or (dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = WAIT_FOR_TC)) then
--- if (size_left >= g_MAX_FRAME_SIZE) then
--- TC_IP_SIZE_OUT <= g_MAX_FRAME_SIZE;
--- else
--- TC_IP_SIZE_OUT <= size_left(15 downto 0);
--- end if;
--- end if;
--- end if;
---end process IP_SIZE_PROC;
-TC_UDP_SIZE_OUT <= tx_data_ctr;
+TC_UDP_SIZE_OUT <= tx_data_ctr - divide_ctr(7 downto 1);
TC_FLAGS_OFFSET_OUT(15 downto 14) <= "00";
end if;
end process OFFSET_PROC;
-
-PACKET_NUM_PROC : process(CLK)
-begin
- if rising_edge(CLK) then
- if (RESET = '1') or (dissect_current_state = IDLE) then
- packet_num <= "100";
- elsif (GSC_INIT_READ_IN = '1' and gsc_init_dataready = '1' and packet_num = "100") then
- packet_num <= "000";
- elsif (rx_fifo_rd = '1' and packet_num /= "100") then
- packet_num <= packet_num + "1";
- end if;
- end if;
-end process PACKET_NUM_PROC;
-
-
DISSECT_MACHINE_PROC : process(CLK)
begin
if rising_edge(CLK) then
end if;
end process DISSECT_MACHINE_PROC;
-DISSECT_MACHINE : process(dissect_current_state, reset_detected, PS_WR_EN_IN, PS_ACTIVATE_IN, PS_DATA_IN, TC_BUSY_IN, data_ctr, PS_SELECTED_IN, GSC_INIT_READ_IN, GSC_REPLY_DATAREADY_IN, tx_loaded_ctr, tx_data_ctr, rx_fifo_q, GSC_BUSY_IN, tx_frame_loaded, g_MAX_FRAME_SIZE)
+DISSECT_MACHINE : process(dissect_current_state, reset_detected, too_much_data, PS_WR_EN_IN, PS_ACTIVATE_IN, PS_DATA_IN, TC_BUSY_IN, data_ctr, PS_SELECTED_IN, GSC_INIT_READ_IN, GSC_REPLY_DATAREADY_IN, tx_loaded_ctr, tx_data_ctr, rx_fifo_q, GSC_BUSY_IN, tx_frame_loaded, g_MAX_FRAME_SIZE)
begin
case dissect_current_state is
when SAVE_RESPONSE =>
state <= x"6";
if (GSC_REPLY_DATAREADY_IN = '0' and GSC_BUSY_IN = '0') then
- dissect_next_state <= WAIT_FOR_LOAD;
+ if (too_much_data = '0') then
+ dissect_next_state <= WAIT_FOR_LOAD;
+ else
+ dissect_next_state <= CLEANUP;
+ end if;
else
dissect_next_state <= SAVE_RESPONSE;
end if;
if (tx_loaded_ctr = tx_data_ctr) then
dissect_next_state <= CLEANUP;
elsif (tx_frame_loaded = g_MAX_FRAME_SIZE) then
- dissect_next_state <= DIVIDE; --WAIT_FOR_TC; --DIVIDE;
+ dissect_next_state <= DIVIDE;
else
dissect_next_state <= LOAD_FRAME;
end if;
-
--- when WAIT_FOR_TC =>
--- state <= x"d";
--- if (TC_BUSY_IN = '0') then
--- dissect_next_state <= DIVIDE;
--- else
--- dissect_next_state <= WAIT_FOR_TC;
--- end if;
when DIVIDE =>
state <= x"c";
end case;
end process DISSECT_MACHINE;
+
-- counter of bytes of currently constructed frame
FRAME_LOADED_PROC : process(CLK)
begin
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