new files for sync media interface

diff --git a/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.ipx b/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.ipx
index ab4de65042e2b3bc024cf69c7e6bbc6f2dcb3b1d..ac5ec4d46e356e40c12519d5ca9d7b41b866dc2e 100644 (file)
--- a/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.ipx
+++ b/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.ipx
@@ -1,9 +1,9 @@
 <?xml version="1.0" encoding="UTF-8"?>
-<DiamondModule name="lattice_ecp3_fifo_18x16_dualport_oreg" module="FIFO_DC" VendorName="Lattice Semiconductor Corporation" generator="IPexpress" date="2013 01 29 15:48:28.879" version="5.4" type="Module" synthesis="" source_format="VHDL">
+<DiamondModule name="lattice_ecp3_fifo_18x16_dualport_oreg" module="FIFO_DC" VendorName="Lattice Semiconductor Corporation" generator="IPexpress" date="2013 01 30 15:13:06.265" version="5.4" type="Module" synthesis="" source_format="VHDL">
   <Package>
-               <File name="lattice_ecp3_fifo_18x16_dualport_oreg.lpc" type="lpc" modified="2013 01 29 15:48:26.000"/>
-               <File name="lattice_ecp3_fifo_18x16_dualport_oreg.vhd" type="top_level_vhdl" modified="2013 01 29 15:48:26.000"/>
-               <File name="lattice_ecp3_fifo_18x16_dualport_oreg_tmpl.vhd" type="template_vhdl" modified="2013 01 29 15:48:26.000"/>
-               <File name="tb_lattice_ecp3_fifo_18x16_dualport_oreg_tmpl.vhd" type="testbench_vhdl" modified="2013 01 29 15:48:26.000"/>
+               <File name="lattice_ecp3_fifo_18x16_dualport_oreg.lpc" type="lpc" modified="2013 01 30 15:13:04.000"/>
+               <File name="lattice_ecp3_fifo_18x16_dualport_oreg.vhd" type="top_level_vhdl" modified="2013 01 30 15:13:04.000"/>
+               <File name="lattice_ecp3_fifo_18x16_dualport_oreg_tmpl.vhd" type="template_vhdl" modified="2013 01 30 15:13:04.000"/>
+               <File name="tb_lattice_ecp3_fifo_18x16_dualport_oreg_tmpl.vhd" type="testbench_vhdl" modified="2013 01 30 15:13:04.000"/>
   </Package>
 </DiamondModule>

diff --git a/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.lpc b/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.lpc
index 64bb69e5a98904e6e0a04cf911ef614277d85715..443332c1c466eb19396dcf31a6a482acfe34fbd8 100644 (file)
--- a/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.lpc
+++ b/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.lpc
@@ -16,8 +16,8 @@ CoreRevision=5.4
 ModuleName=lattice_ecp3_fifo_18x16_dualport_oreg
 SourceFormat=VHDL
 ParameterFileVersion=1.0
-Date=01/29/2013
-Time=15:48:26
+Date=01/30/2013
+Time=15:13:04
 
 [Parameters]
 Verilog=0

diff --git a/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.vhd b/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.vhd
index 4799cbfba672136be0906065dd576e4bb97cbaac..8206cdbb397f6846dbf906f660682ebb922704e7 100644 (file)
--- a/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.vhd
+++ b/lattice/ecp3/lattice_ecp3_fifo_18x16_dualport_oreg.vhd
@@ -2,7 +2,7 @@
 -- Module  Version: 5.4
 --/d/jspc29/lattice/diamond/2.01/ispfpga/bin/lin/scuba -w -lang vhdl -synth synplify -bus_exp 7 -bb -arch ep5c00 -type ebfifo -pfu_fifo -depth 16 -width 18 -depth 16 -rdata_width 18 -regout -no_enable -pe -1 -pf 7 -e 
 
--- Tue Jan 29 15:48:26 2013
+-- Wed Jan 30 15:13:04 2013
 
 library IEEE;
 use IEEE.std_logic_1164.all;

diff --git a/media_interfaces/med_ecp3_sfp_sync.vhd b/media_interfaces/med_ecp3_sfp_sync.vhd
index d642153d905a137951a94080e6a886ab7b1c124a..36104c1519ead797229f2911544d4e8cb354aa04 100644 (file)
--- a/media_interfaces/med_ecp3_sfp_sync.vhd
+++ b/media_interfaces/med_ecp3_sfp_sync.vhd
@@ -181,7 +181,7 @@ clk_200_i        <= clk_rx_full;
 CLK_RX_HALF_OUT <= clk_rx_half;
 CLK_RX_FULL_OUT <= clk_rx_full;
 
-STAT_OP <= x"0007";
+
 
 SD_TXDIS_OUT <= '0';
 
@@ -290,7 +290,7 @@ THE_TX : tx_control
   port map(
     CLK_200                => clk_200_i,
     CLK_100                => SYSCLK,
-    RESET_IN               => RESET,
+    RESET_IN               => CLEAR,
 
     TX_DATA_IN             => MED_DATA_IN,
     TX_PACKET_NUMBER_IN    => MED_PACKET_NUM_IN,
@@ -349,7 +349,7 @@ THE_TX : tx_control
 
 
 PROC_SCI_CTRL: process 
-  variable cnt : integer range 0 to 3 := 0;
+  variable cnt : integer range 0 to 4 := 0;
 begin
   wait until rising_edge(SYSCLK);
   SCI_ACK <= '0';
@@ -379,7 +379,7 @@ begin
       end if;      
     when SCTRL =>
       if sci_reg_i = '1' then
-        SCI_DATA_OUT  <= debug_reg(8*(to_integer(unsigned(SCI_ADDR(2 downto 0))))+7 downto 8*(to_integer(unsigned(SCI_ADDR(2 downto 0)))));
+        SCI_DATA_OUT  <= debug_reg(8*(to_integer(unsigned(SCI_ADDR(3 downto 0))))+7 downto 8*(to_integer(unsigned(SCI_ADDR(3 downto 0)))));
         SCI_ACK       <= '1';
         sci_write_i   <= '0';
         sci_read_i    <= '0';
@@ -399,7 +399,7 @@ begin
       sci_state       <= IDLE;
     
     when GET_WA =>
-      if cnt = 3 then
+      if cnt = 4 then
         cnt           := 0;
         sci_state     <= IDLE;
       else
@@ -447,10 +447,20 @@ debug_reg(31 downto 24) <= tx_data;
 
 
 debug_reg(47 downto 32) <= wa_position;
+
 debug_reg(63 downto 48) <= (others => '0');
 
       
 STAT_DEBUG <= debug_reg;
-      
+
+STAT_OP(15) <= '0';
+STAT_OP(14) <= '0';
+STAT_OP(13) <= not rx_allow when rising_edge(SYSCLK); --make trbnet reset
+STAT_OP(12) <= '0';
+STAT_OP(11) <= '0';
+STAT_OP(10) <= rx_allow;
+STAT_OP(9)  <= tx_allow;
+STAT_OP(8 downto 4) <= (others => '0');
+STAT_OP(3 downto 0) <= x"7";
 end architecture;
 

diff --git a/media_interfaces/sync/rx_reset_fsm.vhd b/media_interfaces/sync/rx_reset_fsm.vhd
index a5d713145ea191c5a98ce3e1a8032d0bacdee2b9..08408f605d12a13b59de055197f0460e60c944b5 100644 (file)
--- a/media_interfaces/sync/rx_reset_fsm.vhd
+++ b/media_interfaces/sync/rx_reset_fsm.vhd
@@ -173,7 +173,7 @@ begin
     when NORMAL =>
       rx_pcs_rst_ch_c_int <= '0';
       rx_serdes_rst_ch_c_int <= '0';
-      if rx_lol_los_int = '1' then
+      if rx_lol_los_int = '1' or WA_POSITION /= x"0" then
         ns <= WAIT_FOR_PLOL;
       else
         ns <= NORMAL;

diff --git a/trb_net16_hub_base.vhd b/trb_net16_hub_base.vhd
index 2b585e5e94c43f4c81540c4b8ff8a3af52dfe147..413acbf3d107d71971510bea962d6358945c7c4e 100644 (file)
--- a/trb_net16_hub_base.vhd
+++ b/trb_net16_hub_base.vhd
@@ -36,7 +36,7 @@ entity trb_net16_hub_base is
     USE_ONEWIRE             : integer range 0 to 2 := c_YES;
     BROADCAST_SPECIAL_ADDR  : std_logic_vector(7 downto 0) := x"FF";
   --media interfaces
-    MII_NUMBER              : integer range 1 to c_MAX_MII_PER_HUB := 4;
+    MII_NUMBER              : integer range 0 to c_MAX_MII_PER_HUB := 4;
     MII_IBUF_DEPTH          : hub_iobuf_config_t := std_HUB_IBUF_DEPTH;
     MII_IS_UPLINK           : hub_mii_config_t := (others => c_YES);
     MII_IS_DOWNLINK         : hub_mii_config_t := (others => c_YES);
@@ -1022,7 +1022,7 @@ end generate;
     end generate;    
   end generate;
 
-  gen_unused_signals : if 1 =1 generate
+  gen_unused_signals : if 1 =1  generate
     constant i : integer := 2;
     begin
       buf_STAT_POINTS_locked((i+1)*32-1 downto i*32) <= (others => '0');

diff --git a/trb_net16_hub_func.vhd b/trb_net16_hub_func.vhd
index a51feaaac8d23954d8167622f4e3d161bfbd6623..06c0ad01ec2c5c8986975f7231c0103d1dfffc8f 100644 (file)
--- a/trb_net16_hub_func.vhd
+++ b/trb_net16_hub_func.vhd
@@ -109,7 +109,7 @@ package trb_net16_hub_func is
     USE_ONEWIRE             : integer range 0 to 2 := c_YES;
     BROADCAST_SPECIAL_ADDR  : std_logic_vector(7 downto 0) := x"FF";
   --media interfaces
-    MII_NUMBER              : integer range 1 to c_MAX_MII_PER_HUB := 12;
+    MII_NUMBER              : integer range 0 to c_MAX_MII_PER_HUB := 12;
     MII_IBUF_DEPTH          : hub_iobuf_config_t := std_HUB_IBUF_DEPTH;
     MII_IS_UPLINK           : hub_mii_config_t := (others => c_YES);
     MII_IS_DOWNLINK         : hub_mii_config_t := (others => c_YES);
@@ -214,7 +214,7 @@ component trb_net16_hub_streaming_port is
     USE_ONEWIRE             : integer range 0 to 2 := c_YES;
     BROADCAST_SPECIAL_ADDR  : std_logic_vector(7 downto 0) := x"FF";
   --media interfaces
-    MII_NUMBER              : integer range 2 to c_MAX_MII_PER_HUB := 12;
+    MII_NUMBER              : integer range 1 to c_MAX_MII_PER_HUB := 12;
     MII_IBUF_DEPTH          : hub_iobuf_config_t := std_HUB_IBUF_DEPTH;
     MII_IS_UPLINK           : hub_mii_config_t := (others => c_YES);
     MII_IS_DOWNLINK         : hub_mii_config_t := (others => c_YES);
@@ -299,7 +299,7 @@ component trb_net16_hub_streaming_port is
 
   component trb_net16_hub_ipu_logic is
     generic (
-      POINT_NUMBER        : integer range 2 to 32 := 3
+      POINT_NUMBER        : integer range 1 to 32 := 3
       );
     port (
       CLK    : in std_logic;
@@ -344,7 +344,7 @@ component trb_net16_hub_streaming_port is
   component trb_net16_hub_logic is
     generic (
     --media interfaces
-      POINT_NUMBER        : integer range 2 to 32 := 2;
+      POINT_NUMBER        : integer range 1 to 32 := 2;
       MII_IS_UPLINK_ONLY      : hub_mii_config_t := (others => c_NO)
       );
     port (
@@ -608,7 +608,7 @@ component trb_net16_hub_streaming_port_sctrl is
     USE_ONEWIRE             : integer range 0 to 2 := c_YES;
     BROADCAST_SPECIAL_ADDR  : std_logic_vector(7 downto 0) := x"FF";
   --media interfaces
-    MII_NUMBER              : integer range 2 to c_MAX_MII_PER_HUB := 12;
+    MII_NUMBER              : integer range 1 to c_MAX_MII_PER_HUB := 12;
     MII_IS_UPLINK           : hub_mii_config_t := (others => c_YES);
     MII_IS_DOWNLINK         : hub_mii_config_t := (others => c_YES);
     MII_IS_UPLINK_ONLY      : hub_mii_config_t := (others => c_NO)
@@ -723,7 +723,7 @@ component trb_net16_hub_streaming_port_sctrl_cts is
     RDO_HEADER_BUFFER_DEPTH          : integer range 9 to 14         := 9;
     RDO_HEADER_BUFFER_FULL_THRESH    : integer range 2**8 to 2**14-2 := 500;
     --media interfaces & hub ports
-    MII_NUMBER              : integer range 2 to c_MAX_MII_PER_HUB := 5;
+    MII_NUMBER              : integer range 1 to c_MAX_MII_PER_HUB := 5;
     MII_IS_UPLINK           : hub_mii_config_t := (0,0,0,0,1,0,1,0,0,0,0,0,0,0,0,0,0);
     MII_IS_DOWNLINK         : hub_mii_config_t := (1,1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0);
     MII_IS_UPLINK_ONLY      : hub_mii_config_t := (0,0,0,0,1,0,1,0,0,0,0,0,0,0,0,0,0);

diff --git a/trb_net16_hub_ipu_logic.vhd b/trb_net16_hub_ipu_logic.vhd
index bd8ae976be5012a5f6c4f996bb93f494d87a41f5..e93c46b33e428ac00a5a6a4c3f2d935df20bdf8c 100644 (file)
--- a/trb_net16_hub_ipu_logic.vhd
+++ b/trb_net16_hub_ipu_logic.vhd
@@ -10,7 +10,7 @@ use work.trb_net_components.all;
 entity trb_net16_hub_ipu_logic is
   generic (
   --media interfaces
-    POINT_NUMBER        : integer range 2 to 17 := 16
+    POINT_NUMBER        : integer range 1 to 17 := 16
     );
   port (
     CLK    : in std_logic;

diff --git a/trb_net16_hub_logic.vhd b/trb_net16_hub_logic.vhd
index 272e57ed52c5670a628323c24327505e35ee49e3..8302ebe4adaea89c81d7ed3fd7773992965c7e01 100644 (file)
--- a/trb_net16_hub_logic.vhd
+++ b/trb_net16_hub_logic.vhd
@@ -10,7 +10,7 @@ use work.trb_net16_hub_func.all;
 entity trb_net16_hub_logic is
   generic (
   --media interfaces
-    POINT_NUMBER        : integer range 2 to 32 := 17;
+    POINT_NUMBER        : integer range 1 to 32 := 17;
     MII_IS_UPLINK_ONLY  : hub_mii_config_t := (others => c_NO)
     );
   port (

diff --git a/trb_net16_hub_streaming_port_sctrl.vhd b/trb_net16_hub_streaming_port_sctrl.vhd
index c4ae61a2443bab7e34ce725fb9886687e4142391..1adba46f76055229aeb9f81067f55177d400176e 100644 (file)
--- a/trb_net16_hub_streaming_port_sctrl.vhd
+++ b/trb_net16_hub_streaming_port_sctrl.vhd
@@ -42,7 +42,7 @@ entity trb_net16_hub_streaming_port_sctrl is
     USE_ONEWIRE             : integer range 0 to 2 := c_YES;
     BROADCAST_SPECIAL_ADDR  : std_logic_vector(7 downto 0) := x"FF";
   --media interfaces
-    MII_NUMBER              : integer range 2 to c_MAX_MII_PER_HUB := 5;
+    MII_NUMBER              : integer range 1 to c_MAX_MII_PER_HUB := 5;
     MII_IS_UPLINK           : hub_mii_config_t := (others => c_YES);
     MII_IS_DOWNLINK         : hub_mii_config_t := (others => c_YES);
     MII_IS_UPLINK_ONLY      : hub_mii_config_t := (others => c_NO)