]> jspc29.x-matter.uni-frankfurt.de Git - trbnet.git/commitdiff
*** empty log message ***
authorhadeshyp <hadeshyp>
Wed, 29 Sep 2010 15:37:41 +0000 (15:37 +0000)
committerhadeshyp <hadeshyp>
Wed, 29 Sep 2010 15:37:41 +0000 (15:37 +0000)
special/handler_lvl1.vhd

index a38ae95cdad4a3d9856b8ba8c5d11119bd435fc5..0efda630f5e13e4f0f0203c684d7f79195898a54 100644 (file)
@@ -77,6 +77,7 @@ signal CURRENT_STATE, NEXT_STATE: STATES;
 signal toc_ce               : std_logic; -- count enable for TRG/LVL1 timeout
 signal next_toc_ce          : std_logic;
 signal toc_save             : std_logic; -- count enable for TRG/LVL1 timeout
+signal next_toc_save        : std_logic;
 signal toc_rst              : std_logic; -- reset for timout
 signal next_toc_rst         : std_logic;
 signal trg_rel              : std_logic; -- release LVL1 channel
@@ -328,6 +329,7 @@ begin
                        CURRENT_STATE  <= NEXT_STATE;
                        toc_ce         <= next_toc_ce;
                        toc_rst        <= next_toc_rst;
+                       toc_save       <= next_toc_save;
                        trg_rel        <= next_trg_rel;
                        trg_rst        <= next_trg_rst;
                        val_trg        <= next_val_trg;
@@ -347,6 +349,7 @@ begin
        NEXT_STATE       <= IDLE; -- avoid latches
        next_toc_ce      <= '0';
        next_toc_rst     <= '0';
+  next_toc_save     <= '0';
        next_trg_rel     <= '0';
        next_trg_rst     <= '0';
        next_val_trg     <= '0';
@@ -387,6 +390,7 @@ begin
                                -- suitable LVL1 information has arrived
                                NEXT_STATE       <= LVL1FND;
                                next_data_valid  <= '1';
+                               next_toc_save    <= '1';
                                next_toc_rst     <= '1';
                                -- gk 11.09.10
                                if (LVL1_TRG_INFORMATION_IN(7) = '1') then
@@ -529,7 +533,7 @@ begin
   if( rising_edge(CLOCK) ) then
     if   ( RESET = '1' ) then
       lvl1_delay <= (others => '0');
-    elsif( toc_rst = '1' ) then
+    elsif( toc_save = '1' ) then
       lvl1_delay(15 downto 11) <= (others => '0'); -- here we can store nice status bits
       lvl1_delay(10 downto 0)  <= std_logic_vector(timeout_ctr);
     end if;