]> jspc29.x-matter.uni-frankfurt.de Git - trbnet.git/commitdiff
code cleanup going on
authorMichael Boehmer <mboehmer@ph.tum.de>
Sat, 29 Oct 2022 08:52:26 +0000 (10:52 +0200)
committerMichael Boehmer <mboehmer@ph.tum.de>
Sat, 29 Oct 2022 08:52:26 +0000 (10:52 +0200)
gbe_trb/base/gbe_logic_wrapper.vhd
gbe_trb/base/gbe_main_control.vhd
gbe_trb/base/gbe_protocol_selector.vhd
gbe_trb/protocols/gbe_response_constructor_ARP.vhd
gbe_trb/protocols/gbe_response_constructor_DHCP.vhd
gbe_trb/protocols/gbe_response_constructor_Forward.vhd
gbe_trb/protocols/gbe_response_constructor_Ping.vhd
gbe_trb/protocols/gbe_response_constructor_SCTRL.vhd

index b2a52551787ed8dd267d44a93e2c05e9fcc94fe9..852f3f0c86177477cf060e43eeb3d14636ef7e32 100644 (file)
@@ -257,8 +257,7 @@ begin
       DEBUG_OUT(31 downto 0)        => DEBUG_OUT, 
       DEBUG_OUT(63 downto 32)       => open, 
       --
-      MONITOR_SELECT_GEN_DBG_OUT    => dbg_select_gen,
-      SCTRL_HIST_OUT                => open --dbg_hist2
+      MONITOR_SELECT_GEN_DBG_OUT    => dbg_select_gen
     );
 
   MAKE_RESET_OUT <= make_reset;
index 81665105e339af8d824aea4074f5d4bbb75db0de..7658760c8c64f8dc155bf2d103373f306ab84de9 100644 (file)
@@ -93,8 +93,6 @@ entity gbe_main_control is
     MONITOR_SELECT_SENT_OUT       : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
     MONITOR_SELECT_GEN_DBG_OUT    : out std_logic_vector(2 * c_MAX_PROTOCOLS * 32 - 1 downto 0);
     --
-    SCTRL_HIST_OUT                : out hist_array;
-    --
     DEBUG_OUT                     : out std_logic_vector(63 downto 0)
   );
 end gbe_main_control;
@@ -226,7 +224,6 @@ begin
       MONITOR_SELECT_SENT_BYTES_OUT => MONITOR_SELECT_SENT_BYTES_OUT,
       MONITOR_SELECT_SENT_OUT       => MONITOR_SELECT_SENT_OUT,
       MONITOR_SELECT_GEN_DBG_OUT    => MONITOR_SELECT_GEN_DBG_OUT,
-      SCTRL_HIST_OUT                => SCTRL_HIST_OUT,
       DEBUG_OUT                     => selector_debug
     );
 
index 7e02fa4b2cc26b4cb55bc7f64725275dc9b4dada..240403b155d570d77aa7c83efa1c1f0ccac0498a 100644 (file)
@@ -1,13 +1,8 @@
 library ieee;
   use ieee.std_logic_1164.all;
   use ieee.numeric_std.all;
---LIBRARY IEEE;
---USE IEEE.std_logic_1164.ALL;
---USE IEEE.numeric_std.ALL;
---USE IEEE.std_logic_UNSIGNED.ALL;
 
 library work;
-  use work.trb_net_std.all;
   use work.gbe_protocols.all;
 
 entity gbe_protocol_selector is
@@ -84,7 +79,6 @@ entity gbe_protocol_selector is
     MONITOR_SELECT_SENT_BYTES_OUT : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
     MONITOR_SELECT_SENT_OUT       : out std_logic_vector(c_MAX_PROTOCOLS * 32 - 1 downto 0);
     MONITOR_SELECT_GEN_DBG_OUT    : out std_logic_vector(2 * c_MAX_PROTOCOLS * 32 - 1 downto 0);
-    SCTRL_HIST_OUT                : out hist_array;
     DEBUG_OUT                     : out std_logic_vector(63 downto 0)
   );
 end gbe_protocol_selector;
@@ -317,8 +311,7 @@ begin
         MONITOR_SELECT_REC_OUT        => MONITOR_SELECT_REC_OUT(3 * 32 - 1 downto 2 * 32),
         MONITOR_SELECT_REC_BYTES_OUT  => MONITOR_SELECT_REC_BYTES_OUT(3 * 32 - 1 downto 2 * 32),
         MONITOR_SELECT_SENT_BYTES_OUT => MONITOR_SELECT_SENT_BYTES_OUT(3 * 32 - 1 downto 2 * 32),
-        MONITOR_SELECT_SENT_OUT       => MONITOR_SELECT_SENT_OUT(3 * 32 - 1 downto 2 * 32),
-        DATA_HIST_OUT                 => SCTRL_HIST_OUT
+        MONITOR_SELECT_SENT_OUT       => MONITOR_SELECT_SENT_OUT(3 * 32 - 1 downto 2 * 32)
       );
   end generate SCTRL_GEN;
 
index eec56dcc7ba6d300ef54389f3d50ea4085f39e58..8937b4e0e6c7d1aba3a5f4fe8eda4cd2e86556f4 100644 (file)
-LIBRARY IEEE;
-USE IEEE.std_logic_1164.ALL;
-USE IEEE.numeric_std.ALL;
-USE IEEE.std_logic_UNSIGNED.ALL;
-
+library ieee;
+  use ieee.std_logic_1164.all;
+  use ieee.numeric_std.all;
+  
 library work;
-use work.trb_net_std.all;
-use work.trb_net_components.all;
-use work.gbe_protocols.all;
+  use work.gbe_protocols.all;
 
 entity gbe_response_constructor_ARP is
-port (
-  CLK                    : in  std_logic;  -- system clock
-  RESET                  : in  std_logic;
+  port (
+    CLK                    : in  std_logic;  -- system clock
+    RESET                  : in  std_logic;
 -- INTERFACE  
-  MY_MAC_IN              : in  std_logic_vector(47 downto 0);
-  MY_IP_IN               : in  std_logic_vector(31 downto 0);
-  PS_DATA_IN             : in  std_logic_vector(8 downto 0);
-  PS_WR_EN_IN            : in  std_logic;
-  PS_ACTIVATE_IN         : in  std_logic;
-  PS_RESPONSE_READY_OUT  : out std_logic;
-  PS_BUSY_OUT            : out std_logic;
-  PS_SELECTED_IN         : in  std_logic;
-  PS_SRC_MAC_ADDRESS_IN  : in  std_logic_vector(47 downto 0);
-  PS_DEST_MAC_ADDRESS_IN : in  std_logic_vector(47 downto 0);
-  PS_SRC_IP_ADDRESS_IN   : in  std_logic_vector(31 downto 0);
-  PS_DEST_IP_ADDRESS_IN  : in  std_logic_vector(31 downto 0);
-  PS_SRC_UDP_PORT_IN     : in  std_logic_vector(15 downto 0);
-  PS_DEST_UDP_PORT_IN    : in  std_logic_vector(15 downto 0);
+    MY_MAC_IN              : in  std_logic_vector(47 downto 0);
+    MY_IP_IN               : in  std_logic_vector(31 downto 0);
+    PS_DATA_IN             : in  std_logic_vector(8 downto 0);
+    PS_WR_EN_IN            : in  std_logic;
+    PS_ACTIVATE_IN         : in  std_logic;
+    PS_RESPONSE_READY_OUT  : out std_logic;
+    PS_BUSY_OUT            : out std_logic;
+    PS_SELECTED_IN         : in  std_logic;
+    PS_SRC_MAC_ADDRESS_IN  : in  std_logic_vector(47 downto 0);
+    PS_DEST_MAC_ADDRESS_IN : in  std_logic_vector(47 downto 0);
+    PS_SRC_IP_ADDRESS_IN   : in  std_logic_vector(31 downto 0);
+    PS_DEST_IP_ADDRESS_IN  : in  std_logic_vector(31 downto 0);
+    PS_SRC_UDP_PORT_IN     : in  std_logic_vector(15 downto 0);
+    PS_DEST_UDP_PORT_IN    : in  std_logic_vector(15 downto 0);
 --
-  TC_RD_EN_IN            : in  std_logic;
-  TC_DATA_OUT            : out std_logic_vector(8 downto 0);
-  TC_FRAME_SIZE_OUT      : out std_logic_vector(15 downto 0);
-  TC_FRAME_TYPE_OUT      : out std_logic_vector(15 downto 0);
-  TC_IP_PROTOCOL_OUT     : out std_logic_vector(7 downto 0);  
-  TC_IDENT_OUT           : out std_logic_vector(15 downto 0);  
-  TC_DEST_MAC_OUT        : out std_logic_vector(47 downto 0);
-  TC_DEST_IP_OUT         : out std_logic_vector(31 downto 0);
-  TC_DEST_UDP_OUT        : out std_logic_vector(15 downto 0);
-  TC_SRC_MAC_OUT         : out std_logic_vector(47 downto 0);
-  TC_SRC_IP_OUT          : out std_logic_vector(31 downto 0);
-  TC_SRC_UDP_OUT         : out std_logic_vector(15 downto 0);
+    TC_RD_EN_IN            : in  std_logic;
+    TC_DATA_OUT            : out std_logic_vector(8 downto 0);
+    TC_FRAME_SIZE_OUT      : out std_logic_vector(15 downto 0);
+    TC_FRAME_TYPE_OUT      : out std_logic_vector(15 downto 0);
+    TC_IP_PROTOCOL_OUT     : out std_logic_vector(7 downto 0);  
+    TC_IDENT_OUT           : out std_logic_vector(15 downto 0);  
+    TC_DEST_MAC_OUT        : out std_logic_vector(47 downto 0);
+    TC_DEST_IP_OUT         : out std_logic_vector(31 downto 0);
+    TC_DEST_UDP_OUT        : out std_logic_vector(15 downto 0);
+    TC_SRC_MAC_OUT         : out std_logic_vector(47 downto 0);
+    TC_SRC_IP_OUT          : out std_logic_vector(31 downto 0);
+    TC_SRC_UDP_OUT         : out std_logic_vector(15 downto 0);
 -- END OF INTERFACE
 -- debug
-  DEBUG_OUT              : out std_logic_vector(63 downto 0)
-);
+    DEBUG_OUT              : out std_logic_vector(63 downto 0)
+  );
 end gbe_response_constructor_ARP;
 
 architecture gbe_response_constructor_ARP_arch of gbe_response_constructor_ARP is
 
-attribute syn_encoding  : string;
+  attribute syn_encoding  : string;
 
-type dissect_states is (IDLE, READ_FRAME, DECIDE, LOAD_FRAME, WAIT_FOR_LOAD, CLEANUP);
-signal dissect_current_state, dissect_next_state : dissect_states;
-attribute syn_encoding of dissect_current_state: signal is "onehot";
+  type dissect_states is (IDLE, READ_FRAME, DECIDE, LOAD_FRAME, WAIT_FOR_LOAD, CLEANUP);
+  signal dissect_current_state, dissect_next_state : dissect_states;
+  attribute syn_encoding of dissect_current_state: signal is "onehot";
 
-type stats_states is (IDLE, LOAD_SENT, LOAD_RECEIVED, CLEANUP);
-signal stats_current_state, stats_next_state : stats_states;
-attribute syn_encoding of stats_current_state : signal is "onehot";
+  type stats_states is (IDLE, LOAD_SENT, LOAD_RECEIVED, CLEANUP);
+  signal stats_current_state, stats_next_state : stats_states;
+  attribute syn_encoding of stats_current_state : signal is "onehot";
 
-signal saved_opcode             : std_logic_vector(15 downto 0);
-signal saved_sender_ip          : std_logic_vector(31 downto 0);
-signal saved_target_ip          : std_logic_vector(31 downto 0);
-signal data_ctr                 : integer range 0 to 30;
-signal values                   : std_logic_vector(223 downto 0);
-signal tc_data                  : std_logic_vector(8 downto 0);
+  signal saved_opcode             : std_logic_vector(15 downto 0);
+  signal saved_sender_ip          : std_logic_vector(31 downto 0);
+  signal saved_target_ip          : std_logic_vector(31 downto 0);
+  signal data_ctr                 : integer range 0 to 30;
+  signal values                   : std_logic_vector(223 downto 0);
+  signal tc_data                  : std_logic_vector(8 downto 0);
 
-signal state                    : std_logic_vector(3 downto 0);
-signal rec_frames               : std_logic_vector(15 downto 0);
-signal sent_frames              : std_logic_vector(15 downto 0);
-signal stat_data_temp           : std_logic_vector(31 downto 0);
+  signal state                    : std_logic_vector(3 downto 0);
+  signal rec_frames               : std_logic_vector(15 downto 0);
+  signal sent_frames              : std_logic_vector(15 downto 0);
+  signal stat_data_temp           : std_logic_vector(31 downto 0);
 
-signal tc_wr                    : std_logic;
+  signal tc_wr                    : std_logic;
 
-attribute syn_preserve : boolean;
-attribute syn_keep : boolean;
-attribute syn_keep of state : signal is true;
-attribute syn_preserve of state : signal is true;
+  attribute syn_preserve : boolean;
+  attribute syn_keep : boolean;
+  attribute syn_keep of state : signal is true;
+  attribute syn_preserve of state : signal is true;
 
 begin
 
-values(15 downto 0)    <= x"0100";  -- hardware type
-values(31 downto 16)   <= x"0008";  -- protocol type
-values(39 downto 32)   <= x"06";  -- hardware size
-values(47 downto 40)   <= x"04";  -- protocol size
-values(63 downto 48)   <= x"0200"; --opcode (reply)
-values(111 downto 64)  <= MY_MAC_IN;  -- sender (my) mac
-values(143 downto 112) <= MY_IP_IN;
-values(191 downto 144) <= PS_SRC_MAC_ADDRESS_IN;  -- target mac
-values(223 downto 192) <= saved_sender_ip;  -- target ip
+  values(15 downto 0)    <= x"0100";  -- hardware type
+  values(31 downto 16)   <= x"0008";  -- protocol type
+  values(39 downto 32)   <= x"06";  -- hardware size
+  values(47 downto 40)   <= x"04";  -- protocol size
+  values(63 downto 48)   <= x"0200"; --opcode (reply)
+  values(111 downto 64)  <= MY_MAC_IN;  -- sender (my) mac
+  values(143 downto 112) <= MY_IP_IN;
+  values(191 downto 144) <= PS_SRC_MAC_ADDRESS_IN;  -- target mac
+  values(223 downto 192) <= saved_sender_ip;  -- target ip
 
-DISSECT_MACHINE_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    dissect_current_state <= IDLE;
-  elsif( rising_edge(CLK) ) then
-    dissect_current_state <= dissect_next_state;
-  end if;
-end process DISSECT_MACHINE_PROC;
+  PROC_DISSECT_FSM: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
+      dissect_current_state <= IDLE;
+    elsif( rising_edge(CLK) ) then
+      dissect_current_state <= dissect_next_state;
+    end if;
+  end process PROC_DISSECT_FSM;
 
-DISSECT_MACHINE : process(dissect_current_state, MY_IP_IN, PS_WR_EN_IN, PS_ACTIVATE_IN, PS_DATA_IN, data_ctr, PS_SELECTED_IN, saved_target_ip)
-begin
-  case dissect_current_state is
-  
-    when IDLE =>
-      state <= x"1";
-      if (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
-        dissect_next_state <= READ_FRAME;
-      else
-        dissect_next_state <= IDLE;
-      end if;
+  PROC_DISSECT_TRANSITIONS : process( dissect_current_state, MY_IP_IN, PS_WR_EN_IN, PS_ACTIVATE_IN, 
+                                      PS_DATA_IN, data_ctr, PS_SELECTED_IN, saved_target_ip )
+  begin
+    case dissect_current_state is
+   
+      when IDLE =>
+        state <= x"1";
+        if (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
+          dissect_next_state <= READ_FRAME;
+        else
+          dissect_next_state <= IDLE;
+        end if;
     
-    when READ_FRAME =>
-      state <= x"2";
-      if (PS_DATA_IN(8) = '1') then
-        dissect_next_state <= DECIDE;
-      else
-        dissect_next_state <= READ_FRAME;
-      end if;
+      when READ_FRAME =>
+        state <= x"2";
+        if (PS_DATA_IN(8) = '1') then
+          dissect_next_state <= DECIDE;
+        else
+          dissect_next_state <= READ_FRAME;
+        end if;
       
-    when DECIDE =>
-      state <= x"3";
-      if (saved_target_ip = MY_IP_IN) then
-        dissect_next_state <= WAIT_FOR_LOAD;
-      -- in case the request is not for me, drop it
-      else
-        dissect_next_state <= IDLE;
-      end if;
+      when DECIDE =>
+        state <= x"3";
+        if (saved_target_ip = MY_IP_IN) then
+          dissect_next_state <= WAIT_FOR_LOAD;
+        -- in case the request is not for me, drop it
+        else
+          dissect_next_state <= IDLE;
+        end if;
       
-    when WAIT_FOR_LOAD =>
-      state <= x"4";
-      if (PS_SELECTED_IN = '1') then
-        dissect_next_state <= LOAD_FRAME;
-      else
-        dissect_next_state <= WAIT_FOR_LOAD;
-      end if;
-    
-    when LOAD_FRAME =>
-      state <= x"5";
-      if (data_ctr = 28) then
-        dissect_next_state <= CLEANUP;
-      else
-        dissect_next_state <= LOAD_FRAME;
-      end if;
+      when WAIT_FOR_LOAD =>
+        state <= x"4";
+        if (PS_SELECTED_IN = '1') then
+          dissect_next_state <= LOAD_FRAME;
+        else
+          dissect_next_state <= WAIT_FOR_LOAD;
+        end if;
+
+      when LOAD_FRAME =>
+        state <= x"5";
+        if (data_ctr = 28) then
+          dissect_next_state <= CLEANUP;
+        else
+          dissect_next_state <= LOAD_FRAME;
+        end if;
     
-    when CLEANUP =>
-      state <= x"e";
-      dissect_next_state <= IDLE;
+      when CLEANUP =>
+        state <= x"e";
+        dissect_next_state <= IDLE;
   
-  end case;
-end process DISSECT_MACHINE;
+    end case;
+  end process PROC_DISSECT_TRANSITIONS;
 
-DATA_CTR_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    data_ctr <= 1;
-  elsif( rising_edge(CLK) ) then
-    if   ( (dissect_current_state = IDLE) and (PS_WR_EN_IN = '0') ) then
-      data_ctr <= 1;
-    elsif( dissect_current_state = WAIT_FOR_LOAD ) then
+  PROC_DATA_CTR: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
       data_ctr <= 1;
-    elsif( dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then
-      data_ctr <= data_ctr + 1;
-    elsif( dissect_current_state = READ_FRAME and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then  -- in case of saving data from incoming frame
-      data_ctr <= data_ctr + 1;
-    elsif( dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1' ) then  -- in case of constructing response
-      data_ctr <= data_ctr + 1;
+    elsif( rising_edge(CLK) ) then
+      if   ( (dissect_current_state = IDLE) and (PS_WR_EN_IN = '0') ) then
+        data_ctr <= 1;
+      elsif( dissect_current_state = WAIT_FOR_LOAD ) then
+        data_ctr <= 1;
+      elsif( dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then
+        data_ctr <= data_ctr + 1;
+      elsif( dissect_current_state = READ_FRAME and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then  -- in case of saving data from incoming frame
+        data_ctr <= data_ctr + 1;
+      elsif( dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1' ) then  -- in case of constructing response
+        data_ctr <= data_ctr + 1;
+      end if;
     end if;
-  end if;
-end process DATA_CTR_PROC;
+  end process PROC_DATA_CTR;
 
-SAVE_VALUES_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    saved_opcode    <= (others => '0');
-    saved_sender_ip <= (others => '0');
-    saved_target_ip <= (others => '0');
-  elsif( rising_edge(CLK) ) then
-    if (dissect_current_state = READ_FRAME) then
-      case (data_ctr) is
-        
-        when 6 =>
-          saved_opcode(7 downto 0)      <= PS_DATA_IN(7 downto 0);
-        when 7 =>
-          saved_opcode(15 downto 8)     <= PS_DATA_IN(7 downto 0);
-        when 13 =>
-          saved_sender_ip(7 downto 0)   <= PS_DATA_IN(7 downto 0);
-        when 14 =>
-          saved_sender_ip(15 downto 8)  <= PS_DATA_IN(7 downto 0);
-        when 15 =>
-          saved_sender_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
-        when 16 =>
-          saved_sender_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
-        when 23 =>
-          saved_target_ip(7 downto 0)   <= PS_DATA_IN(7 downto 0);
-        when 24 =>
-          saved_target_ip(15 downto 8)  <= PS_DATA_IN(7 downto 0);
-        when 25 =>
-          saved_target_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
-        when 26 =>
-          saved_target_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
+  PROC_SAVE_VALUES: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
+      saved_opcode    <= (others => '0');
+      saved_sender_ip <= (others => '0');
+      saved_target_ip <= (others => '0');
+    elsif( rising_edge(CLK) ) then
+      if (dissect_current_state = READ_FRAME) then
+        case (data_ctr) is
+         
+          when 6 =>
+           saved_opcode(7 downto 0)      <= PS_DATA_IN(7 downto 0);
+          when 7 =>
+            saved_opcode(15 downto 8)     <= PS_DATA_IN(7 downto 0);
+          when 13 =>
+            saved_sender_ip(7 downto 0)   <= PS_DATA_IN(7 downto 0);
+          when 14 =>
+            saved_sender_ip(15 downto 8)  <= PS_DATA_IN(7 downto 0);
+          when 15 =>
+            saved_sender_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
+          when 16 =>
+            saved_sender_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
+          when 23 =>
+            saved_target_ip(7 downto 0)   <= PS_DATA_IN(7 downto 0);
+          when 24 =>
+            saved_target_ip(15 downto 8)  <= PS_DATA_IN(7 downto 0);
+          when 25 =>
+            saved_target_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
+          when 26 =>
+            saved_target_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
           
-        when others => null;
-      end case;
+          when others => null;
+        end case;
+      end if;
     end if;
-  end if;
-end process SAVE_VALUES_PROC;
+  end process PROC_SAVE_VALUES;
 
-TC_DATA_PROC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    tc_data(8) <= '0';
+  PROC_TC_DATA: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      tc_data(8) <= '0';
     
-    if (dissect_current_state = LOAD_FRAME) then
-      for i in 0 to 7 loop
-        tc_data(i) <= values((data_ctr - 1) * 8 + i);
-      end loop;
-      -- mark the last byte
-      if (data_ctr = 28) then
-        tc_data(8) <= '1';
+      if (dissect_current_state = LOAD_FRAME) then
+        for i in 0 to 7 loop
+          tc_data(i) <= values((data_ctr - 1) * 8 + i);
+        end loop;
+        -- mark the last byte
+        if (data_ctr = 28) then
+          tc_data(8) <= '1';
+        end if;
+      else
+        tc_data(7 downto 0) <= (others => '0');  
       end if;
-    else
-      tc_data(7 downto 0) <= (others => '0');  
-    end if;
     
-    TC_DATA_OUT <= tc_data;
+      TC_DATA_OUT <= tc_data;
     
-  end if;  
-end process TC_DATA_PROC;
+    end if;  
+  end process PROC_TC_DATA;
 
-PS_RESPONSE_SYNC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if( dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or dissect_current_state = CLEANUP ) then
-      PS_RESPONSE_READY_OUT <= '1';
-    else
-      PS_RESPONSE_READY_OUT <= '0';
-    end if;
+  PROC_PS_RESPONSE_SYNC: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if( dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or dissect_current_state = CLEANUP ) then
+        PS_RESPONSE_READY_OUT <= '1';
+      else
+        PS_RESPONSE_READY_OUT <= '0';
+      end if;
     
-    if( dissect_current_state = IDLE ) then
-      PS_BUSY_OUT <= '0';
-    else
-      PS_BUSY_OUT <= '1';
-    end if;
-  end if;  
-end process PS_RESPONSE_SYNC;
+      if( dissect_current_state = IDLE ) then
+        PS_BUSY_OUT <= '0';
+      else
+        PS_BUSY_OUT <= '1';
+      end if;
+    end if;  
+  end process PROC_PS_RESPONSE_SYNC;
 
-TC_FRAME_SIZE_OUT   <= x"001c";  -- fixed frame size
+  TC_FRAME_SIZE_OUT   <= x"001c";  -- fixed frame size
 
-TC_FRAME_TYPE_OUT   <= x"0608";
-TC_DEST_MAC_OUT     <= PS_SRC_MAC_ADDRESS_IN;
-TC_DEST_IP_OUT      <= x"00000000";  -- doesnt matter
-TC_DEST_UDP_OUT     <= x"0000";  -- doesnt matter
-TC_SRC_MAC_OUT      <= MY_MAC_IN;
-TC_SRC_IP_OUT       <= x"00000000";  -- doesnt matter
-TC_SRC_UDP_OUT      <= x"0000";  -- doesnt matter
-TC_IP_PROTOCOL_OUT  <= x"00"; -- doesnt matter
-TC_IDENT_OUT        <= (others => '0');  -- doesn't matter
+  TC_FRAME_TYPE_OUT   <= x"0608";
+  TC_DEST_MAC_OUT     <= PS_SRC_MAC_ADDRESS_IN;
+  TC_DEST_IP_OUT      <= x"00000000";  -- doesnt matter
+  TC_DEST_UDP_OUT     <= x"0000";  -- doesnt matter
+  TC_SRC_MAC_OUT      <= MY_MAC_IN;
+  TC_SRC_IP_OUT       <= x"00000000";  -- doesnt matter
+  TC_SRC_UDP_OUT      <= x"0000";  -- doesnt matter
+  TC_IP_PROTOCOL_OUT  <= x"00"; -- doesnt matter
+  TC_IDENT_OUT        <= (others => '0');  -- doesn't matter
 
 end gbe_response_constructor_ARP_arch;
 
index 52c6df6d58ec4cf0ba21d2503e8dd616a01b689d..a9ffaf97f19fee030559b66abc815e1d242a79d0 100644 (file)
-LIBRARY IEEE;
-
-USE IEEE.std_logic_1164.ALL;
-USE IEEE.numeric_std.ALL;
-USE IEEE.std_logic_UNSIGNED.ALL;
-
+library ieee;
+  use ieee.std_logic_1164.all;
+  use ieee.numeric_std.all;
+  
 library work;
-use work.trb_net_std.all;
-use work.trb_net_components.all;
-use work.trb_net_gbe_protocols.all;
+  use work.gbe_protocols.all;
 
 entity gbe_response_constructor_DHCP is
-port(
-  CLK                    : in  std_logic;  -- system clock
-  RESET                  : in  std_logic;
--- INTERFACE
-  MY_MAC_IN              : in  std_logic_vector(47 downto 0);
-  MY_IP_IN               : in  std_logic_vector(31 downto 0);
-  PS_DATA_IN             : in  std_logic_vector(8 downto 0);
-  PS_WR_EN_IN            : in  std_logic;
-  PS_ACTIVATE_IN         : in  std_logic;
-  PS_RESPONSE_READY_OUT  : out std_logic;
-  PS_BUSY_OUT            : out std_logic;
-  PS_SELECTED_IN         : in  std_logic;
-  PS_SRC_MAC_ADDRESS_IN  : in  std_logic_vector(47 downto 0);
-  PS_DEST_MAC_ADDRESS_IN : in  std_logic_vector(47 downto 0);
-  PS_SRC_IP_ADDRESS_IN   : in  std_logic_vector(31 downto 0);
-  PS_DEST_IP_ADDRESS_IN  : in  std_logic_vector(31 downto 0);
-  PS_SRC_UDP_PORT_IN     : in  std_logic_vector(15 downto 0);
-  PS_DEST_UDP_PORT_IN    : in  std_logic_vector(15 downto 0);
---
-  TC_RD_EN_IN            : in  std_logic;
-  TC_DATA_OUT            : out std_logic_vector(8 downto 0);
-  TC_FRAME_SIZE_OUT      : out std_logic_vector(15 downto 0);
-  TC_FRAME_TYPE_OUT      : out std_logic_vector(15 downto 0);
-  TC_IP_PROTOCOL_OUT     : out std_logic_vector(7 downto 0);  
-  TC_IDENT_OUT           : out std_logic_vector(15 downto 0);  
-  TC_DEST_MAC_OUT        : out std_logic_vector(47 downto 0);
-  TC_DEST_IP_OUT         : out std_logic_vector(31 downto 0);
-  TC_DEST_UDP_OUT        : out std_logic_vector(15 downto 0);
-  TC_SRC_MAC_OUT         : out std_logic_vector(47 downto 0);
-  TC_SRC_IP_OUT          : out std_logic_vector(31 downto 0);
-  TC_SRC_UDP_OUT         : out std_logic_vector(15 downto 0);
--- END OF INTERFACE
-  MY_IP_OUT              : out std_logic_vector(31 downto 0);
-  DHCP_START_IN          : in  std_logic;
-  DHCP_DONE_OUT          : out std_logic;
--- debug
-  DEBUG_OUT              : out  std_logic_vector(63 downto 0)
-);
+  port(
+    CLK                    : in  std_logic;  -- system clock
+    RESET                  : in  std_logic;
+  -- INTERFACE
+    MY_MAC_IN              : in  std_logic_vector(47 downto 0);
+    MY_IP_IN               : in  std_logic_vector(31 downto 0);
+    PS_DATA_IN             : in  std_logic_vector(8 downto 0);
+    PS_WR_EN_IN            : in  std_logic;
+    PS_ACTIVATE_IN         : in  std_logic;
+    PS_RESPONSE_READY_OUT  : out std_logic;
+    PS_BUSY_OUT            : out std_logic;
+    PS_SELECTED_IN         : in  std_logic;
+    PS_SRC_MAC_ADDRESS_IN  : in  std_logic_vector(47 downto 0);
+    PS_DEST_MAC_ADDRESS_IN : in  std_logic_vector(47 downto 0);
+    PS_SRC_IP_ADDRESS_IN   : in  std_logic_vector(31 downto 0);
+    PS_DEST_IP_ADDRESS_IN  : in  std_logic_vector(31 downto 0);
+    PS_SRC_UDP_PORT_IN     : in  std_logic_vector(15 downto 0);
+    PS_DEST_UDP_PORT_IN    : in  std_logic_vector(15 downto 0);
+  --
+    TC_RD_EN_IN            : in  std_logic;
+    TC_DATA_OUT            : out std_logic_vector(8 downto 0);
+    TC_FRAME_SIZE_OUT      : out std_logic_vector(15 downto 0);
+    TC_FRAME_TYPE_OUT      : out std_logic_vector(15 downto 0);
+    TC_IP_PROTOCOL_OUT     : out std_logic_vector(7 downto 0);  
+    TC_IDENT_OUT           : out std_logic_vector(15 downto 0);  
+    TC_DEST_MAC_OUT        : out std_logic_vector(47 downto 0);
+    TC_DEST_IP_OUT         : out std_logic_vector(31 downto 0);
+    TC_DEST_UDP_OUT        : out std_logic_vector(15 downto 0);
+    TC_SRC_MAC_OUT         : out std_logic_vector(47 downto 0);
+    TC_SRC_IP_OUT          : out std_logic_vector(31 downto 0);
+    TC_SRC_UDP_OUT         : out std_logic_vector(15 downto 0);
+  -- END OF INTERFACE
+    MY_IP_OUT              : out std_logic_vector(31 downto 0);
+    DHCP_START_IN          : in  std_logic;
+    DHCP_DONE_OUT          : out std_logic;
+  -- debug
+    DEBUG_OUT              : out  std_logic_vector(63 downto 0)
+  );
 end gbe_response_constructor_DHCP;
 
 
 architecture gbe_response_constructor_DHCP_arch of gbe_response_constructor_DHCP is
 
-attribute syn_encoding  : string;
+  attribute syn_encoding  : string;
 
-type main_states is (BOOTING, DELAY, SENDING_DISCOVER, WAITING_FOR_OFFER, SENDING_REQUEST, WAITING_FOR_ACK, ESTABLISHED);
-signal main_current_state, main_next_state : main_states;
-attribute syn_encoding of main_current_state: signal is "onehot";
+  type main_states is (BOOTING, DELAY, SENDING_DISCOVER, WAITING_FOR_OFFER, SENDING_REQUEST, WAITING_FOR_ACK, ESTABLISHED);
+  signal main_current_state, main_next_state : main_states;
+  attribute syn_encoding of main_current_state: signal is "onehot";
 
-type receive_states is (IDLE, DISCARD, CLEANUP, SAVE_VALUES);
-signal receive_current_state, receive_next_state : receive_states;
-attribute syn_encoding of receive_current_state: signal is "onehot";
+  type receive_states is (IDLE, DISCARD, CLEANUP, SAVE_VALUES);
+  signal receive_current_state, receive_next_state : receive_states;
+  attribute syn_encoding of receive_current_state: signal is "onehot";
 
-type discover_states is (IDLE, WAIT_FOR_LOAD, BOOTP_HEADERS, CLIENT_IP, YOUR_IP, ZEROS1, MY_MAC, ZEROS2, VENDOR_VALS, VENDOR_VALS2, TERMINATION, CLEANUP);
-signal construct_current_state, construct_next_state : discover_states;
-attribute syn_encoding of construct_current_state: signal is "onehot";
+  type discover_states is (IDLE, WAIT_FOR_LOAD, BOOTP_HEADERS, CLIENT_IP, YOUR_IP, ZEROS1, MY_MAC, ZEROS2, VENDOR_VALS, VENDOR_VALS2, TERMINATION, CLEANUP);
+  signal construct_current_state, construct_next_state : discover_states;
+  attribute syn_encoding of construct_current_state: signal is "onehot";
 
-type stats_states is (IDLE, LOAD_SENT, LOAD_RECEIVED, LOAD_DISCARDED, CLEANUP);
-signal stats_current_state, stats_next_state : stats_states;
-attribute syn_encoding of stats_current_state : signal is "onehot";
+  type stats_states is (IDLE, LOAD_SENT, LOAD_RECEIVED, LOAD_DISCARDED, CLEANUP);
+  signal stats_current_state, stats_next_state : stats_states;
+  attribute syn_encoding of stats_current_state : signal is "onehot";
 
-signal state                    : std_logic_vector(3 downto 0);
-signal rec_frames               : std_logic_vector(15 downto 0);
-signal sent_frames              : std_logic_vector(15 downto 0);
+  signal state                    : std_logic_vector(3 downto 0);
+  signal rec_frames               : std_logic_vector(15 downto 0);
+  signal sent_frames              : unsigned(15 downto 0);
 
-signal wait_ctr                 : std_logic_vector(31 downto 0);  -- wait for 5 sec before sending request
-signal load_ctr                 : integer range 0 to 600 := 0;
+  signal wait_ctr                 : unsigned(31 downto 0);  -- wait for 5 sec before sending request
+  signal load_ctr                 : integer range 0 to 600 := 0;
 
-signal bootp_hdr                : std_logic_vector(95 downto 0);
+  signal bootp_hdr                : std_logic_vector(95 downto 0);
 
-signal tc_data                  : std_logic_vector(8 downto 0);
-signal vendor_values            : std_logic_vector(175 downto 0);
-signal save_ctr                 : integer range 0 to 600 := 0;
-signal saved_transaction_id     : std_logic_vector(31 downto 0);
-signal saved_proposed_ip        : std_logic_vector(31 downto 0);
-signal saved_dhcp_type          : std_logic_vector(23 downto 0);
-signal saved_true_ip            : std_logic_vector(31 downto 0);
-signal transaction_id           : std_logic_vector(31 downto 0);
-signal client_ip_reg            : std_logic_vector(31 downto 0);
-signal your_ip_reg              : std_logic_vector(31 downto 0);
-signal saved_server_mac         : std_logic_vector(47 downto 0);
-signal saved_server_ip          : std_logic_vector(31 downto 0);
-signal state2                   : std_logic_vector(3 downto 0);
-signal state3                   : std_logic_vector(3 downto 0);
-signal vendor_values2           : std_logic_vector(47 downto 0);
+  signal tc_data                  : std_logic_vector(8 downto 0);
+  signal vendor_values            : std_logic_vector(175 downto 0);
+  signal save_ctr                 : integer range 0 to 600 := 0;
+  signal saved_transaction_id     : std_logic_vector(31 downto 0);
+  signal saved_proposed_ip        : std_logic_vector(31 downto 0);
+  signal saved_dhcp_type          : std_logic_vector(23 downto 0);
+  signal saved_true_ip            : std_logic_vector(31 downto 0);
+  signal transaction_id           : std_logic_vector(31 downto 0);
+  signal client_ip_reg            : std_logic_vector(31 downto 0);
+  signal your_ip_reg              : std_logic_vector(31 downto 0);
+  signal saved_server_mac         : std_logic_vector(47 downto 0);
+  signal saved_server_ip          : std_logic_vector(31 downto 0);
+  signal state2                   : std_logic_vector(3 downto 0);
+  signal state3                   : std_logic_vector(3 downto 0);
+  signal vendor_values2           : std_logic_vector(47 downto 0);
 
-signal discarded_ctr            : std_logic_vector(15 downto 0);
+  signal discarded_ctr            : std_logic_vector(15 downto 0);
 
-signal stat_data_temp           : std_logic_vector(31 downto 0);
+  signal stat_data_temp           : std_logic_vector(31 downto 0);
 
-attribute syn_preserve : boolean;
-attribute syn_keep : boolean;
-attribute syn_keep of state, state2 : signal is true;
-attribute syn_preserve of state, state2 : signal is true;
+  attribute syn_preserve : boolean;
+  attribute syn_keep : boolean;
+  attribute syn_keep of state, state2 : signal is true;
+  attribute syn_preserve of state, state2 : signal is true;
 
-signal wait_value : std_logic_vector(31 downto 0);
+  signal wait_value : unsigned(31 downto 0);
 
-signal my_ip : std_logic_vector(31 downto 0);
+  signal my_ip : std_logic_vector(31 downto 0);
 
 begin
 
--- ****
--- fixing the constant values for DHCP request headers
-TC_DEST_MAC_OUT               <= x"ffffffffffff" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else saved_server_mac;
-TC_DEST_IP_OUT                <= x"ffffffff" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else saved_server_ip;
-TC_DEST_UDP_OUT               <= x"4300";
-TC_SRC_MAC_OUT                <= MY_MAC_IN;
-TC_SRC_IP_OUT                 <= x"00000000" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else saved_proposed_ip;
-TC_SRC_UDP_OUT                <= x"4400";
-TC_IP_PROTOCOL_OUT            <= x"11"; -- udp
-bootp_hdr(7 downto 0)         <= x"01";  -- message type(request)
-bootp_hdr(15 downto 8)        <= x"01";  -- hardware type (eth)
-bootp_hdr(23 downto 16)       <= x"06";  -- hardware address length
-bootp_hdr(31 downto 24)       <= x"00";  -- hops
-bootp_hdr(63 downto 32)       <= transaction_id;  -- transaction id;
-bootp_hdr(95 downto 64)       <= x"0000_0000";  -- seconds elapsed/flags
-transaction_id                <= x"cefa" & MY_MAC_IN(47 downto 40) & MY_MAC_IN(23 downto 16);
-vendor_values(31 downto 0)    <= x"63538263"; -- magic cookie (dhcp message)
-vendor_values(55 downto 32)   <= x"010135" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else x"030135"; -- dhcp discover, then dhcp request
-vendor_values(79 downto 56)   <= x"01073d"; -- client identifier
-vendor_values(127 downto 80)  <= MY_MAC_IN;  -- client identifier
-vendor_values(143 downto 128) <= x"040c";  -- client name
---vendor_values(175 downto 144) <= x"33425254";  -- client name (TRB3)
-vendor_values(175 downto 144) <= x"6f72694b";  -- client name (Kiro)
-vendor_values2(15 downto 0)   <= x"0436";  -- server identifier
-vendor_values2(47 downto 16)  <= saved_server_ip;
-
---*****************
--- setting of global variable for IP address
-my_ip <= saved_true_ip when main_current_state = ESTABLISHED else (others => '0');
-MY_IP_OUT <= my_ip;
---
---*****************
-
-SAVE_SERVER_ADDR_PROC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if   ( main_current_state = BOOTING ) then
-      saved_server_mac <= (others => '0');
-      saved_server_ip  <= (others => '0');
-    elsif( (main_current_state = WAITING_FOR_OFFER) and (receive_current_state = SAVE_VALUES and save_ctr = 1) ) then
-      saved_server_mac <= PS_SRC_MAC_ADDRESS_IN;
-      saved_server_ip  <= PS_SRC_IP_ADDRESS_IN;
+  -- ****
+  -- fixing the constant values for DHCP request headers
+  TC_DEST_MAC_OUT               <= x"ffffffffffff" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else saved_server_mac;
+  TC_DEST_IP_OUT                <= x"ffffffff" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else saved_server_ip;
+  TC_DEST_UDP_OUT               <= x"4300";
+  TC_SRC_MAC_OUT                <= MY_MAC_IN;
+  TC_SRC_IP_OUT                 <= x"00000000" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else saved_proposed_ip;
+  TC_SRC_UDP_OUT                <= x"4400";
+  TC_IP_PROTOCOL_OUT            <= x"11"; -- udp
+  bootp_hdr(7 downto 0)         <= x"01";  -- message type(request)
+  bootp_hdr(15 downto 8)        <= x"01";  -- hardware type (eth)
+  bootp_hdr(23 downto 16)       <= x"06";  -- hardware address length
+  bootp_hdr(31 downto 24)       <= x"00";  -- hops
+  bootp_hdr(63 downto 32)       <= transaction_id;  -- transaction id;
+  bootp_hdr(95 downto 64)       <= x"0000_0000";  -- seconds elapsed/flags
+  transaction_id                <= x"cefa" & MY_MAC_IN(47 downto 40) & MY_MAC_IN(23 downto 16);
+  vendor_values(31 downto 0)    <= x"63538263"; -- magic cookie (dhcp message)
+  vendor_values(55 downto 32)   <= x"010135" when (main_current_state = BOOTING or main_current_state = SENDING_DISCOVER) else x"030135"; -- dhcp discover, then dhcp request
+  vendor_values(79 downto 56)   <= x"01073d"; -- client identifier
+  vendor_values(127 downto 80)  <= MY_MAC_IN;  -- client identifier
+  vendor_values(143 downto 128) <= x"040c";  -- client name
+  --vendor_values(175 downto 144) <= x"33425254";  -- client name (TRB3)
+  vendor_values(175 downto 144) <= x"6f72694b";  -- client name (Kiro)
+  vendor_values2(15 downto 0)   <= x"0436";  -- server identifier
+  vendor_values2(47 downto 16)  <= saved_server_ip;
+
+  --*****************
+  -- setting of global variable for IP address
+  my_ip <= saved_true_ip when main_current_state = ESTABLISHED else (others => '0');
+  MY_IP_OUT <= my_ip;
+  --
+  --*****************
+
+  PROC_SAVE_SERVER_ADDR: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if   ( main_current_state = BOOTING ) then
+        saved_server_mac <= (others => '0');
+        saved_server_ip  <= (others => '0');
+      elsif( (main_current_state = WAITING_FOR_OFFER) and (receive_current_state = SAVE_VALUES and save_ctr = 1) ) then
+        saved_server_mac <= PS_SRC_MAC_ADDRESS_IN;
+        saved_server_ip  <= PS_SRC_IP_ADDRESS_IN;
+      end if;
     end if;
-  end if;
-end process SAVE_SERVER_ADDR_PROC;
+  end process PROC_SAVE_SERVER_ADDR;
 
 
--- **** MAIN MACHINE PART
+  -- **** MAIN MACHINE PART
 
-MAIN_MACHINE_PROC: process( CLK, RESET)
-begin
-  if   ( RESET = '1' ) then
-    main_current_state <= BOOTING;
-  elsif( rising_edge(CLK) ) then
-    main_current_state <= main_next_state;
-  end if;
-end process MAIN_MACHINE_PROC;
+  PROC_MAIN_FSM: process( CLK, RESET)
+  begin
+    if   ( RESET = '1' ) then
+      main_current_state <= BOOTING;
+    elsif( rising_edge(CLK) ) then
+      main_current_state <= main_next_state;
+    end if;
+  end process PROC_MAIN_FSM;
 
-wait_value <= x"2000_0000";
+  wait_value <= x"2000_0000";
 
-MAIN_MACHINE : process(main_current_state, DHCP_START_IN, construct_current_state, wait_ctr, receive_current_state, PS_DATA_IN, wait_value)
-begin
-  state2 <= x"0";
+  PROC_MAIN_TRANSITIONS : process(main_current_state, DHCP_START_IN, construct_current_state, wait_ctr, receive_current_state, PS_DATA_IN, wait_value)
+  begin
+    state2 <= x"0";
 
-  case (main_current_state) is
-  
-    when BOOTING =>
-      state2 <= x"1";
-      if (DHCP_START_IN = '1') then
-        main_next_state <= DELAY;
-      else
-        main_next_state <= BOOTING;
-      end if;
-      
-    when DELAY =>
-      state2 <= x"2";
-      if (wait_ctr = wait_value) then
-        main_next_state <= SENDING_DISCOVER;
-      else
-        main_next_state <= DELAY;
-      end if;
+    case (main_current_state) is
     
-    when SENDING_DISCOVER =>
-      state2 <= x"3";
-      if (construct_current_state = CLEANUP) then
-        main_next_state <= WAITING_FOR_OFFER;
-      else
-        main_next_state <= SENDING_DISCOVER;
-      end if;
-    
-    when WAITING_FOR_OFFER =>
-      state2 <= x"4"; 
-      if (receive_current_state = SAVE_VALUES) and (PS_DATA_IN(8) = '1') then
-        main_next_state <= SENDING_REQUEST;
-      elsif (wait_ctr = x"2000_0000") then
-        main_next_state <= BOOTING;
-      else
-        main_next_state <= WAITING_FOR_OFFER;
-      end if;
-    
-    when SENDING_REQUEST =>
-      state2 <= x"5";
-      if (construct_current_state = CLEANUP) then
-        main_next_state <= WAITING_FOR_ACK;
-      else
-        main_next_state <= SENDING_REQUEST;
-      end if;
-    
-    when WAITING_FOR_ACK =>
-      state2 <= x"6";
-      if (receive_current_state = SAVE_VALUES) and (PS_DATA_IN(8) = '1') then
-        main_next_state <= ESTABLISHED;
-      elsif (wait_ctr = x"2000_0000") then
-        main_next_state <= BOOTING;
-      else
-        main_next_state <= WAITING_FOR_ACK;
-      end if;
-    
-    when ESTABLISHED =>
-      state2 <= x"7";
-        main_next_state <= ESTABLISHED;
-
-    when others => main_next_state <= BOOTING;
-  
-  end case;
+      when BOOTING =>
+        state2 <= x"1";
+        if (DHCP_START_IN = '1') then
+          main_next_state <= DELAY;
+        else
+          main_next_state <= BOOTING;
+        end if;
+        
+      when DELAY =>
+        state2 <= x"2";
+        if (wait_ctr = wait_value) then
+          main_next_state <= SENDING_DISCOVER;
+        else
+          main_next_state <= DELAY;
+        end if;
+      
+      when SENDING_DISCOVER =>
+        state2 <= x"3";
+        if (construct_current_state = CLEANUP) then
+          main_next_state <= WAITING_FOR_OFFER;
+        else
+          main_next_state <= SENDING_DISCOVER;
+        end if;
+      
+      when WAITING_FOR_OFFER =>
+        state2 <= x"4"; 
+        if (receive_current_state = SAVE_VALUES) and (PS_DATA_IN(8) = '1') then
+          main_next_state <= SENDING_REQUEST;
+        elsif (wait_ctr = x"2000_0000") then
+          main_next_state <= BOOTING;
+        else
+          main_next_state <= WAITING_FOR_OFFER;
+        end if;
+      
+      when SENDING_REQUEST =>
+        state2 <= x"5";
+        if (construct_current_state = CLEANUP) then
+          main_next_state <= WAITING_FOR_ACK;
+        else
+          main_next_state <= SENDING_REQUEST;
+        end if;
+      
+      when WAITING_FOR_ACK =>
+        state2 <= x"6";
+        if (receive_current_state = SAVE_VALUES) and (PS_DATA_IN(8) = '1') then
+          main_next_state <= ESTABLISHED;
+        elsif (wait_ctr = x"2000_0000") then
+          main_next_state <= BOOTING;
+        else
+          main_next_state <= WAITING_FOR_ACK;
+        end if;
+      
+      when ESTABLISHED =>
+        state2 <= x"7";
+          main_next_state <= ESTABLISHED;
 
-end process MAIN_MACHINE;
+      when others => main_next_state <= BOOTING;
+    
+    end case;
 
-WAIT_CTR_PROC : process(CLK)
-begin
-  if rising_edge(CLK) then
-    if (main_current_state = SENDING_DISCOVER or main_current_state = SENDING_REQUEST or main_current_state = BOOTING) then
-      wait_ctr <= (others => '0');
-    elsif (main_current_state = WAITING_FOR_ACK and receive_current_state = SAVE_VALUES and PS_DATA_IN(8) = '1') then
-      wait_ctr <= (others => '0');
-    elsif (main_current_state = WAITING_FOR_ACK or main_current_state = WAITING_FOR_OFFER or main_current_state = DELAY or main_current_state = ESTABLISHED) then
-      wait_ctr <= wait_ctr + x"1";
-    else
-      wait_ctr <= wait_ctr;
+  end process PROC_MAIN_TRANSITIONS;
+
+  PROC_WAIT_CTR: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if   ( main_current_state = SENDING_DISCOVER or main_current_state = SENDING_REQUEST or main_current_state = BOOTING ) then
+        wait_ctr <= (others => '0');
+      elsif( main_current_state = WAITING_FOR_ACK and receive_current_state = SAVE_VALUES and PS_DATA_IN(8) = '1' ) then
+        wait_ctr <= (others => '0');
+      elsif( main_current_state = WAITING_FOR_ACK or main_current_state = WAITING_FOR_OFFER or main_current_state = DELAY or main_current_state = ESTABLISHED ) then
+        wait_ctr <= wait_ctr + 1;
+      end if;
     end if;
-  end if;
-end process WAIT_CTR_PROC;
+  end process PROC_WAIT_CTR;
 
-DHCP_DONE_OUT <= '1' when main_current_state = ESTABLISHED else '0';
+  DHCP_DONE_OUT <= '1' when main_current_state = ESTABLISHED else '0';
 
+  -- **** MESSAGES RECEIVING PART
 
--- **** MESSAGES RECEIVING PART
+  PROC_RECEIVE_FSM: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
+      receive_current_state <= IDLE;
+    elsif( rising_edge(CLK) ) then
+      receive_current_state <= receive_next_state;
+    end if;
+  end process PROC_RECEIVE_FSM;
 
-RECEIVE_MACHINE_PROC : process(RESET, CLK)
-begin
-  if RESET = '1' then
-    receive_current_state <= IDLE;
-  elsif rising_edge(CLK) then
-    receive_current_state <= receive_next_state;
-  end if;
-end process RECEIVE_MACHINE_PROC;
-
-RECEIVE_MACHINE : process(receive_current_state, main_current_state, bootp_hdr, saved_dhcp_type, saved_transaction_id, PS_DATA_IN, PS_DEST_MAC_ADDRESS_IN, MY_MAC_IN, PS_ACTIVATE_IN, PS_WR_EN_IN, save_ctr)
-begin
-  state3 <= x"0";
-  
-  case receive_current_state is
-  
-    when IDLE =>
-      state3 <= x"1";
-      if (PS_ACTIVATE_IN = '1' and PS_WR_EN_IN = '1') then
-        if (main_current_state = WAITING_FOR_OFFER or main_current_state = WAITING_FOR_ACK) then  -- ready to receive dhcp frame
-          if (PS_DEST_MAC_ADDRESS_IN = MY_MAC_IN) then -- check if i'm the addressee (discards broadcasts also)
-            receive_next_state <= SAVE_VALUES;
+  PROC_RECEIVE_TRANSITIONS: process( receive_current_state, main_current_state, bootp_hdr, saved_dhcp_type, saved_transaction_id, 
+                                     PS_DATA_IN, PS_DEST_MAC_ADDRESS_IN, MY_MAC_IN, PS_ACTIVATE_IN, PS_WR_EN_IN, save_ctr )
+  begin
+    state3 <= x"0";
+    
+    case receive_current_state is
+    
+      when IDLE =>
+        state3 <= x"1";
+        if (PS_ACTIVATE_IN = '1' and PS_WR_EN_IN = '1') then
+          if (main_current_state = WAITING_FOR_OFFER or main_current_state = WAITING_FOR_ACK) then  -- ready to receive dhcp frame
+            if (PS_DEST_MAC_ADDRESS_IN = MY_MAC_IN) then -- check if i'm the addressee (discards broadcasts also)
+              receive_next_state <= SAVE_VALUES;
+            else
+              receive_next_state <= DISCARD;  -- discard if the frame is not for me
+            end if;
           else
-            receive_next_state <= DISCARD;  -- discard if the frame is not for me
+            receive_next_state <= DISCARD;  -- discard if the frame arrived at wrong time
           end if;
         else
-          receive_next_state <= DISCARD;  -- discard if the frame arrived at wrong time
+          receive_next_state <= IDLE;
+        end if;
+        
+      when SAVE_VALUES =>
+        state3 <= x"2";
+        if (PS_DATA_IN(8) = '1') then
+          receive_next_state <= CLEANUP;
+        -- check if the same transaction
+        elsif (save_ctr = 9) and (saved_transaction_id /= bootp_hdr(63 downto 32)) then
+          receive_next_state <= DISCARD;
+        -- if the wrong message at the wrong time
+        elsif (main_current_state = WAITING_FOR_OFFER) and (save_ctr = 242) and (saved_dhcp_type /= x"020135") then
+          receive_next_state <= DISCARD;
+        -- if the wrong message at the wrong time
+        elsif (main_current_state = WAITING_FOR_ACK) and (save_ctr = 242) and (saved_dhcp_type /= x"050135") then
+          receive_next_state <= DISCARD;
+        else
+          receive_next_state <= SAVE_VALUES;
         end if;
-      else
-        receive_next_state <= IDLE;
-      end if;
       
-    when SAVE_VALUES =>
-      state3 <= x"2";
-      if (PS_DATA_IN(8) = '1') then
-        receive_next_state <= CLEANUP;
-      -- check if the same transaction
-      elsif (save_ctr = 9) and (saved_transaction_id /= bootp_hdr(63 downto 32)) then
-        receive_next_state <= DISCARD;
-      -- if the wrong message at the wrong time
-      elsif (main_current_state = WAITING_FOR_OFFER) and (save_ctr = 242) and (saved_dhcp_type /= x"020135") then
-        receive_next_state <= DISCARD;
-      -- if the wrong message at the wrong time
-      elsif (main_current_state = WAITING_FOR_ACK) and (save_ctr = 242) and (saved_dhcp_type /= x"050135") then
-        receive_next_state <= DISCARD;
-      else
-        receive_next_state <= SAVE_VALUES;
-      end if;
+      when DISCARD =>
+        state3 <= x"3";
+        if (PS_DATA_IN(8) = '1') then
+          receive_next_state <= CLEANUP;
+        else
+          receive_next_state <= DISCARD;
+        end if;
+        
+      when CLEANUP =>
+        state3 <= x"4";
+        receive_next_state <= IDLE;
+        
+      when others => receive_next_state <= IDLE;
     
-    when DISCARD =>
-      state3 <= x"3";
-      if (PS_DATA_IN(8) = '1') then
-        receive_next_state <= CLEANUP;
-      else
-        receive_next_state <= DISCARD;
-      end if;
-      
-    when CLEANUP =>
-      state3 <= x"4";
-      receive_next_state <= IDLE;
-      
-    when others => receive_next_state <= IDLE;
-  
-  end case;
+    end case;
 
-end process RECEIVE_MACHINE;
+  end process PROC_RECEIVE_TRANSITIONS;
 
-SAVE_CTR_PROC : process(CLK)
-begin
-  if rising_edge(CLK) then
-    if (receive_current_state = IDLE) then
-      save_ctr <= 0;
-    elsif (receive_current_state = SAVE_VALUES and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
-      save_ctr <= save_ctr + 1;
-    else
-      save_ctr <= save_ctr;
+  PROC_SAVE_CTR: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if   ( receive_current_state = IDLE ) then
+        save_ctr <= 0;
+      elsif( receive_current_state = SAVE_VALUES and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then
+        save_ctr <= save_ctr + 1;
+      end if;
     end if;
-  end if;
-end process SAVE_CTR_PROC;
-
-SAVE_VALUES_PROC : process(CLK)
-begin
-  if rising_edge(CLK) then
-    if (main_current_state = BOOTING) then
-      saved_transaction_id <= (others => '0');
-      saved_proposed_ip    <= (others => '0');
-      saved_true_ip        <= (others => '0');
-      saved_dhcp_type      <= (others => '0');
-    -- dissection of DHCP Offer message
-    elsif (main_current_state = WAITING_FOR_OFFER and receive_current_state = SAVE_VALUES) then
-    
-      saved_true_ip <= saved_true_ip;
-    
-      case save_ctr is
+  end process PROC_SAVE_CTR;
+
+  PROC_SAVE_VALUES: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if   ( main_current_state = BOOTING ) then
+        saved_transaction_id <= (others => '0');
+        saved_proposed_ip    <= (others => '0');
+        saved_true_ip        <= (others => '0');
+        saved_dhcp_type      <= (others => '0');
+      -- dissection of DHCP Offer message
+      elsif( main_current_state = WAITING_FOR_OFFER and receive_current_state = SAVE_VALUES ) then
       
-        when 3 =>
-          saved_transaction_id(7 downto 0) <= PS_DATA_IN(7 downto 0);
-        
-        when 4 =>
-          saved_transaction_id(15 downto 8) <= PS_DATA_IN(7 downto 0);
+        saved_true_ip <= saved_true_ip;
       
-        when 5 =>
-          saved_transaction_id(23 downto 16) <= PS_DATA_IN(7 downto 0);
-          
-        when 6 =>
-          saved_transaction_id(31 downto 24) <= PS_DATA_IN(7 downto 0);
-          
-          
-        when 15 =>
-          saved_proposed_ip(7 downto 0) <= PS_DATA_IN(7 downto 0);
+        case save_ctr is
         
-        when 16 =>
-          saved_proposed_ip(15 downto 8) <= PS_DATA_IN(7 downto 0);
-          
-        when 17 =>
-          saved_proposed_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
+          when 3 =>
+            saved_transaction_id(7 downto 0) <= PS_DATA_IN(7 downto 0);
           
-        when 18 =>
-          saved_proposed_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
-          
-          
-        when 239 =>
-          saved_dhcp_type(7 downto 0) <= PS_DATA_IN(7 downto 0);
-          
-        when 240 =>
-          saved_dhcp_type(15 downto 8) <= PS_DATA_IN(7 downto 0);
-          
-        when 241 =>
-          saved_dhcp_type(23 downto 16) <= PS_DATA_IN(7 downto 0);
-          
-        when others => null;
+          when 4 =>
+            saved_transaction_id(15 downto 8) <= PS_DATA_IN(7 downto 0);
+        
+          when 5 =>
+            saved_transaction_id(23 downto 16) <= PS_DATA_IN(7 downto 0);
+            
+          when 6 =>
+            saved_transaction_id(31 downto 24) <= PS_DATA_IN(7 downto 0);
+            
+            
+          when 15 =>
+            saved_proposed_ip(7 downto 0) <= PS_DATA_IN(7 downto 0);
           
-      end case;
-    -- dissection on DHCP Ack message
-    elsif (main_current_state = WAITING_FOR_ACK and receive_current_state = SAVE_VALUES) then
-    
-      saved_proposed_ip <= saved_proposed_ip;
-    
-      case save_ctr is
+          when 16 =>
+            saved_proposed_ip(15 downto 8) <= PS_DATA_IN(7 downto 0);
+            
+          when 17 =>
+            saved_proposed_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
+            
+          when 18 =>
+            saved_proposed_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
+            
+            
+          when 239 =>
+            saved_dhcp_type(7 downto 0) <= PS_DATA_IN(7 downto 0);
+            
+          when 240 =>
+            saved_dhcp_type(15 downto 8) <= PS_DATA_IN(7 downto 0);
+            
+          when 241 =>
+            saved_dhcp_type(23 downto 16) <= PS_DATA_IN(7 downto 0);
+            
+          when others => null;
+            
+        end case;
+      -- dissection on DHCP Ack message
+      elsif( main_current_state = WAITING_FOR_ACK and receive_current_state = SAVE_VALUES ) then
       
-        when 3 =>
-          saved_transaction_id(7 downto 0) <= PS_DATA_IN(7 downto 0);
-        
-        when 4 =>
-          saved_transaction_id(15 downto 8) <= PS_DATA_IN(7 downto 0);
+        saved_proposed_ip <= saved_proposed_ip;
       
-        when 5 =>
-          saved_transaction_id(23 downto 16) <= PS_DATA_IN(7 downto 0);
-          
-        when 6 =>
-          saved_transaction_id(31 downto 24) <= PS_DATA_IN(7 downto 0);
-          
-          
-        when 15 =>
-          saved_true_ip(7 downto 0) <= PS_DATA_IN(7 downto 0);
+        case save_ctr is
         
-        when 16 =>
-          saved_true_ip(15 downto 8) <= PS_DATA_IN(7 downto 0);
-          
-        when 17 =>
-          saved_true_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
-          
-        when 18 =>
-          saved_true_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
+          when 3 =>
+            saved_transaction_id(7 downto 0) <= PS_DATA_IN(7 downto 0);
           
+          when 4 =>
+            saved_transaction_id(15 downto 8) <= PS_DATA_IN(7 downto 0);
+        
+          when 5 =>
+            saved_transaction_id(23 downto 16) <= PS_DATA_IN(7 downto 0);
+            
+          when 6 =>
+            saved_transaction_id(31 downto 24) <= PS_DATA_IN(7 downto 0);
+            
+            
+          when 15 =>
+            saved_true_ip(7 downto 0) <= PS_DATA_IN(7 downto 0);
           
-        when 239 =>
-          saved_dhcp_type(7 downto 0) <= PS_DATA_IN(7 downto 0);
-          
-        when 240 =>
-          saved_dhcp_type(15 downto 8) <= PS_DATA_IN(7 downto 0);
-          
-        when 241 =>
-          saved_dhcp_type(23 downto 16) <= PS_DATA_IN(7 downto 0);
-          
-        when others => null;
-          
-      end case;    
-    else
-      saved_transaction_id <= saved_transaction_id;
-      saved_proposed_ip    <= saved_proposed_ip;
-      saved_true_ip        <= saved_true_ip;
-      saved_dhcp_type      <= saved_dhcp_type;    
+          when 16 =>
+            saved_true_ip(15 downto 8) <= PS_DATA_IN(7 downto 0);
+            
+          when 17 =>
+            saved_true_ip(23 downto 16) <= PS_DATA_IN(7 downto 0);
+            
+          when 18 =>
+            saved_true_ip(31 downto 24) <= PS_DATA_IN(7 downto 0);
+            
+            
+          when 239 =>
+            saved_dhcp_type(7 downto 0) <= PS_DATA_IN(7 downto 0);
+            
+          when 240 =>
+            saved_dhcp_type(15 downto 8) <= PS_DATA_IN(7 downto 0);
+            
+          when 241 =>
+            saved_dhcp_type(23 downto 16) <= PS_DATA_IN(7 downto 0);
+            
+          when others => null;
+            
+        end case;    
+      end if;
     end if;
-  end if;
-end process SAVE_VALUES_PROC;
-
+  end process PROC_SAVE_VALUES;
 
--- **** MESSAGES CONSTRUCTING PART
+  -- **** MESSAGES CONSTRUCTING PART
 
-CONSTRUCT_MACHINE_PROC : process(RESET, CLK)
-begin
-  if RESET = '1' then
-      construct_current_state <= IDLE;
-  elsif rising_edge(CLK) then
-    if (main_current_state = BOOTING) then
+  PROC_CONSTRUCT_FSM: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
       construct_current_state <= IDLE;
-    else
-      construct_current_state <= construct_next_state;
-    end if;
-  end if;
-end process CONSTRUCT_MACHINE_PROC;
-
-CONSTRUCT_MACHINE : process(construct_current_state, main_current_state, load_ctr, PS_SELECTED_IN)
-begin
-  state <= x"0";
-  
-  case construct_current_state is
-  
-    when IDLE =>
-      state <= x"1";
-      if (main_current_state = SENDING_DISCOVER) or (main_current_state = SENDING_REQUEST) then
-        construct_next_state <= WAIT_FOR_LOAD;
+    elsif( rising_edge(CLK) ) then
+      if( main_current_state = BOOTING ) then
+        construct_current_state <= IDLE;
       else
-        construct_next_state <= IDLE;
-      end if;
-      
-    when WAIT_FOR_LOAD =>
-      state <= x"2";
-      if (PS_SELECTED_IN = '1') then
-        construct_next_state <= BOOTP_HEADERS;
-      else
-        construct_next_state <= WAIT_FOR_LOAD;
-      end if;
-    
-      
-    when BOOTP_HEADERS =>
-      state <= x"3";
-      if (load_ctr = 11) then
-        construct_next_state <= CLIENT_IP;
-      else
-        construct_next_state <= BOOTP_HEADERS;
-      end if;
-      
-    when CLIENT_IP =>
-      state <= x"4";
-      if (load_ctr = 15) then
-        construct_next_state <= YOUR_IP;
-      else
-        construct_next_state <= CLIENT_IP;
-      end if;
-      
-    when YOUR_IP => 
-      state <= x"5";
-      if (load_ctr = 19) then
-        construct_next_state <= ZEROS1;
-      else
-        construct_next_state <= YOUR_IP;
-      end if;
-      
-    when ZEROS1 =>
-      state <= x"6";
-      if (load_ctr = 27) then
-        construct_next_state <= MY_MAC;
-      else
-        construct_next_state <= ZEROS1;
+        construct_current_state <= construct_next_state;
       end if;
+    end if;
+  end process PROC_CONSTRUCT_FSM;
+
+  PROC_CONSTRUCT_TRANSITIONS: process( construct_current_state, main_current_state, load_ctr, PS_SELECTED_IN )
+  begin
+    state <= x"0";
     
-    when MY_MAC =>
-      state <= x"7";
-      if (load_ctr = 33) then
-        construct_next_state <= ZEROS2;
-      else
-        construct_next_state <= MY_MAC;
-      end if;
+    case construct_current_state is
     
-    when ZEROS2 =>
-      state <= x"8";
-      if (load_ctr = 235) then
-        construct_next_state <= VENDOR_VALS;
-      else
-        construct_next_state <= ZEROS2;
-      end if;
-      
-    when VENDOR_VALS =>
-      state <= x"9";
-      if (load_ctr = 257) then
-        -- for discover it's enough of values
-        if (main_current_state = SENDING_DISCOVER) then
-          construct_next_state <= TERMINATION;
-        -- for request there is some more values needed
+      when IDLE =>
+        state <= x"1";
+        if (main_current_state = SENDING_DISCOVER) or (main_current_state = SENDING_REQUEST) then
+          construct_next_state <= WAIT_FOR_LOAD;
         else
-          construct_next_state <= VENDOR_VALS2;
+          construct_next_state <= IDLE;
+        end if;
+        
+      when WAIT_FOR_LOAD =>
+        state <= x"2";
+        if (PS_SELECTED_IN = '1') then
+          construct_next_state <= BOOTP_HEADERS;
+        else
+          construct_next_state <= WAIT_FOR_LOAD;
         end if;
-      else
-        construct_next_state <= VENDOR_VALS;
-      end if;
-      
-    when VENDOR_VALS2 =>
-      state <= x"a";
-      if (load_ctr = 263) then
-        construct_next_state <= TERMINATION;
-      else
-        construct_next_state <= VENDOR_VALS2;
-      end if;
-      
-    when TERMINATION =>
-      state <= x"b";
-      construct_next_state <= CLEANUP;
-    
-    when CLEANUP =>
-      state <= x"c";
-      construct_next_state <= IDLE;
       
-    when others => construct_next_state <= IDLE;
-  
-  end case;
-end process CONSTRUCT_MACHINE;
-
-LOAD_CTR_PROC : process(CLK)
-begin
-  if rising_edge(CLK) then
-    if (construct_current_state = IDLE) then
-      load_ctr <= 0;
-    elsif (TC_RD_EN_IN = '1') and (PS_SELECTED_IN = '1') then
-      load_ctr <= load_ctr + 1;
-    else
-      load_ctr <= load_ctr;
-    end if;
-  end if;
-end process LOAD_CTR_PROC;
-
-TC_DATA_PROC : process(CLK)
-begin
-  if rising_edge(CLK) then
-    case (construct_current_state) is
-  
+        
       when BOOTP_HEADERS =>
-        for i in 0 to 7 loop
-          tc_data(i) <= bootp_hdr(load_ctr * 8 + i);
-        end loop;
-        tc_data(8) <= '0';
+        state <= x"3";
+        if (load_ctr = 11) then
+          construct_next_state <= CLIENT_IP;
+        else
+          construct_next_state <= BOOTP_HEADERS;
+        end if;
         
       when CLIENT_IP =>
-        if (main_current_state = SENDING_DISCOVER) then
-          tc_data(7 downto 0) <= x"00";
-        elsif (main_current_state = SENDING_REQUEST) then
-          for i in 0 to 7 loop
-            tc_data(i) <= saved_proposed_ip((load_ctr - 12) * 8 + i);
-          end loop;
+        state <= x"4";
+        if (load_ctr = 15) then
+          construct_next_state <= YOUR_IP;
+        else
+          construct_next_state <= CLIENT_IP;
         end if;
-        tc_data(8) <= '0';
-      
-      when YOUR_IP =>
-        tc_data(7 downto 0) <= x"00";
-        tc_data(8) <= '0';
-      
+        
+      when YOUR_IP => 
+        state <= x"5";
+        if (load_ctr = 19) then
+          construct_next_state <= ZEROS1;
+        else
+          construct_next_state <= YOUR_IP;
+        end if;
+        
       when ZEROS1 =>
-        tc_data(7 downto 0) <= x"00";
-        tc_data(8) <= '0';
+        state <= x"6";
+        if (load_ctr = 27) then
+          construct_next_state <= MY_MAC;
+        else
+          construct_next_state <= ZEROS1;
+        end if;
       
       when MY_MAC =>
-        for i in 0 to 7 loop
-          tc_data(i) <= MY_MAC_IN((load_ctr - 28) * 8 + i);
-        end loop;
-        tc_data(8) <= '0';
+        state <= x"7";
+        if (load_ctr = 33) then
+          construct_next_state <= ZEROS2;
+        else
+          construct_next_state <= MY_MAC;
+        end if;
       
       when ZEROS2 =>
-        tc_data(7 downto 0) <= x"00";
-        tc_data(8) <= '0';
+        state <= x"8";
+        if (load_ctr = 235) then
+          construct_next_state <= VENDOR_VALS;
+        else
+          construct_next_state <= ZEROS2;
+        end if;
         
       when VENDOR_VALS =>
-        for i in 0 to 7 loop
-          tc_data(i) <= vendor_values((load_ctr - 236) * 8 + i);
-        end loop;
-        tc_data(8) <= '0';
+        state <= x"9";
+        if (load_ctr = 257) then
+          -- for discover it's enough of values
+          if (main_current_state = SENDING_DISCOVER) then
+            construct_next_state <= TERMINATION;
+          -- for request there is some more values needed
+          else
+            construct_next_state <= VENDOR_VALS2;
+          end if;
+        else
+          construct_next_state <= VENDOR_VALS;
+        end if;
         
-      -- needed only for DHCP Request message
       when VENDOR_VALS2 =>
-        for i in 0 to 7 loop
-          tc_data(i) <= vendor_values2((load_ctr - 258) * 8 + i);
-        end loop;
-        tc_data(8) <= '0';
+        state <= x"a";
+        if (load_ctr = 263) then
+          construct_next_state <= TERMINATION;
+        else
+          construct_next_state <= VENDOR_VALS2;
+        end if;
         
       when TERMINATION =>
-        tc_data(7 downto 0) <= x"ff";
-        tc_data(8)          <= '1';
+        state <= x"b";
+        construct_next_state <= CLEANUP;
       
-      when others => 
-        tc_data(7 downto 0) <= x"00";
-        tc_data(8) <= '0';
+      when CLEANUP =>
+        state <= x"c";
+        construct_next_state <= IDLE;
+        
+      when others => construct_next_state <= IDLE;
     
     end case;
+  end process PROC_CONSTRUCT_TRANSITIONS;
+
+  PROC_LOAD_CTR: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if   ( construct_current_state = IDLE ) then
+        load_ctr <= 0;
+      elsif( (TC_RD_EN_IN = '1') and (PS_SELECTED_IN = '1') ) then
+        load_ctr <= load_ctr + 1;
+      end if;
+    end if;
+  end process PROC_LOAD_CTR;
 
-    TC_DATA_OUT  <= tc_data;
+  PROC_TC_DATA: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      case (construct_current_state) is
+    
+        when BOOTP_HEADERS =>
+          for i in 0 to 7 loop
+            tc_data(i) <= bootp_hdr(load_ctr * 8 + i);
+          end loop;
+          tc_data(8) <= '0';
+          
+        when CLIENT_IP =>
+          if (main_current_state = SENDING_DISCOVER) then
+            tc_data(7 downto 0) <= x"00";
+          elsif (main_current_state = SENDING_REQUEST) then
+            for i in 0 to 7 loop
+              tc_data(i) <= saved_proposed_ip((load_ctr - 12) * 8 + i);
+            end loop;
+          end if;
+          tc_data(8) <= '0';
+        
+        when YOUR_IP =>
+          tc_data(7 downto 0) <= x"00";
+          tc_data(8) <= '0';
+        
+        when ZEROS1 =>
+          tc_data(7 downto 0) <= x"00";
+          tc_data(8) <= '0';
         
-  end if;
-end process;
+        when MY_MAC =>
+          for i in 0 to 7 loop
+            tc_data(i) <= MY_MAC_IN((load_ctr - 28) * 8 + i);
+          end loop;
+          tc_data(8) <= '0';
+        
+        when ZEROS2 =>
+          tc_data(7 downto 0) <= x"00";
+          tc_data(8) <= '0';
+          
+        when VENDOR_VALS =>
+          for i in 0 to 7 loop
+            tc_data(i) <= vendor_values((load_ctr - 236) * 8 + i);
+          end loop;
+          tc_data(8) <= '0';
+          
+        -- needed only for DHCP Request message
+        when VENDOR_VALS2 =>
+          for i in 0 to 7 loop
+            tc_data(i) <= vendor_values2((load_ctr - 258) * 8 + i);
+          end loop;
+          tc_data(8) <= '0';
+          
+        when TERMINATION =>
+          tc_data(7 downto 0) <= x"ff";
+          tc_data(8)          <= '1';
+        
+        when others => 
+          tc_data(7 downto 0) <= x"00";
+          tc_data(8) <= '0';
+      
+      end case;
 
-PS_RESPONSE_SYNC : process( CLK )
-begin
-  if rising_edge(CLK) then
-    if (construct_current_state = IDLE or construct_current_state = CLEANUP) then
-      PS_RESPONSE_READY_OUT <= '0';
-    else
-      PS_RESPONSE_READY_OUT <= '1';
-    end if;
-    
-    if (construct_current_state = IDLE) then
-      PS_BUSY_OUT <= '0';
-    else
-      PS_BUSY_OUT <= '1';
+      TC_DATA_OUT  <= tc_data;
+          
     end if;
-  end if;  
-end process PS_RESPONSE_SYNC;
-
--- fixed sizes for discover and request messages
-TC_FRAME_SIZE_OUT   <= x"0103" when (main_current_state = SENDING_DISCOVER) else x"0109";
+  end process PROC_TC_DATA;
 
-TC_FRAME_TYPE_OUT   <= x"0008";  -- frame type: ip
+  PROC_PS_RESPONSE_SYNC: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if( construct_current_state = IDLE or construct_current_state = CLEANUP ) then
+        PS_RESPONSE_READY_OUT <= '0';
+      else
+        PS_RESPONSE_READY_OUT <= '1';
+      end if;
+      
+      if( construct_current_state = IDLE ) then
+        PS_BUSY_OUT <= '0';
+      else
+        PS_BUSY_OUT <= '1';
+      end if;
+    end if;  
+  end process PROC_PS_RESPONSE_SYNC;
 
-TC_IDENT_OUT        <= x"1" & sent_frames(11 downto 0);
+  -- fixed sizes for discover and request messages
+  TC_FRAME_SIZE_OUT   <= x"0103" when (main_current_state = SENDING_DISCOVER) else x"0109";
+  TC_FRAME_TYPE_OUT   <= x"0008";  -- frame type: ip
+  TC_IDENT_OUT        <= x"1" & std_logic_vector(sent_frames(11 downto 0));
 
-SENT_FRAMES_PROC : process( CLK )
-begin
-  if rising_edge(CLK) then
-    if (RESET = '1') then
+  PROC_SENT_FRAMES: process( CLK )
+  begin
+    if   ( RESET = '1') then
       sent_frames <= (others => '0');
-    elsif (construct_current_state = CLEANUP) then
-      sent_frames <= sent_frames + x"1";
+    elsif( rising_edge(CLK) ) then
+      if( construct_current_state = CLEANUP ) then
+        sent_frames <= sent_frames + 1;
+      end if;
     end if;
-  end if;
-end process SENT_FRAMES_PROC;
-
--- **** debug
-process( CLK )
-begin
-  if rising_edge(CLK) then
-    DEBUG_OUT(3 downto 0)   <= state;
-    DEBUG_OUT(7 downto 4)   <= state2;
-    DEBUG_OUT(11 downto 8)  <= state3;
-  end if;
-end process;
+  end process PROC_SENT_FRAMES;
+
+  -- **** debug
+  PROC_DEBUG: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      DEBUG_OUT(3 downto 0)   <= state;
+      DEBUG_OUT(7 downto 4)   <= state2;
+      DEBUG_OUT(11 downto 8)  <= state3;
+    end if;
+  end process PROC_DEBUG;
 
--- ****
+  -- ****
 
 end gbe_response_constructor_DHCP_arch;
-
-
index 75cf84fe7e1856b1d84aa90829961c9e10775492..0ed6aa4714313a3b8b43417f6402138181221410 100644 (file)
@@ -64,191 +64,191 @@ end gbe_response_constructor_Forward;
 
 architecture gbe_response_constructor_Forward_arch of gbe_response_constructor_Forward is
 
-attribute syn_encoding : string;
-
-type dissect_states is (IDLE, SAVE, WAIT_FOR_LOAD, LOAD, CLEANUP);
-signal dissect_current_state, dissect_next_state : dissect_states;
-attribute syn_encoding of dissect_current_state: signal is "safe,gray";
-
-signal ff_wr_en                 : std_logic;
-signal ff_rd_en                 : std_logic;
-signal resp_bytes_ctr           : std_logic_vector(15 downto 0);
-signal ff_empty                 : std_logic;
-signal ff_full                  : std_logic;
-signal ff_q                     : std_logic_vector(8 downto 0);
-signal ff_rd_lock               : std_logic;
-
-signal state                    : std_logic_vector(3 downto 0);
-signal rec_frames               : std_logic_vector(15 downto 0);
-signal sent_frames              : std_logic_vector(15 downto 0);
-
-signal local_eop : std_logic;
-
-begin
-
-DISSECT_MACHINE_PROC: process( CLK, RESET )
-begin
-  if( RESET = '1' ) then
-    dissect_current_state <= IDLE;
-  elsif( rising_edge(CLK) ) then
-    dissect_current_state <= dissect_next_state;
-  end if;
-end process DISSECT_MACHINE_PROC;
-
-DISSECT_MACHINE: process(dissect_current_state, FWD_SOP_IN, FWD_EOP_IN, ff_q, ff_rd_lock, PS_SELECTED_IN)
-begin
-  case dissect_current_state is
-  
-    when IDLE =>
-      state <= x"1";
-      if (FWD_SOP_IN = '1') then
-        dissect_next_state <= SAVE;
-      else
-        dissect_next_state <= IDLE;
-      end if;
+  attribute syn_encoding       : string;
+
+  type dissect_states is (IDLE, SAVE, WAIT_FOR_LOAD, LOAD, CLEANUP);
+  signal dissect_current_state, dissect_next_state : dissect_states;
+  attribute syn_encoding of dissect_current_state: signal is "safe,gray";
+
+  signal ff_wr_en                 : std_logic;
+  signal ff_rd_en                 : std_logic;
+  signal resp_bytes_ctr           : std_logic_vector(15 downto 0);
+  signal ff_empty                 : std_logic;
+  signal ff_full                  : std_logic;
+  signal ff_q                     : std_logic_vector(8 downto 0);
+  signal ff_rd_lock               : std_logic;
+
+  signal state                    : std_logic_vector(3 downto 0);
+  signal rec_frames               : std_logic_vector(15 downto 0);
+  signal sent_frames              : std_logic_vector(15 downto 0);
+
+  signal local_eop : std_logic;
+
+  begin
+
+  DISSECT_MACHINE_PROC: process( CLK, RESET )
+  begin
+    if( RESET = '1' ) then
+      dissect_current_state <= IDLE;
+    elsif( rising_edge(CLK) ) then
+      dissect_current_state <= dissect_next_state;
+    end if;
+  end process DISSECT_MACHINE_PROC;
+
+  DISSECT_MACHINE: process(dissect_current_state, FWD_SOP_IN, FWD_EOP_IN, ff_q, ff_rd_lock, PS_SELECTED_IN)
+  begin
+    case dissect_current_state is
     
-    when SAVE =>
-      state <= x"2";
-      if (FWD_EOP_IN = '1') then
-        dissect_next_state <= WAIT_FOR_LOAD;
-      else
-        dissect_next_state <= SAVE;
-      end if;
+      when IDLE =>
+        state <= x"1";
+        if (FWD_SOP_IN = '1') then
+          dissect_next_state <= SAVE;
+        else
+          dissect_next_state <= IDLE;
+        end if;
       
-    when WAIT_FOR_LOAD =>
-      state <= x"3";
-      if (PS_SELECTED_IN = '0') then
-        dissect_next_state <= LOAD;
-      else
-        dissect_next_state <= WAIT_FOR_LOAD;
-      end if;
-    
-    when LOAD =>
-      state <= x"4";
-      if (ff_q(8) = '1') and (ff_rd_lock = '0') then
-        dissect_next_state <= CLEANUP;
-      else
-        dissect_next_state <= LOAD;
-      end if;
+      when SAVE =>
+        state <= x"2";
+        if (FWD_EOP_IN = '1') then
+          dissect_next_state <= WAIT_FOR_LOAD;
+        else
+          dissect_next_state <= SAVE;
+        end if;
+        
+      when WAIT_FOR_LOAD =>
+        state <= x"3";
+        if (PS_SELECTED_IN = '0') then
+          dissect_next_state <= LOAD;
+        else
+          dissect_next_state <= WAIT_FOR_LOAD;
+        end if;
+      
+      when LOAD =>
+        state <= x"4";
+        if (ff_q(8) = '1') and (ff_rd_lock = '0') then
+          dissect_next_state <= CLEANUP;
+        else
+          dissect_next_state <= LOAD;
+        end if;
+      
+      when CLEANUP =>
+        state <= x"5";
+        dissect_next_state <= IDLE;
     
-    when CLEANUP =>
-      state <= x"5";
-      dissect_next_state <= IDLE;
-  
-  end case;
-end process DISSECT_MACHINE;
-
-PS_BUSY_OUT <= '0' when dissect_current_state = IDLE else '1';
-
-ff_wr_en <= '1' when (FWD_DATA_VALID_IN = '1') else '0';
-
-local_eop <= '1' when (dissect_current_state = SAVE and FWD_EOP_IN = '1' and FWD_DATA_VALID_IN = '1') else '0';
-
-FF_RD_LOCK_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    ff_rd_lock <= '1';
-  elsif( rising_edge(CLK) ) then
-    if( dissect_current_state = LOAD and ff_rd_en = '1' ) then
-      ff_rd_lock <= '0';
-    else 
+    end case;
+  end process DISSECT_MACHINE;
+
+  PS_BUSY_OUT <= '0' when dissect_current_state = IDLE else '1';
+
+  ff_wr_en <= '1' when (FWD_DATA_VALID_IN = '1') else '0';
+
+  local_eop <= '1' when (dissect_current_state = SAVE and FWD_EOP_IN = '1' and FWD_DATA_VALID_IN = '1') else '0';
+
+  FF_RD_LOCK_PROC: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
       ff_rd_lock <= '1';
+    elsif( rising_edge(CLK) ) then
+      if( dissect_current_state = LOAD and ff_rd_en = '1' ) then
+        ff_rd_lock <= '0';
+      else 
+        ff_rd_lock <= '1';
+      end if;
     end if;
-  end if;
-end process FF_RD_LOCK_PROC;
-
-FRAME_FIFO: entity fifo_4096x9
-port map( 
-  Data(7 downto 0)    => FWD_DATA_IN,
-  Data(8)             => local_eop,
-  WrClock             => CLK,
-  RdClock             => CLK,
-  WrEn                => ff_wr_en,
-  RdEn                => ff_rd_en,
-  Reset               => RESET,
-  RPReset             => RESET,
-  Q                   => ff_q,
-  Empty               => ff_empty,
-  Full                => ff_full
-);
-
-ff_rd_en <= '1' when (TC_RD_EN_IN = '1' and PS_SELECTED_IN = '1') else '0';
-
---TC_DATA_OUT <= ff_q; -- BUG?!?
-TC_DATA_OUT <= ff_q when rising_edge(CLK);
-
-PS_RESPONSE_READY_OUT <= '1' when (dissect_current_state = LOAD) else '0';
-
---TC_FRAME_SIZE_OUT <= resp_bytes_ctr + x"1"; -- BUG?!?
-TC_FRAME_SIZE_OUT <= resp_bytes_ctr;
-
-TC_FRAME_TYPE_OUT  <= x"0008";
-TC_DEST_MAC_OUT    <= FWD_DST_MAC_IN;
-TC_DEST_IP_OUT     <= FWD_DST_IP_IN;
-TC_DEST_UDP_OUT    <= FWD_DST_UDP_IN;
-TC_SRC_MAC_OUT     <= MY_MAC_IN;
-TC_SRC_IP_OUT      <= MY_IP_IN;
-TC_SRC_UDP_OUT     <= FWD_DST_UDP_IN;
-TC_IP_PROTOCOL_OUT <= x"11";
-TC_IDENT_OUT       <= x"6" & sent_frames(11 downto 0);
-
-RESP_BYTES_CTR_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    resp_bytes_ctr <= (others => '0');
-  elsif( rising_edge(CLK) ) then
-    if   ( dissect_current_state = IDLE ) then
-      resp_bytes_ctr <= (others => '0');
-    elsif( dissect_current_state = SAVE and FWD_DATA_VALID_IN = '1' ) then
-      resp_bytes_ctr <= resp_bytes_ctr + x"1";
-    end if;
+  end process FF_RD_LOCK_PROC;
+
+  FRAME_FIFO: entity fifo_4096x9
+  port map( 
+    Data(7 downto 0)    => FWD_DATA_IN,
+    Data(8)             => local_eop,
+    WrClock             => CLK,
+    RdClock             => CLK,
+    WrEn                => ff_wr_en,
+    RdEn                => ff_rd_en,
+    Reset               => RESET,
+    RPReset             => RESET,
+    Q                   => ff_q,
+    Empty               => ff_empty,
+    Full                => ff_full
+  );
 
-    FWD_FULL_OUT <= ff_full;
+  ff_rd_en <= '1' when (TC_RD_EN_IN = '1' and PS_SELECTED_IN = '1') else '0';
 
-    if( dissect_current_state = IDLE ) then
-      FWD_READY_OUT <= '1';
-    else
-      FWD_READY_OUT <= '0';
-    end if;
+  --TC_DATA_OUT <= ff_q; -- BUG?!?
+  TC_DATA_OUT <= ff_q when rising_edge(CLK);
+
+  PS_RESPONSE_READY_OUT <= '1' when (dissect_current_state = LOAD) else '0';
+
+  --TC_FRAME_SIZE_OUT <= resp_bytes_ctr + x"1"; -- BUG?!?
+  TC_FRAME_SIZE_OUT <= resp_bytes_ctr;
+
+  TC_FRAME_TYPE_OUT  <= x"0008";
+  TC_DEST_MAC_OUT    <= FWD_DST_MAC_IN;
+  TC_DEST_IP_OUT     <= FWD_DST_IP_IN;
+  TC_DEST_UDP_OUT    <= FWD_DST_UDP_IN;
+  TC_SRC_MAC_OUT     <= MY_MAC_IN;
+  TC_SRC_IP_OUT      <= MY_IP_IN;
+  TC_SRC_UDP_OUT     <= FWD_DST_UDP_IN;
+  TC_IP_PROTOCOL_OUT <= x"11";
+  TC_IDENT_OUT       <= x"6" & sent_frames(11 downto 0);
 
-  end if;
-end process RESP_BYTES_CTR_PROC;
+  RESP_BYTES_CTR_PROC: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
+      resp_bytes_ctr <= (others => '0');
+    elsif( rising_edge(CLK) ) then
+      if   ( dissect_current_state = IDLE ) then
+        resp_bytes_ctr <= (others => '0');
+      elsif( dissect_current_state = SAVE and FWD_DATA_VALID_IN = '1' ) then
+        resp_bytes_ctr <= resp_bytes_ctr + x"1";
+      end if;
+
+      FWD_FULL_OUT <= ff_full;
 
-REC_FRAMES_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    rec_frames <= (others => '0');
-  elsif( rising_edge(CLK) ) then
-    if( dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then
-      rec_frames <= rec_frames + x"1";
+      if( dissect_current_state = IDLE ) then
+        FWD_READY_OUT <= '1';
+      else
+        FWD_READY_OUT <= '0';
+      end if;
+
+    end if;
+  end process RESP_BYTES_CTR_PROC;
+
+  REC_FRAMES_PROC: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
+      rec_frames <= (others => '0');
+    elsif( rising_edge(CLK) ) then
+      if( dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then
+        rec_frames <= rec_frames + x"1";
+      end if;
     end if;
-  end if;
-end process REC_FRAMES_PROC;
-
-SENT_FRAMES_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    sent_frames <= (others => '0');
-  elsif( rising_edge(CLK) ) then
-    if( dissect_current_state = WAIT_FOR_LOAD and PS_SELECTED_IN = '0' ) then
-      sent_frames <= sent_frames + x"1";
+  end process REC_FRAMES_PROC;
+
+  SENT_FRAMES_PROC: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
+      sent_frames <= (others => '0');
+    elsif( rising_edge(CLK) ) then
+      if( dissect_current_state = WAIT_FOR_LOAD and PS_SELECTED_IN = '0' ) then
+        sent_frames <= sent_frames + x"1";
+      end if;
     end if;
-  end if;
-end process SENT_FRAMES_PROC;
-
-RECEIVED_FRAMES_OUT <= rec_frames;
-SENT_FRAMES_OUT     <= sent_frames;
-
--- **** debug
-DEBUG_OUT(3 downto 0)   <= state;
-DEBUG_OUT(4)            <= ff_empty;
-DEBUG_OUT(5)            <= ff_full;
-DEBUG_OUT(6)            <= ff_wr_en;
-DEBUG_OUT(7)            <= ff_rd_en;
-DEBUG_OUT(15 downto 8)  <= ff_q(7 downto 0);
-DEBUG_OUT(16)           <= ff_q(8);
-DEBUG_OUT(17)           <= local_eop;
-DEBUG_OUT(31 downto 18) <= (others => '0');
--- ****
+  end process SENT_FRAMES_PROC;
+
+  RECEIVED_FRAMES_OUT <= rec_frames;
+  SENT_FRAMES_OUT     <= sent_frames;
+
+  -- **** debug
+  DEBUG_OUT(3 downto 0)   <= state;
+  DEBUG_OUT(4)            <= ff_empty;
+  DEBUG_OUT(5)            <= ff_full;
+  DEBUG_OUT(6)            <= ff_wr_en;
+  DEBUG_OUT(7)            <= ff_rd_en;
+  DEBUG_OUT(15 downto 8)  <= ff_q(7 downto 0);
+  DEBUG_OUT(16)           <= ff_q(8);
+  DEBUG_OUT(17)           <= local_eop;
+  DEBUG_OUT(31 downto 18) <= (others => '0');
+  -- ****
 
 end gbe_response_constructor_Forward_arch;
index 0b79ad62ec9ec8b9f1a5f363918bc8816715795c..a9adacc2afb50a985a76556b12b2c738269ad775 100644 (file)
-LIBRARY IEEE;
-USE IEEE.std_logic_1164.ALL;
-USE IEEE.numeric_std.ALL;
-USE IEEE.std_logic_UNSIGNED.ALL;
+library ieee;
+  use ieee.std_logic_1164.all;
+  use ieee.numeric_std.all;
 
 library work;
-use work.trb_net_std.all;
-use work.trb_net_components.all;
-use work.gbe_protocols.all;
+  use work.gbe_protocols.all;
 
 entity gbe_response_constructor_Ping is
-port(
-  CLK                    : in  std_logic;  -- system clock
-  RESET                  : in  std_logic;
--- INTERFACE  
-  MY_MAC_IN              : in  std_logic_vector(47 downto 0);
-  MY_IP_IN               : in  std_logic_vector(31 downto 0);
-  PS_DATA_IN             : in  std_logic_vector(8 downto 0);
-  PS_WR_EN_IN            : in  std_logic;
-  PS_ACTIVATE_IN         : in  std_logic;
-  PS_RESPONSE_READY_OUT  : out std_logic;
-  PS_BUSY_OUT            : out std_logic;
-  PS_SELECTED_IN         : in  std_logic;
-  PS_SRC_MAC_ADDRESS_IN  : in  std_logic_vector(47 downto 0);
-  PS_DEST_MAC_ADDRESS_IN : in  std_logic_vector(47 downto 0);
-  PS_SRC_IP_ADDRESS_IN   : in  std_logic_vector(31 downto 0);
-  PS_DEST_IP_ADDRESS_IN  : in  std_logic_vector(31 downto 0);
-  PS_SRC_UDP_PORT_IN     : in  std_logic_vector(15 downto 0);
-  PS_DEST_UDP_PORT_IN    : in  std_logic_vector(15 downto 0);
---
-  TC_RD_EN_IN            : in  std_logic;
-  TC_DATA_OUT            : out std_logic_vector(8 downto 0);
-  TC_FRAME_SIZE_OUT      : out std_logic_vector(15 downto 0);
-  TC_FRAME_TYPE_OUT      : out std_logic_vector(15 downto 0);
-  TC_IP_PROTOCOL_OUT     : out std_logic_vector(7 downto 0);  
-  TC_IDENT_OUT           : out std_logic_vector(15 downto 0);  
-  TC_DEST_MAC_OUT        : out std_logic_vector(47 downto 0);
-  TC_DEST_IP_OUT         : out std_logic_vector(31 downto 0);
-  TC_DEST_UDP_OUT        : out std_logic_vector(15 downto 0);
-  TC_SRC_MAC_OUT         : out std_logic_vector(47 downto 0);
-  TC_SRC_IP_OUT          : out std_logic_vector(31 downto 0);
-  TC_SRC_UDP_OUT         : out std_logic_vector(15 downto 0);
--- END OF INTERFACE
--- debug
-  DEBUG_OUT    : out  std_logic_vector(63 downto 0)
-);
+  port(
+    CLK                    : in  std_logic;  -- system clock
+    RESET                  : in  std_logic;
+  -- INTERFACE  
+    MY_MAC_IN              : in  std_logic_vector(47 downto 0);
+    MY_IP_IN               : in  std_logic_vector(31 downto 0);
+    PS_DATA_IN             : in  std_logic_vector(8 downto 0);
+    PS_WR_EN_IN            : in  std_logic;
+    PS_ACTIVATE_IN         : in  std_logic;
+    PS_RESPONSE_READY_OUT  : out std_logic;
+    PS_BUSY_OUT            : out std_logic;
+    PS_SELECTED_IN         : in  std_logic;
+    PS_SRC_MAC_ADDRESS_IN  : in  std_logic_vector(47 downto 0);
+    PS_DEST_MAC_ADDRESS_IN : in  std_logic_vector(47 downto 0);
+    PS_SRC_IP_ADDRESS_IN   : in  std_logic_vector(31 downto 0);
+    PS_DEST_IP_ADDRESS_IN  : in  std_logic_vector(31 downto 0);
+    PS_SRC_UDP_PORT_IN     : in  std_logic_vector(15 downto 0);
+    PS_DEST_UDP_PORT_IN    : in  std_logic_vector(15 downto 0);
+  --
+    TC_RD_EN_IN            : in  std_logic;
+    TC_DATA_OUT            : out std_logic_vector(8 downto 0);
+    TC_FRAME_SIZE_OUT      : out std_logic_vector(15 downto 0);
+    TC_FRAME_TYPE_OUT      : out std_logic_vector(15 downto 0);
+    TC_IP_PROTOCOL_OUT     : out std_logic_vector(7 downto 0);  
+    TC_IDENT_OUT           : out std_logic_vector(15 downto 0);  
+    TC_DEST_MAC_OUT        : out std_logic_vector(47 downto 0);
+    TC_DEST_IP_OUT         : out std_logic_vector(31 downto 0);
+    TC_DEST_UDP_OUT        : out std_logic_vector(15 downto 0);
+    TC_SRC_MAC_OUT         : out std_logic_vector(47 downto 0);
+    TC_SRC_IP_OUT          : out std_logic_vector(31 downto 0);
+    TC_SRC_UDP_OUT         : out std_logic_vector(15 downto 0);
+  -- END OF INTERFACE
+  -- debug
+    DEBUG_OUT    : out  std_logic_vector(63 downto 0)
+  );
 end gbe_response_constructor_Ping;
 
 architecture gbe_response_constructor_Ping_arch of gbe_response_constructor_Ping is
 
-attribute syn_encoding  : string;
+  attribute syn_encoding  : string;
 
-type dissect_states is (IDLE, READ_FRAME, WAIT_FOR_LOAD, LOAD_FRAME, CLEANUP);
-signal dissect_current_state, dissect_next_state : dissect_states;
-attribute syn_encoding of dissect_current_state: signal is "onehot";
+  type dissect_states is (IDLE, READ_FRAME, WAIT_FOR_LOAD, LOAD_FRAME, CLEANUP);
+  signal dissect_current_state, dissect_next_state : dissect_states;
+  attribute syn_encoding of dissect_current_state: signal is "onehot";
 
-type stats_states is (IDLE, LOAD_SENT, LOAD_RECEIVED, CLEANUP);
-signal stats_current_state, stats_next_state : stats_states;
-attribute syn_encoding of stats_current_state : signal is "onehot";
+  type stats_states is (IDLE, LOAD_SENT, LOAD_RECEIVED, CLEANUP);
+  signal stats_current_state, stats_next_state : stats_states;
+  attribute syn_encoding of stats_current_state : signal is "onehot";
 
-signal sent_frames        : std_logic_vector(15 downto 0);
+  signal sent_frames        : unsigned(15 downto 0);
 
-signal saved_data         : std_logic_vector(447 downto 0);
-signal saved_headers      : std_logic_vector(63 downto 0);
+  signal saved_data         : std_logic_vector(447 downto 0);
+  signal saved_headers      : std_logic_vector(63 downto 0);
 
-signal data_ctr           : integer range 1 to 1500;
-signal data_length        : integer range 1 to 1500;
-signal tc_data            : std_logic_vector(8 downto 0);
+  signal data_ctr           : integer range 1 to 1500;
+  signal data_length        : integer range 1 to 1500;
+  signal tc_data            : std_logic_vector(8 downto 0);
 
-signal checksum           : std_logic_vector(15 downto 0);
+  signal checksum           : std_logic_vector(15 downto 0);
 
-signal checksum_l         : std_logic_vector(19 downto 0);
-signal checksum_r         : std_logic_vector(19 downto 0);
-signal checksum_ll        : std_logic_vector(15 downto 0);
-signal checksum_rr        : std_logic_vector(15 downto 0);
-signal checksum_lll       : std_logic_vector(15 downto 0);
-signal checksum_rrr       : std_logic_vector(15 downto 0);
+  signal checksum_l         : unsigned(19 downto 0);
+  signal checksum_r         : unsigned(19 downto 0);
+  signal checksum_ll        : unsigned(15 downto 0);
+  signal checksum_rr        : unsigned(15 downto 0);
+  signal checksum_lll       : unsigned(15 downto 0);
+  signal checksum_rrr       : unsigned(15 downto 0);
 
 begin
 
-DISSECT_MACHINE_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    dissect_current_state <= IDLE;
-  elsif( rising_edge(CLK) ) then
-    dissect_current_state <= dissect_next_state;
-  end if;
-end process DISSECT_MACHINE_PROC;
+  PROC_DISSECT_FSM: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
+      dissect_current_state <= IDLE;
+    elsif( rising_edge(CLK) ) then
+      dissect_current_state <= dissect_next_state;
+    end if;
+  end process PROC_DISSECT_FSM;
 
-DISSECT_MACHINE: process(dissect_current_state, PS_WR_EN_IN, PS_SELECTED_IN, PS_ACTIVATE_IN, PS_DATA_IN, data_ctr, data_length)
-begin
-  case dissect_current_state is
-  
-    when IDLE =>
-      if (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
-        dissect_next_state <= READ_FRAME;
-      else
-        dissect_next_state <= IDLE;
-      end if;
+  PROC_DISSECT_TRANSITIONS: process( dissect_current_state, PS_WR_EN_IN, PS_SELECTED_IN, PS_ACTIVATE_IN, PS_DATA_IN, data_ctr, data_length )
+  begin
+    case dissect_current_state is
     
-    when READ_FRAME =>
-      if (PS_DATA_IN(8) = '1') then
-        dissect_next_state <= WAIT_FOR_LOAD;
-      else
-        dissect_next_state <= READ_FRAME;
-      end if;
+      when IDLE =>
+        if (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
+          dissect_next_state <= READ_FRAME;
+        else
+          dissect_next_state <= IDLE;
+        end if;
       
-    when WAIT_FOR_LOAD =>
-      if (PS_SELECTED_IN = '1') then
-        dissect_next_state <= LOAD_FRAME;
-      else
-        dissect_next_state <= WAIT_FOR_LOAD;
-      end if;
-    
-    when LOAD_FRAME =>
-      if (data_ctr = data_length + 1) then
-        dissect_next_state <= CLEANUP;
-      else
-        dissect_next_state <= LOAD_FRAME;
-      end if;
+      when READ_FRAME =>
+        if (PS_DATA_IN(8) = '1') then
+          dissect_next_state <= WAIT_FOR_LOAD;
+        else
+          dissect_next_state <= READ_FRAME;
+        end if;
+        
+      when WAIT_FOR_LOAD =>
+        if (PS_SELECTED_IN = '1') then
+          dissect_next_state <= LOAD_FRAME;
+        else
+          dissect_next_state <= WAIT_FOR_LOAD;
+        end if;
+      
+      when LOAD_FRAME =>
+        if (data_ctr = data_length + 1) then
+          dissect_next_state <= CLEANUP;
+        else
+          dissect_next_state <= LOAD_FRAME;
+        end if;
+      
+      when CLEANUP =>
+        dissect_next_state <= IDLE;
     
-    when CLEANUP =>
-      dissect_next_state <= IDLE;
-  
-  end case;
-end process DISSECT_MACHINE;
+    end case;
+  end process PROC_DISSECT_TRANSITIONS;
 
-DATA_CTR_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    data_ctr <= 2;
-  elsif( rising_edge(CLK) ) then
-    if   ( (dissect_current_state = IDLE) or (dissect_current_state = WAIT_FOR_LOAD) ) then
+  PROC_DATA_CTR: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
       data_ctr <= 2;
-    elsif( dissect_current_state = READ_FRAME and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then  -- in case of saving data from incoming frame
-      data_ctr <= data_ctr + 1;
-    elsif( dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1' ) then  -- in case of constructing response
-      data_ctr <= data_ctr + 1;
+    elsif( rising_edge(CLK) ) then
+      if   ( (dissect_current_state = IDLE) or (dissect_current_state = WAIT_FOR_LOAD) ) then
+        data_ctr <= 2;
+      elsif( dissect_current_state = READ_FRAME and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then  -- in case of saving data from incoming frame
+        data_ctr <= data_ctr + 1;
+      elsif( dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1' ) then  -- in case of constructing response
+        data_ctr <= data_ctr + 1;
+      end if;
     end if;
-  end if;
-end process DATA_CTR_PROC;
+  end process PROC_DATA_CTR;
 
-DATA_LENGTH_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    data_length <= 1;
-  elsif( rising_edge(CLK) ) then
-    if (dissect_current_state = READ_FRAME and PS_DATA_IN(8) = '1') then
-      data_length <= data_ctr;
+  PROC_DATA_LENGTH: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
+      data_length <= 1;
+    elsif( rising_edge(CLK) ) then
+      if (dissect_current_state = READ_FRAME and PS_DATA_IN(8) = '1') then
+        data_length <= data_ctr;
+      end if;
     end if;
-  end if;
-end process DATA_LENGTH_PROC;
+  end process PROC_DATA_LENGTH;
 
-SAVE_VALUES_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    saved_headers <= (others => '0');
-    saved_data    <= (others => '0');
-  elsif( rising_edge(CLK) ) then
-    if   ( dissect_current_state = IDLE ) then
+  PROC_SAVE_VALUES: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
       saved_headers <= (others => '0');
       saved_data    <= (others => '0');
-    elsif( dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then
-      saved_headers(7 downto 0) <= PS_DATA_IN(7 downto 0);
-    elsif( dissect_current_state = READ_FRAME ) then
-      if (data_ctr < 9) then  -- headers
-        saved_headers(data_ctr * 8 - 1 downto (data_ctr - 1) * 8) <= PS_DATA_IN(7 downto 0);
-      elsif (data_ctr > 8) then -- data
-        saved_data((data_ctr - 8) * 8 - 1 downto (data_ctr - 8 - 1) * 8) <= PS_DATA_IN(7 downto 0);
+    elsif( rising_edge(CLK) ) then
+      if   ( dissect_current_state = IDLE ) then
+        saved_headers <= (others => '0');
+        saved_data    <= (others => '0');
+      elsif( dissect_current_state = IDLE and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then
+        saved_headers(7 downto 0) <= PS_DATA_IN(7 downto 0);
+      elsif( dissect_current_state = READ_FRAME ) then
+        if (data_ctr < 9) then  -- headers
+          saved_headers(data_ctr * 8 - 1 downto (data_ctr - 1) * 8) <= PS_DATA_IN(7 downto 0);
+        elsif (data_ctr > 8) then -- data
+          saved_data((data_ctr - 8) * 8 - 1 downto (data_ctr - 8 - 1) * 8) <= PS_DATA_IN(7 downto 0);
+        end if;
+      elsif( dissect_current_state = LOAD_FRAME ) then
+        saved_headers(7 downto 0)   <= x"00";
+        saved_headers(23 downto 16) <= checksum(7 downto 0);
+        saved_headers(31 downto 24) <= checksum(15 downto 8);
       end if;
-    elsif( dissect_current_state = LOAD_FRAME ) then
-      saved_headers(7 downto 0)   <= x"00";
-      saved_headers(23 downto 16) <= checksum(7 downto 0);
-      saved_headers(31 downto 24) <= checksum(15 downto 8);
     end if;
-  end if;
-end process SAVE_VALUES_PROC;
+  end process PROC_SAVE_VALUES;
 
-CS_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    checksum_l(19 downto 0)    <= (others => '0');
-    checksum_r(19 downto 0)    <= (others => '0');
-    checksum_ll(15 downto 0)   <= (others => '0');
-    checksum_rr(15 downto 0)   <= (others => '0');
-    checksum_lll(15 downto 0)  <= (others => '0');
-    checksum_rrr(15 downto 0)  <= (others => '0');
-  elsif( rising_edge(CLK) ) then
-    if( dissect_current_state = IDLE ) then
+  PROC_CS: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
       checksum_l(19 downto 0)    <= (others => '0');
       checksum_r(19 downto 0)    <= (others => '0');
       checksum_ll(15 downto 0)   <= (others => '0');
       checksum_rr(15 downto 0)   <= (others => '0');
       checksum_lll(15 downto 0)  <= (others => '0');
       checksum_rrr(15 downto 0)  <= (others => '0');
-    elsif( dissect_current_state = READ_FRAME and data_ctr > 4 ) then
-      if (std_logic_vector(to_unsigned(data_ctr, 1)) = "0") then
-        checksum_l <= checksum_l + PS_DATA_IN(7 downto 0);
-      else
-        checksum_r <= checksum_r + PS_DATA_IN(7 downto 0);
+    elsif( rising_edge(CLK) ) then
+      if( dissect_current_state = IDLE ) then
+        checksum_l(19 downto 0)    <= (others => '0');
+        checksum_r(19 downto 0)    <= (others => '0');
+        checksum_ll(15 downto 0)   <= (others => '0');
+        checksum_rr(15 downto 0)   <= (others => '0');
+        checksum_lll(15 downto 0)  <= (others => '0');
+        checksum_rrr(15 downto 0)  <= (others => '0');
+      elsif( dissect_current_state = READ_FRAME and data_ctr > 4 ) then
+        if (std_logic_vector(to_unsigned(data_ctr, 1)) = "0") then
+          checksum_l <= checksum_l + unsigned(PS_DATA_IN(7 downto 0));
+        else
+          checksum_r <= checksum_r + unsigned(PS_DATA_IN(7 downto 0));
+        end if;
+        checksum_ll  <= checksum_ll;
+        checksum_lll <= checksum_lll;
+        checksum_rr  <= checksum_rr;
+        checksum_rrr <= checksum_rrr;
+      elsif( dissect_current_state = WAIT_FOR_LOAD ) then
+        checksum_ll <= x"0000" + checksum_l(7 downto 0) + checksum_r(19 downto 8);
+        checksum_rr <= x"0000" + checksum_r(7 downto 0) + checksum_l(19 downto 8);
+        checksum_l   <= checksum_l;
+        checksum_lll <= checksum_lll;
+        checksum_r   <= checksum_r;
+        checksum_rrr <= checksum_rrr;
+      elsif( dissect_current_state = LOAD_FRAME and data_ctr = 2 ) then
+        checksum_lll <= x"0000" + checksum_ll(7 downto 0) + checksum_rr(15 downto 8);
+        checksum_rrr <= x"0000" + checksum_rr(7 downto 0) + checksum_ll(15 downto 8);
+        checksum_l  <= checksum_l;
+        checksum_ll <= checksum_ll;
+        checksum_r  <= checksum_r;
+        checksum_rr <= checksum_rr;
       end if;
-      checksum_ll  <= checksum_ll;
-      checksum_lll <= checksum_lll;
-      checksum_rr  <= checksum_rr;
-      checksum_rrr <= checksum_rrr;
-    elsif( dissect_current_state = WAIT_FOR_LOAD ) then
-      checksum_ll <= x"0000" + checksum_l(7 downto 0) + checksum_r(19 downto 8);
-      checksum_rr <= x"0000" + checksum_r(7 downto 0) + checksum_l(19 downto 8);
-      checksum_l   <= checksum_l;
-      checksum_lll <= checksum_lll;
-      checksum_r   <= checksum_r;
-      checksum_rrr <= checksum_rrr;
-    elsif( dissect_current_state = LOAD_FRAME and data_ctr = 2 ) then
-      checksum_lll <= x"0000" + checksum_ll(7 downto 0) + checksum_rr(15 downto 8);
-      checksum_rrr <= x"0000" + checksum_rr(7 downto 0) + checksum_ll(15 downto 8);
-      checksum_l  <= checksum_l;
-      checksum_ll <= checksum_ll;
-      checksum_r  <= checksum_r;
-      checksum_rr <= checksum_rr;
     end if;
-  end if;
-end process CS_PROC;
-checksum(7 downto 0)  <= not (checksum_rrr(7 downto 0) + checksum_lll(15 downto 8));
-checksum(15 downto 8) <= not (checksum_lll(7 downto 0) + checksum_rrr(15 downto 8));
+  end process PROC_CS;
+  
+  checksum(7 downto 0)  <= not std_logic_vector(checksum_rrr(7 downto 0) + checksum_lll(15 downto 8));
+  checksum(15 downto 8) <= not std_logic_vector(checksum_lll(7 downto 0) + checksum_rrr(15 downto 8));
 
-TC_DATA_PROC : process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    tc_data(8) <= '0';
-    
-    if( dissect_current_state = LOAD_FRAME ) then
-      if (data_ctr < 10) then  -- headers
-        for i in 0 to 7 loop
-          tc_data(i) <= saved_headers((data_ctr - 2) * 8 + i);
-        end loop;
-      else  -- data
-        for i in 0 to 7 loop
-          tc_data(i) <= saved_data((data_ctr - 8 - 2) * 8 + i);
-        end loop;
+  PROC_TC_DATA: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      tc_data(8) <= '0';
       
-        -- mark the last byte
-        if (data_ctr = data_length + 1) then
-          tc_data(8) <= '1';
+      if( dissect_current_state = LOAD_FRAME ) then
+        if (data_ctr < 10) then  -- headers
+          for i in 0 to 7 loop
+            tc_data(i) <= saved_headers((data_ctr - 2) * 8 + i);
+          end loop;
+        else  -- data
+          for i in 0 to 7 loop
+            tc_data(i) <= saved_data((data_ctr - 8 - 2) * 8 + i);
+          end loop;
+        
+          -- mark the last byte
+          if (data_ctr = data_length + 1) then
+            tc_data(8) <= '1';
+          end if;
         end if;
+      else
+        tc_data(7 downto 0) <= (others => '0');  
       end if;
-    else
-      tc_data(7 downto 0) <= (others => '0');  
+      
+      TC_DATA_OUT <= tc_data;
+      
     end if;
-    
-    TC_DATA_OUT <= tc_data;
-    
-  end if;
-end process TC_DATA_PROC;
+  end process PROC_TC_DATA;
 
-PS_RESPONSE_SYNC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if( dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or dissect_current_state = CLEANUP ) then
-      PS_RESPONSE_READY_OUT <= '1';
-    else
-      PS_RESPONSE_READY_OUT <= '0';
-    end if;
-    
-    if( dissect_current_state = IDLE ) then
-      PS_BUSY_OUT <= '0';
-    else
-      PS_BUSY_OUT <= '1';
-    end if;
-  end if;  
-end process PS_RESPONSE_SYNC;
+  PROC_PS_RESPONSE_SYNC: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if( dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or dissect_current_state = CLEANUP ) then
+        PS_RESPONSE_READY_OUT <= '1';
+      else
+        PS_RESPONSE_READY_OUT <= '0';
+      end if;
+      
+      if( dissect_current_state = IDLE ) then
+        PS_BUSY_OUT <= '0';
+      else
+        PS_BUSY_OUT <= '1';
+      end if;
+    end if;  
+  end process PROC_PS_RESPONSE_SYNC;
 
-TC_FRAME_SIZE_OUT   <= std_logic_vector(to_unsigned(data_length, 16));
-TC_FRAME_TYPE_OUT   <= x"0008";
-TC_DEST_UDP_OUT     <= x"0000";  -- not used
-TC_SRC_MAC_OUT      <= MY_MAC_IN;
-TC_SRC_IP_OUT       <= MY_IP_IN;
-TC_SRC_UDP_OUT      <= x"0000";  -- not used
-TC_IP_PROTOCOL_OUT  <= X"01"; -- ICMP
-TC_IDENT_OUT        <= x"2" & sent_frames(11 downto 0);
+  TC_FRAME_SIZE_OUT   <= std_logic_vector(to_unsigned(data_length, 16));
+  TC_FRAME_TYPE_OUT   <= x"0008";
+  TC_DEST_UDP_OUT     <= x"0000";  -- not used
+  TC_SRC_MAC_OUT      <= MY_MAC_IN;
+  TC_SRC_IP_OUT       <= MY_IP_IN;
+  TC_SRC_UDP_OUT      <= x"0000";  -- not used
+  TC_IP_PROTOCOL_OUT  <= X"01"; -- ICMP
+  TC_IDENT_OUT        <= x"2" & std_logic_vector(sent_frames(11 downto 0));
 
-ADDR_PROC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if( dissect_current_state = READ_FRAME ) then
-      TC_DEST_MAC_OUT <= PS_SRC_MAC_ADDRESS_IN;
-      TC_DEST_IP_OUT  <= PS_SRC_IP_ADDRESS_IN;
+  PROC_ADDR: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if( dissect_current_state = READ_FRAME ) then
+        TC_DEST_MAC_OUT <= PS_SRC_MAC_ADDRESS_IN;
+        TC_DEST_IP_OUT  <= PS_SRC_IP_ADDRESS_IN;
+      end if;
     end if;
-  end if;
-end process ADDR_PROC;
+  end process PROC_ADDR;
 
-SENT_FRAMES_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    sent_frames <= (others => '0');
-  elsif( rising_edge(CLK) ) then
-    if( dissect_current_state = CLEANUP ) then
-      sent_frames <= sent_frames + x"1";
+  PROC_SENT_FRAMES: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
+      sent_frames <= (others => '0');
+    elsif( rising_edge(CLK) ) then
+      if( dissect_current_state = CLEANUP ) then
+        sent_frames <= sent_frames + 1;
+      end if;
     end if;
-  end if;
-end process SENT_FRAMES_PROC;
+  end process PROC_SENT_FRAMES;
 
 end gbe_response_constructor_Ping_arch;
 
index 2a47e3f9e9c53c9b7836961db1b42204f475656b..58e8f2e7df004ba00137e67912060c269028036f 100644 (file)
@@ -1,13 +1,10 @@
-LIBRARY IEEE;
-USE IEEE.std_logic_1164.ALL;
-USE IEEE.numeric_std.ALL;
-USE IEEE.std_logic_UNSIGNED.ALL;
+library ieee;
+  use ieee.std_logic_1164.all;
+  use ieee.numeric_std.all;
 
 library work;
-use work.trb_net_std.all;
-use work.trb_net_components.all;
-use work.gbe_protocols.all;
-
+  use work.trb_net_std.all;
+  use work.gbe_protocols.all;
 
 entity gbe_response_constructor_SCTRL is
   generic( 
@@ -64,87 +61,90 @@ entity gbe_response_constructor_SCTRL is
     MONITOR_SELECT_REC_OUT           : out     std_logic_vector(31 downto 0);
     MONITOR_SELECT_REC_BYTES_OUT  : out        std_logic_vector(31 downto 0);
     MONITOR_SELECT_SENT_BYTES_OUT : out        std_logic_vector(31 downto 0);
-    MONITOR_SELECT_SENT_OUT          : out     std_logic_vector(31 downto 0);
-    DATA_HIST_OUT                 : out hist_array
+    MONITOR_SELECT_SENT_OUT          : out     std_logic_vector(31 downto 0)
   );
 end entity gbe_response_constructor_SCTRL;
 
 architecture gbe_response_constructor_SCTRL_arch of gbe_response_constructor_SCTRL is
 
-attribute syn_encoding : string;
-
-type dissect_states is (IDLE, READ_FRAME, WAIT_FOR_HUB, LOAD_TO_HUB, WAIT_FOR_RESPONSE, SAVE_RESPONSE, LOAD_FRAME, WAIT_FOR_LOAD, CLEANUP);
-signal dissect_current_state, dissect_next_state : dissect_states;
-attribute syn_encoding of dissect_current_state: signal is "onehot";
+  attribute syn_encoding       : string;
 
-type stats_states is (IDLE, LOAD_RECEIVED, LOAD_REPLY, CLEANUP);
-signal stats_current_state, stats_next_state : stats_states;
-attribute syn_encoding of stats_current_state : signal is "onehot";
+  type dissect_states is (IDLE, READ_FRAME, WAIT_FOR_HUB, LOAD_TO_HUB, WAIT_FOR_RESPONSE, SAVE_RESPONSE, LOAD_FRAME, WAIT_FOR_LOAD, CLEANUP);
+  signal dissect_current_state, dissect_next_state : dissect_states;
+  attribute syn_encoding of dissect_current_state: signal is "onehot";
 
-signal saved_target_ip          : std_logic_vector(31 downto 0);
-signal data_ctr                 : integer range 0 to 30;
+  type stats_states is (IDLE, LOAD_RECEIVED, LOAD_REPLY, CLEANUP);
+  signal stats_current_state, stats_next_state : stats_states;
+  attribute syn_encoding of stats_current_state : signal is "onehot";
 
-signal rec_frames               : std_logic_vector(15 downto 0);
+  signal saved_target_ip          : std_logic_vector(31 downto 0);
+  signal data_ctr                 : integer range 0 to 30;
 
-signal rx_fifo_q                : std_logic_vector(17 downto 0);
-signal rx_fifo_qq               : std_logic_vector(17 downto 0);
-signal rx_fifo_wr, rx_fifo_rd   : std_logic;
-signal tx_eod, rx_eod           : std_logic;
+  signal rec_frames               : std_logic_vector(15 downto 0);
 
-signal tx_fifo_q                : std_logic_vector(8 downto 0);
-signal tx_fifo_wr, tx_fifo_rd   : std_logic;
-signal tx_fifo_reset            : std_logic;
-signal gsc_reply_read           : std_logic;
-signal gsc_init_dataready       : std_logic;
-signal gsc_init_dataready_q     : std_logic;
+  signal rx_fifo_q                : std_logic_vector(17 downto 0);
+  signal rx_fifo_qq               : std_logic_vector(17 downto 0);
+  signal rx_fifo_wr, rx_fifo_rd   : std_logic;
+  signal tx_eod, rx_eod           : std_logic;
 
-signal tx_data_ctr              : std_logic_vector(15 downto 0);
-signal tx_loaded_ctr            : std_logic_vector(15 downto 0);
-signal tx_frame_loaded          : std_logic_vector(15 downto 0);
+  signal tx_fifo_q                : std_logic_vector(8 downto 0);
+  signal tx_fifo_wr, tx_fifo_rd   : std_logic;
+  signal tx_fifo_reset            : std_logic;
+  signal gsc_reply_read           : std_logic;
+  signal gsc_init_dataready       : std_logic;
+  signal gsc_init_dataready_q     : std_logic;
 
-signal packet_num               : std_logic_vector(2 downto 0);
-       
-signal init_ctr, reply_ctr      : std_logic_vector(15 downto 0);
-signal rx_empty, tx_empty       : std_logic;
+  signal tx_data_ctr              : unsigned(15 downto 0);
+  signal tx_loaded_ctr            : unsigned(15 downto 0);
+  signal tx_frame_loaded          : std_logic_vector(15 downto 0);
 
-signal rx_full, tx_full         : std_logic;
+  signal packet_num               : unsigned(2 downto 0);
+    
+--  signal init_ctr                 : std_logic_vector(15 downto 0);
+  signal reply_ctr                : unsigned(15 downto 0);
+  signal rx_empty                 : std_logic;
+  signal tx_empty                 : std_logic;
 
-signal size_left                : std_logic_vector(15 downto 0);
+  signal rx_full                  : std_logic;
+  signal tx_full                  : std_logic;
 
-signal reset_detected           : std_logic := '0';
-signal make_reset               : std_logic := '0';
+  signal size_left                : std_logic_vector(15 downto 0);
 
-signal fifo_rd_q                : std_logic;
+  signal reset_detected           : std_logic := '0';
+  signal make_reset               : std_logic := '0';
 
-signal too_much_data            : std_logic;
+  signal fifo_rd_q                : std_logic;
 
-signal rx_fifo_data             : std_logic_vector(8 downto 0);
-signal tx_fifo_data             : std_logic_vector(17 downto 0);
+  signal too_much_data            : std_logic;
 
-signal tc_wr                    : std_logic;
-signal state                    : std_logic_vector(3 downto 0);
-signal saved_hdr_1              : std_logic_vector(7 downto 0) := x"ab";
-signal saved_hdr_2              : std_logic_vector(7 downto 0) := x"cd";
-signal saved_hdr_ctr            : std_logic_vector(3 downto 0);
+  signal rx_fifo_data             : std_logic_vector(8 downto 0);
+  signal tx_fifo_data             : std_logic_vector(17 downto 0);
 
-signal mon_rec_frames, mon_rec_bytes, mon_sent_frames, mon_sent_bytes : std_logic_vector(31 downto 0);
+  signal tc_wr                    : std_logic;
+  signal state                    : std_logic_vector(3 downto 0);
+  signal saved_hdr_1              : std_logic_vector(7 downto 0) := x"ab";
+  signal saved_hdr_2              : std_logic_vector(7 downto 0) := x"cd";
+  signal saved_hdr_ctr            : std_logic_vector(3 downto 0);
 
-attribute syn_preserve : boolean;
-attribute syn_keep : boolean;
-attribute syn_keep of rx_fifo_wr, rx_fifo_rd, gsc_init_dataready, tx_fifo_wr, tx_fifo_rd, gsc_reply_read, state : signal is true;
-attribute syn_preserve of rx_fifo_wr, rx_fifo_rd, gsc_init_dataready, tx_fifo_wr, tx_fifo_rd, gsc_reply_read, state : signal is true;
+  signal mon_rec_frames           : unsigned(31 downto 0);
+  signal mon_rec_bytes            : unsigned(31 downto 0);
+  signal mon_sent_frames          : unsigned(31 downto 0);
+  signal mon_sent_bytes           : unsigned(31 downto 0);
 
-signal hist_inst : hist_array;
-signal reset_all_hist : std_logic_vector(31 downto 0);
+  attribute syn_preserve : boolean;
+  attribute syn_keep : boolean;
+  attribute syn_keep of rx_fifo_wr, rx_fifo_rd, gsc_init_dataready, tx_fifo_wr, tx_fifo_rd, gsc_reply_read, state : signal is true;
+  attribute syn_preserve of rx_fifo_wr, rx_fifo_rd, gsc_init_dataready, tx_fifo_wr, tx_fifo_rd, gsc_reply_read, state : signal is true;
 
-signal rx_cnt, tx_cnt : std_logic_vector(15 downto 0);
+  signal rx_cnt         : std_logic_vector(15 downto 0);
+  signal tx_cnt         : std_logic_vector(15 downto 0);
 
 begin
 
-MAKE_RESET_OUT <= make_reset;
+  MAKE_RESET_OUT <= make_reset;
 
-receive_fifo: entity work.fifo_2kx9x18_wcnt
-  PORT map(
+  THE_RECEIVE_FIFO: entity work.fifo_2kx9x18_wcnt
+  port map(
     Reset    => RESET,
     RPReset  => RESET,
     WrClock  => CLK,
@@ -158,478 +158,440 @@ receive_fifo: entity work.fifo_2kx9x18_wcnt
     WCNT     => rx_cnt(11 downto 0)
   );
 
---TODO: change to synchronous
-rx_fifo_rd <= '1' when (gsc_init_dataready = '1' and dissect_current_state = LOAD_TO_HUB) or 
-                       (gsc_init_dataready = '1' and dissect_current_state = WAIT_FOR_HUB and GSC_INIT_READ_IN = '1') or
-                       (dissect_current_state = READ_FRAME and PS_DATA_IN(8) = '1')
-              else '0';  -- preload first word
-              
-RX_FIFO_WR_SYNC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-
-    if( PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' and (saved_hdr_ctr = "0100" or saved_hdr_ctr = "1000") ) then
-      rx_fifo_wr <= '1';
-    else
-      rx_fifo_wr <= '0';
-    end if;
-  
-    rx_fifo_data <= PS_DATA_IN;
-  end if;
-end process RX_FIFO_WR_SYNC;
+  --TODO: change to synchronous
+  rx_fifo_rd <= '1' when (gsc_init_dataready = '1' and dissect_current_state = LOAD_TO_HUB) or 
+                        (gsc_init_dataready = '1' and dissect_current_state = WAIT_FOR_HUB and GSC_INIT_READ_IN = '1') or
+                        (dissect_current_state = READ_FRAME and PS_DATA_IN(8) = '1')
+                else '0';  -- preload first word
+                
+  PROC_RX_FIFO_WR_SYNC: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
 
-SAVED_HDR_CTR_PROC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if   ( dissect_current_state = IDLE and PS_WR_EN_IN = '0' and PS_ACTIVATE_IN = '0' ) then
-      saved_hdr_ctr <= "0001";
-    elsif( PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' and saved_hdr_ctr /= "1000" ) then
-      saved_hdr_ctr(3 downto 0) <= saved_hdr_ctr(2 downto 0) & '0';
+      if( PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' and (saved_hdr_ctr = "0100" or saved_hdr_ctr = "1000") ) then
+        rx_fifo_wr <= '1';
+      else
+        rx_fifo_wr <= '0';
+      end if;
+    
+      rx_fifo_data <= PS_DATA_IN;
     end if;
-  end if;
-end process SAVED_HDR_CTR_PROC;
+  end process PROC_RX_FIFO_WR_SYNC;
 
-SAVED_HDR_PROC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if( PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then
-      if( saved_hdr_ctr = "0001" ) then
-        saved_hdr_1 <= PS_DATA_IN(7 downto 0);
-        saved_hdr_2 <= saved_hdr_2;
-      elsif( saved_hdr_ctr = "0010" ) then
-        saved_hdr_2 <= PS_DATA_IN(7 downto 0);
-        saved_hdr_1 <= saved_hdr_1;
+  PROC_SAVED_HDR_CTR: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if   ( dissect_current_state = IDLE and PS_WR_EN_IN = '0' and PS_ACTIVATE_IN = '0' ) then
+        saved_hdr_ctr <= "0001";
+      elsif( PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' and saved_hdr_ctr /= "1000" ) then
+        saved_hdr_ctr(3 downto 0) <= saved_hdr_ctr(2 downto 0) & '0';
       end if;
     end if;
-  end if;
-end process SAVED_HDR_PROC;
-
-----TODO: add a register
-GSC_INIT_DATA_OUT(7 downto 0)  <= rx_fifo_q(16 downto 9);
-GSC_INIT_DATA_OUT(15 downto 8) <= rx_fifo_q(7 downto 0);
-
------- TODO: change it to synchronous
-GSC_INIT_PACKET_NUM_OUT <= packet_num;
-GSC_INIT_DATAREADY_OUT  <= gsc_init_dataready;
-gsc_init_dataready <= '1' when (GSC_INIT_READ_IN = '1' and dissect_current_state = LOAD_TO_HUB) or  --TODO Ob das so richtig ist, ohne auf fifo_rd zu schauen?
-                               (dissect_current_state = WAIT_FOR_HUB) 
-                      else '0';
+  end process PROC_SAVED_HDR_CTR;
 
-PACKET_NUM_PROC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if( dissect_current_state = IDLE ) then
-      packet_num <= "100";
-    elsif( GSC_INIT_READ_IN = '1' and rx_fifo_rd = '1' and packet_num = "100" and dissect_current_state /= READ_FRAME ) then  --BUG zählt schon hoch beim fifo_rd weil read schon 1 ist. read geht aber nur auf 1 wenn dataready auf 1 ist
-      packet_num <= "000";
-    elsif( rx_fifo_rd = '1' and packet_num /= "100" ) then
-      packet_num <= packet_num + "1";
+  PROC_SAVED_HDR: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if( PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' ) then
+        if   ( saved_hdr_ctr = "0001" ) then
+          saved_hdr_1 <= PS_DATA_IN(7 downto 0);
+          saved_hdr_2 <= saved_hdr_2;
+        elsif( saved_hdr_ctr = "0010" ) then
+          saved_hdr_2 <= PS_DATA_IN(7 downto 0);
+          saved_hdr_1 <= saved_hdr_1;
+        end if;
+      end if;
     end if;
-  end if;
-end process PACKET_NUM_PROC;
+  end process PROC_SAVED_HDR;
 
-tf_4k_gen: if SLOWCTRL_BUFFER_SIZE = 1 generate
-  transmit_fifo: entity work.fifo_4kx18x9_wcnt
-  port map(
-    Reset    => tx_fifo_reset,
-    RPReset  => tx_fifo_reset,
-    WrClock  => CLK,
-    RdClock  => CLK,
-    Data     => tx_fifo_data,
-    WrEn     => tx_fifo_wr,
-    RdEn     => tx_fifo_rd,
-    Q        => tx_fifo_q,
-    Full     => tx_full,
-    Empty    => tx_empty,
-    WCNT     => tx_cnt(11 downto 0)
-  );
-end generate tf_4k_gen;
+  ----TODO: add a register
+  GSC_INIT_DATA_OUT(7 downto 0)  <= rx_fifo_q(16 downto 9);
+  GSC_INIT_DATA_OUT(15 downto 8) <= rx_fifo_q(7 downto 0);
 
-tf_65k_gen: if SLOWCTRL_BUFFER_SIZE = 2 generate
-  transmit_fifo: entity work.fifo_64kx18x9_wcnt
-  port map(
-    Reset    => tx_fifo_reset,
-    RPReset  => tx_fifo_reset,
-    WrClock  => CLK,
-    RdClock  => CLK,
-    Data     => tx_fifo_data,
-    WrEn     => tx_fifo_wr,
-    RdEn     => tx_fifo_rd,
-    Q        => tx_fifo_q,
-    Full     => tx_full,
-    Empty    => tx_empty,
-    WCNT     => tx_cnt
-  );
-end generate tf_65k_gen;
+  ------ TODO: change it to synchronous
+  GSC_INIT_PACKET_NUM_OUT <= packet_num;
+  GSC_INIT_DATAREADY_OUT  <= gsc_init_dataready;
+  gsc_init_dataready <= '1' when (GSC_INIT_READ_IN = '1' and dissect_current_state = LOAD_TO_HUB) or  --TODO Ob das so richtig ist, ohne auf fifo_rd zu schauen?
+                                (dissect_current_state = WAIT_FOR_HUB) 
+                        else '0';
 
-TX_FIFO_WR_SYNC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if( GSC_REPLY_DATAREADY_IN = '1' and gsc_reply_read = '1' ) then
-      tx_fifo_wr <= '1';
-    elsif( saved_hdr_ctr = "0010" ) then
-      tx_fifo_wr <= '1';
-    else
-      tx_fifo_wr <= '0';
+  PROC_PACKET_NUM: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if( dissect_current_state = IDLE ) then
+        packet_num <= "100";
+      elsif( GSC_INIT_READ_IN = '1' and rx_fifo_rd = '1' and packet_num = "100" and dissect_current_state /= READ_FRAME ) then  --BUG zählt schon hoch beim fifo_rd weil read schon 1 ist. read geht aber nur auf 1 wenn dataready auf 1 ist
+        packet_num <= "000";
+      elsif( rx_fifo_rd = '1' and packet_num /= "100" ) then
+        packet_num <= packet_num + "1";
+      end if;
     end if;
-  
-    if( saved_hdr_ctr = "010" ) then
-      tx_fifo_data <= '0' & PS_DATA_IN(7 downto 0) & '0' & x"02";
-    else
-      tx_fifo_data(7 downto 0)  <= GSC_REPLY_DATA_IN(15 downto 8);
-      tx_fifo_data(8)           <= '0';
-      tx_fifo_data(16 downto 9) <= GSC_REPLY_DATA_IN(7 downto 0);
-      tx_fifo_data(17)          <= '0';
+  end process PROC_PACKET_NUM;
+
+  TF_4K_GEN: if( SLOWCTRL_BUFFER_SIZE = 1 ) generate
+    THE_TRANSMIT_FIFO: entity work.fifo_4kx18x9_wcnt
+    port map(
+      Reset    => tx_fifo_reset,
+      RPReset  => tx_fifo_reset,
+      WrClock  => CLK,
+      RdClock  => CLK,
+      Data     => tx_fifo_data,
+      WrEn     => tx_fifo_wr,
+      RdEn     => tx_fifo_rd,
+      Q        => tx_fifo_q,
+      Full     => tx_full,
+      Empty    => tx_empty,
+      WCNT     => tx_cnt(11 downto 0)
+    );
+  end generate TF_4K_GEN;
+
+  TF_65K_GEN: if(  SLOWCTRL_BUFFER_SIZE = 2 ) generate
+    THE_TRANSMIT_FIFO: entity work.fifo_64kx18x9_wcnt
+    port map(
+      Reset    => tx_fifo_reset,
+      RPReset  => tx_fifo_reset,
+      WrClock  => CLK,
+      RdClock  => CLK,
+      Data     => tx_fifo_data,
+      WrEn     => tx_fifo_wr,
+      RdEn     => tx_fifo_rd,
+      Q        => tx_fifo_q,
+      Full     => tx_full,
+      Empty    => tx_empty,
+      WCNT     => tx_cnt
+    );
+  end generate TF_65K_GEN;
+
+  PROC_TX_FIFO_WR_SYNC: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if   ( GSC_REPLY_DATAREADY_IN = '1' and gsc_reply_read = '1' ) then
+        tx_fifo_wr <= '1';
+      elsif( saved_hdr_ctr = "0010" ) then
+        tx_fifo_wr <= '1';
+      else
+        tx_fifo_wr <= '0';
+      end if;
+    
+      if( saved_hdr_ctr = "010" ) then
+        tx_fifo_data <= '0' & PS_DATA_IN(7 downto 0) & '0' & x"02";
+      else
+        tx_fifo_data(7 downto 0)  <= GSC_REPLY_DATA_IN(15 downto 8);
+        tx_fifo_data(8)           <= '0';
+        tx_fifo_data(16 downto 9) <= GSC_REPLY_DATA_IN(7 downto 0);
+        tx_fifo_data(17)          <= '0';
+      end if;
     end if;
-  end if;
-end process TX_FIFO_WR_SYNC;
+  end process PROC_TX_FIFO_WR_SYNC;
 
-tx_fifo_rd <= '1' when TC_RD_EN_IN = '1' and PS_SELECTED_IN = '1' else '0';
+  tx_fifo_rd <= '1' when TC_RD_EN_IN = '1' and PS_SELECTED_IN = '1' else '0';
 
-TX_FIFO_SYNC_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    tx_fifo_reset <= '1';
-  elsif( rising_edge(CLK) ) then
-    if( too_much_data = '1' and dissect_current_state = CLEANUP ) then
+  TX_FIFO_SYNC_PROC: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
       tx_fifo_reset <= '1';
-    else
-      tx_fifo_reset <= '0';
+    elsif( rising_edge(CLK) ) then
+      if( too_much_data = '1' and dissect_current_state = CLEANUP ) then
+        tx_fifo_reset <= '1';
+      else
+        tx_fifo_reset <= '0';
+      end if;
     end if;
-  end if;
-end process TX_FIFO_SYNC_PROC;
+  end process TX_FIFO_SYNC_PROC;
 
-TC_DATA_PROC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
+  TC_DATA_PROC: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
 
-    TC_DATA_OUT(7 downto 0) <= tx_fifo_q(7 downto 0);
-  
-    if( tx_loaded_ctr = tx_data_ctr ) then
-      TC_DATA_OUT(8) <= '1';
-    else
-      TC_DATA_OUT(8) <= '0';
+      TC_DATA_OUT(7 downto 0) <= tx_fifo_q(7 downto 0);
+    
+      if( tx_loaded_ctr = tx_data_ctr ) then
+        TC_DATA_OUT(8) <= '1';
+      else
+        TC_DATA_OUT(8) <= '0';
+      end if;
     end if;
-  end if;
-end process TC_DATA_PROC;
+  end process TC_DATA_PROC;
 
-GSC_REPLY_READ_PROC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if( dissect_current_state = WAIT_FOR_RESPONSE or dissect_current_state = SAVE_RESPONSE ) then
-      gsc_reply_read <= '1';
-    else
-      gsc_reply_read <= '0';
+  GSC_REPLY_READ_PROC: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if( dissect_current_state = WAIT_FOR_RESPONSE or dissect_current_state = SAVE_RESPONSE ) then
+        gsc_reply_read <= '1';
+      else
+        gsc_reply_read <= '0';
+      end if;
     end if;
-  end if;
-end process GSC_REPLY_READ_PROC;
-GSC_REPLY_READ_OUT      <= gsc_reply_read;
+  end process GSC_REPLY_READ_PROC;
+  GSC_REPLY_READ_OUT      <= gsc_reply_read;
 
--- counter of data received from TRBNet hub
-TX_DATA_CTR_PROC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if (dissect_current_state = IDLE) then
-      tx_data_ctr <= (others => '0');
-    elsif( tx_fifo_wr = '1' ) then
-      tx_data_ctr <= tx_data_ctr + x"2";
+  -- counter of data received from TRBNet hub
+  TX_DATA_CTR_PROC: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if (dissect_current_state = IDLE) then
+        tx_data_ctr <= (others => '0');
+      elsif( tx_fifo_wr = '1' ) then
+        tx_data_ctr <= tx_data_ctr + 2;
+      end if;
     end if;
-  end if;
-end process TX_DATA_CTR_PROC;
+  end process TX_DATA_CTR_PROC;
 
-TOO_MUCH_DATA_PROC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if   ( dissect_current_state = IDLE ) then
-      too_much_data <= '0';
-    elsif( (dissect_current_state = SAVE_RESPONSE) and (tx_data_ctr = CFG_MAX_REPLY_SIZE_IN(15 downto 0)) ) then
-      too_much_data <= '1';
+  TOO_MUCH_DATA_PROC: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if   ( dissect_current_state = IDLE ) then
+        too_much_data <= '0';
+      elsif( (dissect_current_state = SAVE_RESPONSE) and (tx_data_ctr = unsigned(CFG_MAX_REPLY_SIZE_IN(15 downto 0))) ) then
+        too_much_data <= '1';
+      end if;
     end if;
-  end if;
-end process TOO_MUCH_DATA_PROC;
+  end process TOO_MUCH_DATA_PROC;
 
--- total counter of data transported to frame constructor
-TX_LOADED_CTR_PROC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if( dissect_current_state = IDLE ) then
-      tx_loaded_ctr <= x"0000";
-    elsif( dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1' ) then
-      tx_loaded_ctr <= tx_loaded_ctr + x"1";
+  -- total counter of data transported to frame constructor
+  TX_LOADED_CTR_PROC: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if( dissect_current_state = IDLE ) then
+        tx_loaded_ctr <= x"0000";
+      elsif( dissect_current_state = LOAD_FRAME and PS_SELECTED_IN = '1' and TC_RD_EN_IN = '1' ) then
+        tx_loaded_ctr <= tx_loaded_ctr + x"1";
+      end if;
     end if;
-  end if;
-end process TX_LOADED_CTR_PROC;
+  end process TX_LOADED_CTR_PROC;
 
-PS_RESPONSE_SYNC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if( too_much_data = '0' ) then
-      if( dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or dissect_current_state = CLEANUP ) then
-        PS_RESPONSE_READY_OUT <= '1';
+  PS_RESPONSE_SYNC: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if( too_much_data = '0' ) then
+        if( dissect_current_state = WAIT_FOR_LOAD or dissect_current_state = LOAD_FRAME or dissect_current_state = CLEANUP ) then
+          PS_RESPONSE_READY_OUT <= '1';
+        else
+          PS_RESPONSE_READY_OUT <= '0';
+        end if;
+      end if;
+    
+      if( dissect_current_state = IDLE or dissect_current_state = WAIT_FOR_RESPONSE ) then
+        PS_BUSY_OUT <= '0';
       else
-        PS_RESPONSE_READY_OUT <= '0';
+        PS_BUSY_OUT <= '1';
       end if;
+    end if;    
+  end process PS_RESPONSE_SYNC;
+
+  TC_FRAME_TYPE_OUT            <= x"0008";
+  TC_DEST_MAC_OUT              <= PS_SRC_MAC_ADDRESS_IN;
+  TC_DEST_IP_OUT               <= PS_SRC_IP_ADDRESS_IN;
+  TC_DEST_UDP_OUT(7 downto 0)  <= PS_SRC_UDP_PORT_IN(15 downto 8);
+  TC_DEST_UDP_OUT(15 downto 8) <= PS_SRC_UDP_PORT_IN(7 downto 0);
+  TC_SRC_MAC_OUT               <= MY_MAC_IN;
+  TC_SRC_IP_OUT                <= MY_IP_IN;
+  TC_SRC_UDP_OUT               <= x"9065"; --x"a861";
+  TC_IP_PROTOCOL_OUT           <= x"11";
+  TC_IDENT_OUT                 <= x"3" & std_logic_vector(reply_ctr(11 downto 0));
+
+  TC_FRAME_SIZE_OUT   <= tx_data_ctr;
+
+  DISSECT_MACHINE_PROC: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
+      dissect_current_state <= IDLE;
+    elsif( rising_edge(CLK) ) then
+      dissect_current_state <= dissect_next_state;
     end if;
-  
-    if( dissect_current_state = IDLE or dissect_current_state = WAIT_FOR_RESPONSE ) then
-      PS_BUSY_OUT <= '0';
-    else
-      PS_BUSY_OUT <= '1';
-    end if;
-  end if;      
-end process PS_RESPONSE_SYNC;
-
-TC_FRAME_TYPE_OUT            <= x"0008";
-TC_DEST_MAC_OUT              <= PS_SRC_MAC_ADDRESS_IN;
-TC_DEST_IP_OUT               <= PS_SRC_IP_ADDRESS_IN;
-TC_DEST_UDP_OUT(7 downto 0)  <= PS_SRC_UDP_PORT_IN(15 downto 8);
-TC_DEST_UDP_OUT(15 downto 8) <= PS_SRC_UDP_PORT_IN(7 downto 0);
-TC_SRC_MAC_OUT               <= MY_MAC_IN;
-TC_SRC_IP_OUT                <= MY_IP_IN;
-TC_SRC_UDP_OUT               <= x"9065"; --x"a861";
-TC_IP_PROTOCOL_OUT           <= x"11";
-TC_IDENT_OUT                 <= x"3" & reply_ctr(11 downto 0);
-
-TC_FRAME_SIZE_OUT   <= tx_data_ctr;
-
-DISSECT_MACHINE_PROC: process( CLK, RESET )
-begin
-  if   ( RESET = '1' ) then
-    dissect_current_state <= IDLE;
-  elsif( rising_edge(CLK) ) then
-    dissect_current_state <= dissect_next_state;
-  end if;
-end process DISSECT_MACHINE_PROC;
-
-DISSECT_MACHINE: process(dissect_current_state, reset_detected, too_much_data, PS_WR_EN_IN, PS_ACTIVATE_IN, 
-                         PS_DATA_IN, PS_SELECTED_IN, GSC_INIT_READ_IN, GSC_REPLY_DATAREADY_IN, tx_loaded_ctr, 
-                         tx_data_ctr, rx_fifo_q, GSC_BUSY_IN)
-begin
-  state <= x"0";
+  end process DISSECT_MACHINE_PROC;
 
-  case dissect_current_state is
+  DISSECT_MACHINE: process(dissect_current_state, reset_detected, too_much_data, PS_WR_EN_IN, PS_ACTIVATE_IN, 
+                          PS_DATA_IN, PS_SELECTED_IN, GSC_INIT_READ_IN, GSC_REPLY_DATAREADY_IN, tx_loaded_ctr, 
+                          tx_data_ctr, rx_fifo_q, GSC_BUSY_IN)
+  begin
+    state <= x"0";
 
-    when IDLE =>
-      state <= x"1";
-      if (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
-        dissect_next_state <= READ_FRAME;
-      else
-        dissect_next_state <= IDLE;
-      end if;
-  
-    when READ_FRAME =>
-      state <= x"2";
-      if (PS_DATA_IN(8) = '1' and (GSC_INIT_READ_IN = '0')) then
-        dissect_next_state <= WAIT_FOR_HUB;
-      elsif (PS_DATA_IN(8) = '1' and (GSC_INIT_READ_IN = '1')) then
-        dissect_next_state <= LOAD_TO_HUB;
-      else
-        dissect_next_state <= READ_FRAME;
-      end if;
+    case dissect_current_state is
+
+      when IDLE =>
+        state <= x"1";
+        if (PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1') then
+          dissect_next_state <= READ_FRAME;
+        else
+          dissect_next_state <= IDLE;
+        end if;
     
-    when WAIT_FOR_HUB =>
-      state <= x"3";
-      if (GSC_INIT_READ_IN = '1') then
-        dissect_next_state <= LOAD_TO_HUB;
-      else
-        dissect_next_state <= WAIT_FOR_HUB;
-      end if;                                          
-  
-    when LOAD_TO_HUB =>
-      state <= x"4";
-      if ((rx_fifo_q(17) = '1') and (GSC_INIT_READ_IN = '1')) then
-        if (reset_detected = '1') then
-          dissect_next_state <= CLEANUP;
+      when READ_FRAME =>
+        state <= x"2";
+        if (PS_DATA_IN(8) = '1' and (GSC_INIT_READ_IN = '0')) then
+          dissect_next_state <= WAIT_FOR_HUB;
+        elsif (PS_DATA_IN(8) = '1' and (GSC_INIT_READ_IN = '1')) then
+          dissect_next_state <= LOAD_TO_HUB;
         else
-          dissect_next_state <= WAIT_FOR_RESPONSE;
+          dissect_next_state <= READ_FRAME;
         end if;
-      else
-        dissect_next_state <= LOAD_TO_HUB;
-      end if;  
-     
-    when WAIT_FOR_RESPONSE =>
-      state <= x"5";
-      if (GSC_REPLY_DATAREADY_IN = '1') then
-        dissect_next_state <= SAVE_RESPONSE;
-      else
-        dissect_next_state <= WAIT_FOR_RESPONSE;
-      end if;
+      
+      when WAIT_FOR_HUB =>
+        state <= x"3";
+        if (GSC_INIT_READ_IN = '1') then
+          dissect_next_state <= LOAD_TO_HUB;
+        else
+          dissect_next_state <= WAIT_FOR_HUB;
+        end if;                                                
     
-    when SAVE_RESPONSE =>
-      state <= x"6";
-      if (GSC_REPLY_DATAREADY_IN = '0' and GSC_BUSY_IN = '0') then
-        if (too_much_data = '0') then
-          dissect_next_state <= WAIT_FOR_LOAD;
+      when LOAD_TO_HUB =>
+        state <= x"4";
+        if ((rx_fifo_q(17) = '1') and (GSC_INIT_READ_IN = '1')) then
+          if (reset_detected = '1') then
+            dissect_next_state <= CLEANUP;
+          else
+            dissect_next_state <= WAIT_FOR_RESPONSE;
+          end if;
         else
-          dissect_next_state <= CLEANUP;
+          dissect_next_state <= LOAD_TO_HUB;
+        end if;        
+      
+      when WAIT_FOR_RESPONSE =>
+        state <= x"5";
+        if (GSC_REPLY_DATAREADY_IN = '1') then
+          dissect_next_state <= SAVE_RESPONSE;
+        else
+          dissect_next_state <= WAIT_FOR_RESPONSE;
         end if;
-      else
-        dissect_next_state <= SAVE_RESPONSE;
-      end if;                  
+      
+      when SAVE_RESPONSE =>
+        state <= x"6";
+        if (GSC_REPLY_DATAREADY_IN = '0' and GSC_BUSY_IN = '0') then
+          if (too_much_data = '0') then
+            dissect_next_state <= WAIT_FOR_LOAD;
+          else
+            dissect_next_state <= CLEANUP;
+          end if;
+        else
+          dissect_next_state <= SAVE_RESPONSE;
+        end if;                        
 
-    when WAIT_FOR_LOAD =>
-      state <= x"7";
-      if (PS_SELECTED_IN = '1') then
-        dissect_next_state <= LOAD_FRAME;
-      else
-        dissect_next_state <= WAIT_FOR_LOAD;
-      end if;
+      when WAIT_FOR_LOAD =>
+        state <= x"7";
+        if (PS_SELECTED_IN = '1') then
+          dissect_next_state <= LOAD_FRAME;
+        else
+          dissect_next_state <= WAIT_FOR_LOAD;
+        end if;
 
-    when LOAD_FRAME =>
-      state <= x"8";
-      if (tx_loaded_ctr = tx_data_ctr) then
-        dissect_next_state <= CLEANUP;
-      else
-        dissect_next_state <= LOAD_FRAME;
-      end if;
+      when LOAD_FRAME =>
+        state <= x"8";
+        if (tx_loaded_ctr = tx_data_ctr) then
+          dissect_next_state <= CLEANUP;
+        else
+          dissect_next_state <= LOAD_FRAME;
+        end if;
 
-    when CLEANUP =>
-      state <= x"9";
-      dissect_next_state <= IDLE;
+      when CLEANUP =>
+        state <= x"9";
+        dissect_next_state <= IDLE;
 
-    when others => dissect_next_state <= IDLE;
+      when others => dissect_next_state <= IDLE;
 
-  end case;
-end process DISSECT_MACHINE;
+    end case;
+  end process DISSECT_MACHINE;
 
--- reset request packet detection
-RESET_DETECTED_PROC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if   ( dissect_current_state = IDLE ) then
-      reset_detected <= '0';
-    elsif( PS_DATA_IN(7 downto 0) = x"80" and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' and saved_hdr_ctr = "0100" ) then
-      reset_detected <= '1';
+  -- reset request packet detection
+  RESET_DETECTED_PROC: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if   ( dissect_current_state = IDLE ) then
+        reset_detected <= '0';
+      elsif( PS_DATA_IN(7 downto 0) = x"80" and PS_WR_EN_IN = '1' and PS_ACTIVATE_IN = '1' and saved_hdr_ctr = "0100" ) then
+        reset_detected <= '1';
+      end if;
     end if;
-  end if;
-end process RESET_DETECTED_PROC;
-MAKE_RESET_PROC: process( CLK )
-begin
-  if( rising_edge(CLK) ) then
-    if   ( dissect_current_state = IDLE ) then
-      make_reset <= '0';
-    elsif( dissect_current_state = CLEANUP and reset_detected = '1' ) then
-      make_reset <= '1';
+  end process RESET_DETECTED_PROC;
+  
+  MAKE_RESET_PROC: process( CLK )
+  begin
+    if( rising_edge(CLK) ) then
+      if   ( dissect_current_state = IDLE ) then
+        make_reset <= '0';
+      elsif( dissect_current_state = CLEANUP and reset_detected = '1' ) then
+        make_reset <= '1';
+      end if;
     end if;
-  end if;
-end process MAKE_RESET_PROC;
+  end process MAKE_RESET_PROC;
 
 
--- monitoring
+  -- monitoring
 
-hist_ctrs_gen : for i in 0 to 31 generate
+--  DATA_HIST_OUT <= (others => '0');
 
-  process( CLK )
+  PROC_DEBUG: process( CLK )
   begin
-    if rising_edge(CLK) then
-      if (RESET = '1') then
-        reset_all_hist(i) <= '1';
-      elsif (hist_inst(i) = x"ffff_ffff") then
-        reset_all_hist(i) <= '1';
-      else
-        reset_all_hist(i) <= '0';
-      end if;                          
+    if( rising_edge(CLK) ) then
+      DEBUG_OUT(0)            <= rx_full;
+      DEBUG_OUT(1)            <= rx_empty;
+      DEBUG_OUT(2)            <= tx_full;
+      DEBUG_OUT(3)            <= tx_empty;
+      DEBUG_OUT(7 downto 4)   <= state;
+      DEBUG_OUT(23 downto 8)  <= rx_cnt;
+      DEBUG_OUT(39 downto 24) <= tx_cnt;
+      DEBUG_OUT(63 downto 40) <= (others => '0');
     end if;
-  end process;
+  end process PROC_DEBUG;
 
-  process(CLK)
+  PROC_MRF: process( CLK, RESET )
   begin
-    if rising_edge(CLK) then
-      if (reset_all_hist /= x"0000_0000") then
-        hist_inst(i) <= (others => '0');
-      elsif (dissect_current_state = LOAD_FRAME and tx_loaded_ctr = tx_data_ctr and i = to_integer(unsigned(tx_data_ctr(15 downto 11)))) then
-        hist_inst(i) <= hist_inst(i) + x"1"; 
-      else
-        hist_inst(i) <= hist_inst(i);
-      end if;
-    end if;
-  end process;
-
-end generate hist_ctrs_gen;
-
-DATA_HIST_OUT <= hist_inst;
-
-process( CLK )
-begin
-  if rising_edge(CLK) then
-    DEBUG_OUT(0) <= rx_full;
-    DEBUG_OUT(1) <= rx_empty;
-    DEBUG_OUT(2) <= tx_full;
-    DEBUG_OUT(3) <= tx_empty;
-    DEBUG_OUT(7 downto 4) <= state;
-    DEBUG_OUT(23 downto 8) <= rx_cnt;
-    DEBUG_OUT(39 downto 24) <= tx_cnt;
-    DEBUG_OUT(63 downto 40) <= (others => '0');
-  end if;
-end process;
-
-process( CLK )
-begin
-  if rising_edge(CLK) then
-    if (RESET = '1') then
+    if   ( RESET = '1' ) then
       mon_rec_frames <= (others => '0');
-    elsif (dissect_current_state = READ_FRAME and PS_DATA_IN(8) = '1') then
-      mon_rec_frames <= mon_rec_frames + x"1";
-    else
-      mon_rec_frames <= mon_rec_frames;
+    elsif( rising_edge(CLK) ) then
+      if( dissect_current_state = READ_FRAME and PS_DATA_IN(8) = '1' ) then
+        mon_rec_frames <= mon_rec_frames + 1;
+      end if;
     end if;
-  end if;
-end process;
-MONITOR_SELECT_REC_OUT <= mon_rec_frames;
+  end process PROC_MRF;
+  MONITOR_SELECT_REC_OUT <= mon_rec_frames;
 
-process( CLK )
-begin
-  if rising_edge(CLK) then
-    if (RESET = '1') then
+  PROC_MRB: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
       mon_rec_bytes <= (others => '0');
-    elsif (rx_fifo_wr = '1') then
-      mon_rec_bytes <= mon_rec_bytes + x"1";
-    else
-      mon_rec_bytes <= mon_rec_bytes;
+    elsif( rising_edge(CLK) ) then
+      if( rx_fifo_wr = '1' ) then
+        mon_rec_bytes <= mon_rec_bytes + 1;
+      end if;
     end if;
-  end if;
-end process;
-MONITOR_SELECT_REC_BYTES_OUT <= mon_rec_bytes;
+  end process PROC_MRB;
+  MONITOR_SELECT_REC_BYTES_OUT <= mon_rec_bytes;
 
-process( CLK )
-begin
-  if rising_edge(CLK) then
-    if (RESET = '1') then
+  PROC_MSF: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
       mon_sent_frames <= (others => '0');
-    elsif (dissect_current_state = LOAD_FRAME and tx_loaded_ctr = tx_data_ctr) then
-      mon_sent_frames <= mon_sent_frames + x"1";
-    else
-      mon_sent_frames <= mon_sent_frames;
+    elsif( rising_edge(CLK) ) then
+      if( dissect_current_state = LOAD_FRAME and tx_loaded_ctr = tx_data_ctr ) then
+        mon_sent_frames <= mon_sent_frames + 1;
+      end if;
     end if;
-  end if;
-end process;
-MONITOR_SELECT_SENT_OUT <= mon_sent_frames;
+  end process PROC_MSF;
+  MONITOR_SELECT_SENT_OUT <= mon_sent_frames;
 
-process( CLK )
-begin
-  if rising_edge(CLK) then
-    if (RESET = '1') then
+  PROC_MSB: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
       mon_sent_bytes <= (others => '0');
-    elsif (tx_fifo_rd = '1') then
-      mon_sent_bytes <= mon_sent_bytes + x"1";
-    else
-      mon_sent_bytes <= mon_sent_bytes;
+    elsif( rising_edge(CLK) ) then
+      if( tx_fifo_rd = '1' ) then
+        mon_sent_bytes <= mon_sent_bytes + 1;
+      end if;
     end if;
-  end if;
-end process;
-MONITOR_SELECT_SENT_BYTES_OUT <= mon_sent_bytes;
+  end process PROC_MSB;
+  MONITOR_SELECT_SENT_BYTES_OUT <= mon_sent_bytes;
 
--- needed for identification
-REPLY_CTR_PROC : process( CLK )
-begin
-  if rising_edge(CLK) then
-    if (RESET = '1') then
+  -- needed for identification
+  PROC_REPLY_CTR: process( CLK, RESET )
+  begin
+    if   ( RESET = '1' ) then
       reply_ctr <= (others => '0');
-    elsif (dissect_current_state = LOAD_FRAME and tx_loaded_ctr = tx_data_ctr) then
-      reply_ctr <= reply_ctr + x"1";
+    elsif( rising_edge(CLK) ) then
+      if( dissect_current_state = LOAD_FRAME and tx_loaded_ctr = tx_data_ctr ) then
+        reply_ctr <= reply_ctr + 1;
+      end if;
     end if;
-  end if;
-end process REPLY_CTR_PROC;
+  end process PROC_REPLY_CTR;
 
 end architecture gbe_response_constructor_SCTRL_arch;