added posibility of periodical Signal for Interlock

diff --git a/pinout/trb3sc_richSensor.lpf b/pinout/trb3sc_richSensor.lpf
index 76db20cab7a17e52fee78a9e90f1c45465c1a890..262209b7674fa38319b467816b021296eebb528a 100644 (file)
--- a/pinout/trb3sc_richSensor.lpf
+++ b/pinout/trb3sc_richSensor.lpf
@@ -94,7 +94,7 @@ IOBUF GROUP "ONEWIRE_group" IO_TYPE=LVCMOS25 PULLMODE=UP DRIVE=12;
 \r
 ### INTERLOCK ###\r
 LOCATE COMP "INTERLOCK_OUT"    SITE "W8";  #INP_CH26 #13\r
-IOBUF  PORT "INTERLOCK_OUT"    IO_TYPE=LVCMOS25;\r
+IOBUF  PORT "INTERLOCK_OUT"    IO_TYPE=LVCMOS25 PULLMODE=OFF;\r
 LOCATE COMP "INTERLOCK_GND_OUT" SITE "Y8"; #INP_CH27\r
 IOBUF  PORT "INTERLOCK_GND_OUT" IO_TYPE=LVCMOS25 PULLMODE=DOWN;\r
 \r

diff --git a/richSensors/code/magnetBoardParser.vhd b/richSensors/code/magnetBoardParser.vhd
index fd0d86b12b3c2fc069ca4583254aff7f5e279945..1b8ab47fcf2d8675495cd631c0558a5607f9cc12 100644 (file)
--- a/richSensors/code/magnetBoardParser.vhd
+++ b/richSensors/code/magnetBoardParser.vhd
@@ -55,7 +55,7 @@ PROC_PARSER : process begin
                 -- Found char '_'.
                 currentState <= readSerialNumber;
             else 
-               currentState <= idle;
+                currentState <= idle;
             end if;
         when readSerialNumber =>
             if INPUT = x"5F" then

diff --git a/richSensors/code/onewire_record.vhd b/richSensors/code/onewire_record.vhd
index b85b692e921f58911e677d25390ca04c6b0da943..a63c771b027530c6dbd91e5e56726097e476e0be 100644 (file)
--- a/richSensors/code/onewire_record.vhd
+++ b/richSensors/code/onewire_record.vhd
@@ -187,74 +187,78 @@ end process;
 
   wait until rising_edge(CLK);
   -- Interlock fires, if Sensor is connected, has power and is higher than the limit
-  if ((temperature_0 >= INTERLOCK_LIMIT) and (temperature_0(11 downto 0) /= x"FFF") and (temperature_0(11 downto 0) /= x"000") and (N_SENSORS >= 1)) then
+  if (((temperature_0 >= INTERLOCK_LIMIT) or (temperature_0(11 downto 0) >= x"550") or (temperature_0(11 downto 0) = x"000")) and (N_SENSORS >= 1)) then
     intlck_flag_i(0) <= '1';
   else 
     intlck_flag_i(0) <= '0';
   end if;
   
-  if ((temperature_1 >= INTERLOCK_LIMIT) and (temperature_1(11 downto 0) /= x"FFF") and (temperature_1(11 downto 0) /= x"000") and (N_SENSORS >= 2)) then
+  if (((temperature_1 >= INTERLOCK_LIMIT) or (temperature_1(11 downto 0) >= x"550") or (temperature_1(11 downto 0) = x"000")) and (N_SENSORS >= 2)) then
     intlck_flag_i(1) <= '1';
   else 
     intlck_flag_i(1) <= '0';
   end if;
   
-  if ((temperature_2 >= INTERLOCK_LIMIT) and (temperature_2(11 downto 0) /= x"FFF") and (temperature_2(11 downto 0) /= x"000") and (N_SENSORS >= 3)) then
+  if (((temperature_2 >= INTERLOCK_LIMIT) or (temperature_2(11 downto 0) >= x"550") or (temperature_2(11 downto 0) = x"000")) and (N_SENSORS >= 3)) then
     intlck_flag_i(2) <= '1';
   else 
     intlck_flag_i(2) <= '0';
   end if;
   
-  if ((temperature_3 >= INTERLOCK_LIMIT) and (temperature_3(11 downto 0) /= x"FFF") and (temperature_3(11 downto 0) /= x"000") and (N_SENSORS >= 4)) then
+  if (((temperature_3 >= INTERLOCK_LIMIT) or (temperature_3(11 downto 0) >= x"550") or (temperature_3(11 downto 0) = x"000")) and (N_SENSORS >= 4)) then
     intlck_flag_i(3) <= '1';
   else 
     intlck_flag_i(3) <= '0';
   end if;
   
-  if ((temperature_4 >= INTERLOCK_LIMIT) and (temperature_4(11 downto 0) /= x"FFF") and (temperature_4(11 downto 0) /= x"000") and (N_SENSORS >= 5)) then
+  if (((temperature_4 >= INTERLOCK_LIMIT) or (temperature_4(11 downto 0) >= x"550") or (temperature_4(11 downto 0) = x"000")) and (N_SENSORS >= 5)) then
     intlck_flag_i(4) <= '1';
   else 
     intlck_flag_i(4) <= '0';
   end if;
   
-  if ((temperature_5 >= INTERLOCK_LIMIT) and (temperature_5(11 downto 0) /= x"FFF") and (temperature_5(11 downto 0) /= x"000") and (N_SENSORS >= 6)) then
+  if (((temperature_5 >= INTERLOCK_LIMIT) or (temperature_5(11 downto 0) >= x"550") or (temperature_5(11 downto 0) = x"000")) and (N_SENSORS >= 6)) then
     intlck_flag_i(5) <= '1';
   else 
     intlck_flag_i(5) <= '0';
   end if;
 
-  if ((temperature_6 >= INTERLOCK_LIMIT) and (temperature_6(11 downto 0) /= x"FFF") and (temperature_6(11 downto 0) /= x"000") and (N_SENSORS >= 7)) then
+  if (((temperature_6 >= INTERLOCK_LIMIT) or (temperature_6(11 downto 0) >= x"550") or (temperature_6(11 downto 0) = x"000")) and (N_SENSORS >= 7)) then
     intlck_flag_i(6) <= '1';
   else 
     intlck_flag_i(6) <= '0';
   end if;
   
-  if ((temperature_7 >= INTERLOCK_LIMIT) and (temperature_7(11 downto 0) /= x"FFF") and (temperature_7(11 downto 0) /= x"000") and (N_SENSORS >= 8)) then
+  if (((temperature_7 >= INTERLOCK_LIMIT) or (temperature_7(11 downto 0) >= x"550") or (temperature_7(11 downto 0) = x"000")) and (N_SENSORS >= 8)) then
     intlck_flag_i(7) <= '1';
   else 
     intlck_flag_i(7) <= '0';
   end if;
   
-  if ((temperature_8 >= INTERLOCK_LIMIT) and (temperature_8(11 downto 0) /= x"FFF") and (temperature_8(11 downto 0) /= x"000") and (N_SENSORS >= 9)) then
+  if (((temperature_8 >= INTERLOCK_LIMIT) or (temperature_8(11 downto 0) >= x"550") or (temperature_8(11 downto 0) = x"000")) and (N_SENSORS >= 9)) then
     intlck_flag_i(8) <= '1';
   else 
     intlck_flag_i(8) <= '0';
   end if;
   
-  if ((temperature_9 >= INTERLOCK_LIMIT) and (temperature_9(11 downto 0) /= x"FFF") and (temperature_9(11 downto 0) /= x"000") and (N_SENSORS >= 10)) then
+  if (((temperature_9 >= INTERLOCK_LIMIT) or (temperature_9(11 downto 0) >= x"550") or (temperature_9(11 downto 0) = x"000")) and (N_SENSORS >= 10)) then
     intlck_flag_i(9) <= '1';
   else 
     intlck_flag_i(9) <= '0';
   end if;
   
-  if ((temperature_10 >= INTERLOCK_LIMIT) and (temperature_10(11 downto 0) /= x"FFF") and (temperature_10(11 downto 0) /= x"000") and (N_SENSORS >= 11)) then
+  if (((temperature_10 >= INTERLOCK_LIMIT) or (temperature_10(11 downto 0) >= x"550") or (temperature_10(11 downto 0) = x"000")) and (N_SENSORS >= 11)) then
     intlck_flag_i(10) <= '1';
   else 
     intlck_flag_i(10) <= '0';
   end if;
   
-  interlock_flag_or_i <= or_all(intlck_flag_i(N_SENSORS-1 downto 0));
-  
+--   interlock_flag_or_i <= or_all(intlck_flag_i(N_SENSORS-1 downto 0));
+  if (x"000001F0" >= INTERLOCK_LIMIT) then
+    interlock_flag_or_i <= '1';
+  else 
+    interlock_flag_or_i <= '0';
+  end if;
   
 end process;
 

diff --git a/richSensors/config.vhd b/richSensors/config.vhd
index ddd5981b4ff96b0532d5a37bf1e86c3dd9f6942f..22cdcd0c86e38833b77846f4e9f334a9976065bf 100644 (file)
--- a/richSensors/config.vhd
+++ b/richSensors/config.vhd
@@ -40,7 +40,10 @@ package config is
     constant INCLUDE_STATISTICS     : integer  := c_YES;
     constant TRIG_GEN_INPUT_NUM     : integer  := 32;
     constant TRIG_GEN_OUTPUT_NUM    : integer  := 2;
-    constant MONITOR_INPUT_NUM      : integer  := 32;        
+    constant MONITOR_INPUT_NUM      : integer  := 32;      
+    
+--activate INTERLOCKMODE with periodical signal instead of constant Signal
+    constant INTERLOCK_PERIODICAL      : integer := c_No;
     
 ------------------------------------------------------------------------------
 --End of design configuration

diff --git a/richSensors/trb3sc_richSensor.vhd b/richSensors/trb3sc_richSensor.vhd
index d5d9a82598865bb4d412392ce55d902881db8bd9..4eb5fa9a084dd5f84152c3ee0b49db3d9fb7909b 100644 (file)
--- a/richSensors/trb3sc_richSensor.vhd
+++ b/richSensors/trb3sc_richSensor.vhd
@@ -410,9 +410,33 @@ THE_ENDPOINT : entity work.trb_net16_endpoint_hades_full_handler_record
       BUS_TX   => busonewire_tx(1)
     );
 
-    interlock_output <= not or_all(interlock_flag_i);
-    INTERLOCK_OUT <= interlock_output;
-    INTERLOCK_GND_OUT <= '0';
+       gen_CONST_INTRLCK : if INTERLOCK_PERIODICAL = 0 generate
+               interlock_output <= not or_all(interlock_flag_i);
+       end generate; 
+    
+               INTERLOCK_OUT <= interlock_output;
+               INTERLOCK_GND_OUT <= '0';
+    
+    
+       gen_CONST_INTRLCK : if INTERLOCK_PERIODICAL = 1 generate
+    THE_INTERLOCK_SIGNALGEN : process
+    variable sig_cnt : unsigned (22 downto 0);
+    begin
+      wait until rising_edge(clk_sys);
+      
+      if reset_i = '1' then
+        sig_cnt := (others => '0');
+      else 
+        sig_cnt := sig_cnt + 1;
+      end if;
+      
+      if ( or_all(interlock_flag_i) = '1') then -- Interlock activated; Over Temperature Limit!
+        interlock_output <= '0';
+      else
+        interlock_output <= sig_cnt(22);
+      end if;
+    end process;
+       end generate;    
     
     THE_UART : entity work.uart_mag
       generic map(