Default value in ADC makes baseline calculation work

diff --git a/ADC/source/adc_ad9219.vhd b/ADC/source/adc_ad9219.vhd
index b8c9afe4956a452ec18d4ea19fff53fa50cc71b6..2e5989cb74cf1c9b40b1098fac16f3d54866972a 100644 (file)
--- a/ADC/source/adc_ad9219.vhd
+++ b/ADC/source/adc_ad9219.vhd
@@ -45,8 +45,8 @@ architecture adc_ad9219_arch of adc_ad9219 is
 
   type value_it is array (0 to 4) of std_logic_vector(9 downto 0);
   type value_t is array (0 to NUM_DEVICES - 1) of value_it;
-  signal value      : value_t;
-  signal fifo_input : value_t;
+  signal value : value_t := (others => (others => (others => '0')));
+  signal fifo_input : value_t := (others => (others => (others => '0')));
 
   type fifo_t is array (0 to NUM_DEVICES - 1) of std_logic_vector(49 downto 0);
   signal fifo_output : fifo_t;