before TDC

diff --git a/cts/config_compile_gsi.pl b/cts/config_compile_gsi.pl
index 8ce1d1428220401ee89cd62c830dc1ad5e5461d0..676238c948bcfebb404815419d110643795cdb85 100644 (file)
--- a/cts/config_compile_gsi.pl
+++ b/cts/config_compile_gsi.pl
@@ -8,7 +8,8 @@ synplify_command             => "/opt/synplicity/R-2020.09-SP1/bin/synplify_prem
 nodelist_file                => 'nodelist.txt',
 pinout_file                  => 'trb3sc_hub_kelpadiwa',
 par_options                  => '../par.p2t',
-    
+#mapper_options               => ' ',
+
 include_TDC                  => 0,
 include_GBE                  => 1,
 

diff --git a/cts/trb3sc_cts.lpf b/cts/trb3sc_cts.lpf
index 42904d371712228ba97b81acb600e5eda5fc39ae..b90464cbe4e7e792d9b9ed51b16dae61334d8a5f 100644 (file)
--- a/cts/trb3sc_cts.lpf
+++ b/cts/trb3sc_cts.lpf
@@ -9,7 +9,7 @@ LOCATE UGROUP  "gen_PCSB.THE_MEDIA_PCSB/media_interface_group" REGION "MEDIA_LEF
 
 #LOCATE UGROUP "gen_PCSB.THE_MEDIA_PCSB/gen_control.3.gen_phaser.THE_PHASER/THE_PHASER_CORE/phaser_core_group" SITE "R111C77D"; # 
 
-LOCATE UGROUP "gen_PCSB.THE_MEDIA_PCSB/gen_control.3.gen_phaser.THE_PHASER/THE_PHASER_CORE/phaser_core_group" SITE "R111C77D"; # 
+#LOCATE UGROUP "gen_PCSB.THE_MEDIA_PCSB/gen_control.3.gen_phaser.THE_PHASER/THE_PHASER_CORE/phaser_core_group" SITE "R101C87D"; # 
 
 BLOCK PATH FROM CELL THE_TDC/calibration_o*;
 BLOCK PATH FROM CELL THE_CTS/TIME_REFERENCE_OUT TO CELL THE_TDC/ReferenceChannel/Channel200/SimAdderNo.FC/FF*;