signal rx_data : std_logic_vector(7 downto 0);\r
signal rx_k : std_logic;\r
signal rx_error : std_logic;\r
+signal rx_dlm_S : std_logic; --PL!
\r
signal rst_n : std_logic;\r
signal rst : std_logic; -- PL!\r
START_POSITION_OUT => start_retr_position_i,\r
\r
--send_dlm: 200 MHz, 1 clock strobe, data valid until next DLM\r
- RX_DLM => RX_DLM,\r
+ RX_DLM => rx_dlm_S, --RX_DLM,\r
RX_DLM_WORD => RX_DLM_WORD,\r
\r
SEND_LINK_RESET_OUT => send_link_reset_i,\r
STAT_REG_OUT => stat_rx_control_i\r
); \r
\r
+RX_DLM <= rx_dlm_S; --!PL 16032015\r
MED_DATAREADY_OUT <= buf_med_dataready_out; \r
\r
------------------------------------------------- \r
led_ok <= rx_allow and tx_allow when rising_edge(clk_100_osc); \r
led_rx <= (buf_med_dataready_out or led_rx) and not timer(20) when rising_edge(clk_100_osc);\r
led_tx <= (MED_DATAREADY_IN or led_tx or sd_los_i) and not timer(20) when rising_edge(clk_100_osc);\r
-led_dlm <= (led_dlm or RX_DLM) and not timer(20) when rising_edge(clk_100_osc);\r
+led_dlm <= (led_dlm or rx_dlm_S) and not timer(20) when rising_edge(clk_100_osc);\r
\r
ROC_TIMER : process begin\r
wait until rising_edge(clk_100_osc);\r
--Internal Connection
LINK_PHASE_IN => LINK_PHASE_IN, --link_phase_S, PL!
SODA_CYCLE_IN => SODA_CYCLE_IN,
-
+ SODA_CMD_WINDOW_IN => soda_cmd_window_S,\r
SODA_CMD_STROBE_IN => soda_send_cmd_S,
START_OF_SUPERBURST => start_of_superburst_S,
SUPER_BURST_NR_IN => super_burst_nr_S,
SODA_CMD_WORD_IN => soda_cmd_word_S,
EXPECTED_REPLY_OUT => expected_reply_S,
- TIME_CAL_OUT => start_calibration_S,\r
+ SEND_TIME_CAL_OUT => start_calibration_S,\r
TX_DLM_PREVIEW_OUT => TX_DLM_PREVIEW_OUT,
TX_DLM_OUT => TX_DLM_OUT,
TX_DLM_WORD_OUT => TX_DLM_WORD_OUT
PULSE_OUT => soda_cmd_strobe_sodaclk_S
);
\r
- SODA_CMD_FLOWCTRL : process(SODACLK)\r
+SODA_CMD_FLOWCTRL : process(SODACLK)\r
begin\r
if( rising_edge(SODACLK) ) then
if( RESET = '1' ) then\r