*** empty log message ***

diff --git a/xilinx/virtex4/trb_net16_fifo_arch.vhd b/xilinx/virtex4/trb_net16_fifo_arch.vhd
index 6be5dacf97243846363f189ac43a835a1291d647..d2de3c892f70f3811b430b7cdea622f299a395b7 100644 (file)
--- a/xilinx/virtex4/trb_net16_fifo_arch.vhd
+++ b/xilinx/virtex4/trb_net16_fifo_arch.vhd
@@ -21,7 +21,7 @@ entity trb_net16_fifo is
       DATA_OUT        : out std_logic_vector(c_DATA_WIDTH - 1 downto 0);
       PACKET_NUM_OUT  : out std_logic_vector(1 downto 0);
       READ_ENABLE_IN  : in  std_logic;
-      DATA_COUNT_OUT  : out std_logic_vector(9 downto 0);
+      DATA_COUNT_OUT  : out std_logic_vector(10 downto 0);
       FULL_OUT        : out std_logic;
       EMPTY_OUT       : out std_logic
       );
@@ -125,7 +125,7 @@ begin
   din(c_DATA_WIDTH + 2 -1 downto c_DATA_WIDTH) <= PACKET_NUM_IN;
   DATA_OUT <= dout(c_DATA_WIDTH - 1 downto 0);
   PACKET_NUM_OUT <= dout(c_DATA_WIDTH + 2 - 1 downto c_DATA_WIDTH);
-  DATA_COUNT_OUT <= data_counter;
+  DATA_COUNT_OUT <= '0' & data_counter;
 
   gen_FIFO6_Count : if DEPTH = 6 and USE_DATA_COUNT = 1 generate
     fifo:xilinx_fifo_18x1k_datacount